CN100505244C - Packaging structure - Google Patents
Packaging structure Download PDFInfo
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- CN100505244C CN100505244C CN 200610079199 CN200610079199A CN100505244C CN 100505244 C CN100505244 C CN 100505244C CN 200610079199 CN200610079199 CN 200610079199 CN 200610079199 A CN200610079199 A CN 200610079199A CN 100505244 C CN100505244 C CN 100505244C
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- carrier
- encapsulating structure
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- supporting region
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Abstract
The invention is a packaging structure, comprising a first bearer, a second bearer, at least a first electronic component and at least a second electronic component, where the second bearer is connected with the first bearer; the first electronic component is arranged on and connected with the first bearer; and the second electronic component is arranged on and connected with the second bearer.
Description
Technical field
The invention relates to a kind of encapsulating structure, and particularly relevant for a kind of encapsulating structure with a plurality of carriers (carrier).
Background technology
Encapsulating structure is via formed product after the complicated encapsulation procedure step.Various encapsulating structure has different electric property (electrical performance) and heat dispersion (capacity of heat dissipation), so the designer can select the encapsulating structure that meets its electric property and heat dispersion demand for use according to its design requirement.
See also shown in Figure 1ly, it illustrates the schematic diagram of existing a kind of encapsulating structure.Existing encapsulating structure 100 comprise a printed circuit board (PCB) (printed circuit board, PCB) 110 with a plurality of electronic components 120.These electronic components 120 are disposed on the surface 112 of printed circuit board (PCB) 110 and with printed circuit board (PCB) 110 and electrically connect.Printed circuit board (PCB) 110 has a plurality of pins (pin) 116, these pins 116 are stretched out by another surface 114 of printed circuit board (PCB) 110, printed circuit board (PCB) 110 can be electrically connected to the electronic installation (for example motherboard, but do not illustrate) of next level by these pins 116.Yet, because these electronic components 120 of existing encapsulating structure 100 all are small-sized elementary packaging bodies (first-level package), and certain wiring area is arranged on the surface 112 of printed circuit board (PCB) 110, and the overall volume of therefore existing encapsulating structure 100 is bigger.In addition, because these electronic components 120 need the moulding via elementary encapsulation procedure in advance, the manufacturing cost of therefore existing encapsulating structure 100 is higher.In addition, encapsulating structure 100 must be inserted into the electronic installation of next level with manual type, so encapsulating structure 100 can't be assembled with the automation board with the electronic installation of next level.
In order to improve above shortcoming, existing another kind of encapsulating structure is suggested.See also shown in Figure 2ly, it illustrates the schematic diagram of existing another kind of encapsulating structure.Existing encapsulating structure 200 comprises a base plate for packaging (package substrate) 210 and a plurality of electronic components 220.These electronic components 220 are disposed on the surface 212 of base plate for packaging 210, and these electronic components 220 can be electrically connected to base plate for packaging 210 by routing joining technique (wire bonding technology) or surface adhering technology (surface mounttechnology).In addition, existing encapsulating structure 200 can be electrically connected to the electronic installation (for example motherboard, but do not illustrate) of next level by tin cream (solder paste) or a plurality of soldered ball (solder ball) (not illustrating).
The advantages such as electronic installation that though existing encapsulating structure 200 has arrangements of components density height, volume is less, processing procedure is simple, cost is lower and can the automation mode place next level; Yet, when existing encapsulating structure 200 dispels the heat in running, can only the mode of heat with conduction be passed on the lead of next level electronic installation by conduction duct (the conductive via) 214 in the base plate for packaging 210.Therefore, the thermal diffusivity (capacity of heat dissipation) of existing encapsulating structure 200 is relatively poor.
Summary of the invention
The purpose of this invention is to provide a kind of encapsulating structure, it has a plurality of carriers.
For reaching above-mentioned or other purposes, the present invention proposes a kind of encapsulating structure, and it comprises one first carrier, one second carrier, at least one first electronic component (electronic component) and at least one second electronic component.Second carrier and first carrier electrically connect.First electronic component arrangements electrically connects on first carrier and with first carrier.Second electronic component arrangements electrically connects on second carrier and with second carrier.
In one embodiment of this invention, the first above-mentioned carrier is configurable on second carrier.
In one embodiment of this invention, the first above-mentioned carrier is configurable on second carrier.In addition, second carrier can have one first supporting region (carrying area) and one second supporting region, first supporting region and second supporting region are not in same plane, and first carrier is disposed on first supporting region, and second electronic component arrangements is on second supporting region.
In one embodiment of this invention, the first above-mentioned carrier is configurable on second carrier.In addition, second carrier can have one first supporting region and one second supporting region, and first supporting region and second supporting region are not in same plane, and first carrier is disposed on first supporting region, and second electronic component arrangements is on second supporting region.In addition, the quantity of above-mentioned first electronic component can be a plurality of, and these first electronic component arrangements are on relative two surfaces of first carrier.
In one embodiment of this invention, the first above-mentioned carrier is configurable by second carrier.
In one embodiment of this invention, the first above-mentioned carrier is configurable by second carrier.In addition, above-mentioned encapsulating structure more comprises at least one bonding wire (bonding wire), and wherein first carrier electrically connects with second carrier by bonding wire.
In one embodiment of this invention, above-mentioned encapsulating structure more comprises colloid (encapsulant), and colloid coats (encapsulate) first electronic component, second electronic component, part first carrier and part second carrier at least.
In one embodiment of this invention, above-mentioned encapsulating structure more comprises colloid, and colloid coats first electronic component, second electronic component, part first carrier and part second carrier at least.In addition, first carrier can have a plurality of weld pads (bonding pad), and the surface that these weld pads are disposed at first carrier is gone up and is exposed to outside the colloid.
In one embodiment of this invention, the thermal resistance value (thermalresistance) of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.
In one embodiment of this invention, the thermal resistance value of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.In addition, the heating power of first electronic component (heat generation rate) can be less than the heating power of second electronic component.
In one embodiment of this invention, the thermal resistance value of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.In addition, the heating power of first electronic component can be less than the heating power of second electronic component.In addition, the first above-mentioned electronic component can be logic control element (logic controlcomponent), driving element (driving component) or passive component (passivecomponent).
In one embodiment of this invention, the thermal resistance value of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.In addition, the heating power of first electronic component can be less than the heating power of second electronic component.In addition, the second above-mentioned electronic component can be mos field effect transistor (metal-oxide-semiconductor field effect transistor, MOSFET), insulated gate bipolar transistor (insulated gate bipolar transistor, IGBT), diode (diode) or anti-current device (choke).
In one embodiment of this invention, the thermal resistance value of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.In addition, the first above-mentioned carrier can be wiring board (wiring board).
In one embodiment of this invention, the thermal resistance value of the first above-mentioned carrier can be greater than the thermal resistance value of second carrier.In addition, the second above-mentioned carrier can be lead frame (leadframe).
Based on above-mentioned, because these bigger second electronic components of heating power are to be disposed on the second less carrier of thermal resistance value, when therefore encapsulating structure operates, the heat that these second electronic components are produced can directly be passed to down the electronic installation of one deck by second carrier, and then makes that encapsulating structure can be not overheated and can keep normal operational function.In addition, because the wiring density of the first carrier inside is bigger, so the quantity of these first electronic component arrangements on first carrier can be more, and then make full use of the configuration space of first carrier.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Fig. 1 illustrates the schematic diagram of existing a kind of encapsulating structure.
Fig. 2 illustrates the schematic diagram of existing another kind of encapsulating structure.
Fig. 3 illustrates the generalized section of the encapsulating structure of first embodiment of the invention.
Fig. 4 illustrates the generalized section of the encapsulating structure of second embodiment of the invention.
Fig. 5 illustrates the generalized section of the encapsulating structure of third embodiment of the invention.
Fig. 6 illustrates first carrier of Fig. 5 and the schematic diagram of the annexation of second carrier before forming encapsulating structure.
100,200,300,400,500: encapsulating structure
110: printed circuit board (PCB)
112,114,212,412,414,514: the surface
116: pin
120,220: electronic component
210: base plate for packaging
214: the conduction duct
310,410,510: the first carriers
312: line layer
314: dielectric layer
316: the conduction duct
320,420,520: the second carriers
330,430: the first electronic components
340,440: the second electronic components
350,550: colloid
360,560: bonding wire
422: the first supporting regions
424: the second supporting regions
516: weld pad
H: difference in height
Embodiment
First embodiment
See also shown in Figure 3ly, it illustrates the generalized section of the encapsulating structure of first embodiment of the invention.The encapsulating structure 300 of first embodiment comprises one first carrier 310, one second carrier 320, at least one first electronic component 330 (Fig. 3 for example illustrates two) and at least one second electronic component 340 (Fig. 3 for example illustrates two).Second carrier 320 and first carrier 310 electrically connect, and the thermal resistance value of first carrier 310 can be greater than the thermal resistance value of second carrier 320.These first electronic components 330 are disposed on first carrier 310 and with first carrier 310 and electrically connect.These second electronic components 340 are disposed on second carrier 320 and electrically connect with second carrier 320, and the heating power of each first electronic component 330 can be less than the heating power of each second electronic component 340.
In first embodiment, first carrier 310 is configurable on second carrier 320.In addition, encapsulating structure 300 more comprises colloid 350, and colloid 350 coats these first electronic components 330, these second electronic components 340, part first carrier 310 and part second carrier 320 at least.As shown in Figure 3, the subregion of second carrier 320 is to be exposed to outside the colloid 350, and it is in order to the electronic installation that electrically connects next level (for example motherboard, but do not illustrate).Except above-mentioned functions, produce when encapsulating structure 300 running when hot, second carrier 320 also can transfer heat to the electronic installation of next level by area exposed.In addition, colloid 350 can by a mould (mold) (not illustrating) in addition encapsulating and heating form, colloid 350 can be protected the element that is coated, and avoiding being subjected to the influence of ambient temperature, moisture and noise, and can provide hand-held body.
In first embodiment, these first electronic components 330 can be logic control element, driving element or passive component, and these second electronic components 340 can be mos field effect transistor, insulated gate bipolar transistor, diode or anti-current device (for example inductance).For example, in Fig. 3, one of them second electronic component 340 (for example being mos field effect transistor) can electrically connect with first carrier 310 and second carrier 320 respectively by many bonding wires 360, in other words, one of them second electronic component 340 is to electrically connect with second carrier 320 by the routing joining technique.In Fig. 3, another second electronic component 340 (for example being the anti-current device) can electrically connect with second carrier 320 by tin cream, and in other words, another second electronic component 340 is to electrically connect with second carrier 320 by the surface adhering technology.This mandatory declaration be, these second electronic components 340 can be according to design requirement by routing joining technique, surface adhering technology or chip bonding technology (flip chip bonding technology) to be electrically connected to second carrier 320.These first electronic components 330 also can be according to design requirement by above-mentioned these technology to be electrically connected to first carrier 310.In view of the above, first embodiment is non-limiting the present invention in order to give an example.
In addition, first carrier 310 can be wiring board, and second carrier 320 can be lead frame (its material for example is metal).Wherein, first carrier 310 that for example is wiring board is to be superimposed by a plurality of line layers (wiring layer) 312 and a plurality of dielectric layers (dielectric layer) 314 to form, and being by at least one conduction duct 316 and mutually electrically connect between at least two line layers 312, therefore for example is that the wiring density of first carrier, 310 inside of wiring board is big usually and circuit is also comparatively complicated.This mandatory declaration be, the external form of first carrier 310 and second carrier 320 can be according to design requirement changes to some extent, first embodiment is in order to for example but not limited.
From the above, because these bigger second electronic components 340 of heating power are to be disposed on the second less carrier 320 of thermal resistance value, when therefore encapsulating structure 300 operates, the heat that these second electronic components 340 are produced can directly be passed to down the electronic installation of one deck by second carrier 320, and then makes that encapsulating structure 300 can be not overheated and can keep normal operational function.Compare with existing encapsulating structure 200 (see figure 2)s, the thermal diffusivity of the encapsulating structure 300 of first embodiment is preferable.In addition, because the wiring density of first carrier, 310 inside is bigger, so the quantity that these first electronic components 330 are disposed on first carrier 310 can be more, and then make full use of the configuration space (disposing space) of first carrier 310.Compare with existing encapsulating structure 100 (see figure 1)s, the volume of the encapsulating structure 300 of first embodiment is less.
Second embodiment
See also Fig. 3 and shown in Figure 4, wherein Fig. 4 illustrates the generalized section of the encapsulating structure of second embodiment of the invention.The main difference part of the encapsulating structure 400 of second embodiment and the encapsulating structure 300 of first embodiment is that these first electronic components 430 are configurable on relative two surfaces 412,414 of first carrier 410.In a second embodiment, first carrier 410 is still configurable on second carrier 420.Second carrier 420 has one first supporting region 422 and one second supporting region, 424, the first supporting regions 422 and second supporting region 424 and is not in same plane.Offer a piece of advice it, with regard to the relative position that Fig. 4 illustrated, have a height difference H between second supporting region 424 and first supporting region 422.In addition, first carrier 410 is disposed on first supporting region 422, and second electronic component 440 is disposed on second supporting region 424.
Because these first electronic components 430 are disposed on relative two surfaces 412,414 of first carrier 410, therefore compare with first embodiment, the number that these first electronic components 430 of second embodiment are disposed on first carrier 410 is more, that is the configuration space of first carrier 410 is bigger.
The 3rd embodiment
See also Fig. 3, Fig. 4 and shown in Figure 5, wherein Fig. 5 illustrates the generalized section of the encapsulating structure of third embodiment of the invention.The encapsulating structure 500 of the 3rd embodiment is that with the main difference part of the encapsulating structure 300,400 of above-mentioned these embodiment first carrier 510 of the 3rd embodiment is configurable other in second carrier 520.In addition, encapsulating structure 500 more comprises at least one bonding wire 560 (Fig. 5 illustrates three), first carrier 510 by these bonding wires 560 at least one of them and electrically connect with second carrier 520.In addition, first carrier 510 can have a plurality of weld pads 516, and these weld pads 516 are disposed on one of first carrier 510 surface 514 and are exposed to outside the colloid 550.Compare with above-mentioned these embodiment, the 3rd embodiment is exposed to these weld pads 516 outside the colloid 550 can transmit electrical signal in the electronic installation of next level (motherboard for example, but do not illustrate), and then increase the passage (channel) that electrically connects between the electronic installation of encapsulating structure 500 and next level.
It should be noted that to see also Fig. 5 and shown in Figure 6 that wherein Fig. 6 illustrates first carrier of Fig. 5 and the schematic diagram of the annexation of second carrier before forming encapsulating structure.Before forming as the encapsulating structure 500 that Fig. 5 illustrated, can be connected to each other by the mode of welding (welding), welding (soldering) or gluing (adhering) between first carrier 510 and second carrier 520, that is can scolding tin (solder) between first carrier 510 and second carrier 520 or glue material materials such as (glue) as media connected to one another.Why first carrier 510 and second carrier 520 are connected to each other is to carry out successive process steps, for example glutinous brilliant (diebonding), routing (wire bonding) and colloid moulding (encapsulant forming) for convenience.
Then, after forming colloid 550, shear (trimming) fabrication steps usually, original connecting portion of the win carrier 510 and second carrier 520 is cut off.Via above-mentioned steps, encapsulating structure 500 can be finished.Mandatory declaration be, between first carrier 510 of encapsulating structure 500 and second carrier 520 final by these bonding wires 560 at least one of them and electrically connect mutually, and colloid 550 is kept the relative position between first carrier 510 and second carrier 520 and hand-holdable body is provided.
In sum, encapsulating structure of the present invention has following advantage at least:
One, because these bigger second electronic components of heating power is to be disposed on the second less carrier of thermal resistance value, when therefore encapsulating structure operates, the heat that these second electronic components are produced can directly be passed to down the electronic installation of one deck by second carrier, and then makes that encapsulating structure can be not overheated and can keep normal operational function.
Two, because the wiring density of the first carrier inside is bigger, so the quantity of these first electronic component arrangements on first carrier can be more, and then make full use of the configuration space of first carrier.
Three, owing to make full use of the configuration space of first carrier, therefore the volume of encapsulating structure of the present invention is less.
Four, because encapsulating structure of the present invention can be electrically connected to the electronic installation of next level by the surface adhering technology, but therefore encapsulating structure automation of the present invention is assembled to the electronic installation of next level, and then improves productive rate and reduce assembly cost.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking aforesaid the technical scheme that claim defines.
Claims (10)
1, a kind of encapsulating structure is characterized in that it comprises:
One first carrier;
One second carrier, electrically connect with this first carrier, this first carrier is disposed on this second carrier, this second carrier has one first supporting region and one second supporting region, this first supporting region and this second supporting region are not in same plane, and this first carrier is disposed on this first supporting region;
A plurality of first electronic components, these first electronic component arrangements go up and electrically connect with this first carrier in relative two surfaces of this first carrier; And
At least one second electronic component is disposed on this second supporting region of this second carrier and with this second carrier and electrically connects.
2, encapsulating structure according to claim 1 is characterized in that wherein said first carrier is disposed at by this second carrier.
3, encapsulating structure according to claim 2 is characterized in that it more comprises at least one bonding wire, and wherein this first carrier electrically connects with this second carrier by this bonding wire.
4, a kind of encapsulating structure is characterized in that it comprises:
One first carrier;
One second carrier electrically connects with this first carrier;
At least one first electronic component is disposed on this first carrier and electrically connects with this first carrier;
At least one second electronic component is disposed on this second carrier and electrically connects with this second carrier; And
Colloid, this colloid coat this first electronic component, this second electronic component, this first carrier of part and this second carrier of part at least;
Wherein this first carrier has a plurality of weld pads, and the surface that these weld pads are disposed at this first carrier is gone up and is exposed to outside this colloid.
5,, it is characterized in that the thermal resistance value of the thermal resistance value of wherein said first carrier greater than this second carrier according to claim 1 or 4 described encapsulating structures.
6, encapsulating structure according to claim 5 is characterized in that the heating power of the heating power of wherein said first electronic component less than this second electronic component.
7, encapsulating structure according to claim 6 is characterized in that wherein said first electronic component is logic control element, driving element or passive component.
8, encapsulating structure according to claim 6 is characterized in that wherein said second electronic component is mos field effect transistor, insulated gate bipolar transistor, diode or anti-current device.
9, encapsulating structure according to claim 5 is characterized in that wherein said first carrier is a wiring board.
10, encapsulating structure according to claim 5 is characterized in that wherein said second carrier is a lead frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610079199 CN100505244C (en) | 2006-05-12 | 2006-05-12 | Packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610079199 CN100505244C (en) | 2006-05-12 | 2006-05-12 | Packaging structure |
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| Publication Number | Publication Date |
|---|---|
| CN101071806A CN101071806A (en) | 2007-11-14 |
| CN100505244C true CN100505244C (en) | 2009-06-24 |
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| CN 200610079199 Active CN100505244C (en) | 2006-05-12 | 2006-05-12 | Packaging structure |
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| CN (1) | CN100505244C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623442B (en) * | 2008-02-28 | 2015-11-25 | 乾坤科技股份有限公司 | Electron package structure |
| US9911715B2 (en) * | 2013-12-20 | 2018-03-06 | Cyntec Co., Ltd. | Three-dimensional package structure and the method to fabricate thereof |
| TWI558286B (en) * | 2014-10-28 | 2016-11-11 | 恆勁科技股份有限公司 | Package structure and method of fabricating the same |
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2006
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|---|---|---|---|---|
| US4768075A (en) * | 1985-11-15 | 1988-08-30 | Bbc Brown, Boveri & Company, Limited | Power semiconductor module |
| US5280193A (en) * | 1992-05-04 | 1994-01-18 | Lin Paul T | Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate |
| US20030067065A1 (en) * | 2001-09-17 | 2003-04-10 | Fairchild Korea Semiconductor Ltd. | Three-dimensional power semiconductor module and method of manufacturing the same |
| CN1458691A (en) * | 2002-04-26 | 2003-11-26 | 半导体元件工业有限责任公司 | Structure and method for forming multiple lead line frame semiconductor device |
| CN2640202Y (en) * | 2003-03-24 | 2004-09-08 | 乾坤科技股份有限公司 | High-density power source module packing structure |
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| Publication number | Publication date |
|---|---|
| CN101071806A (en) | 2007-11-14 |
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