CN100501924C - A making method for the radiant energy conversion chip - Google Patents

A making method for the radiant energy conversion chip Download PDF

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Publication number
CN100501924C
CN100501924C CNB2006101475338A CN200610147533A CN100501924C CN 100501924 C CN100501924 C CN 100501924C CN B2006101475338 A CNB2006101475338 A CN B2006101475338A CN 200610147533 A CN200610147533 A CN 200610147533A CN 100501924 C CN100501924 C CN 100501924C
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energy conversion
radiant energy
sio
silicon
manufacture method
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CN1996555A (en
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王连卫
李金龙
徐少辉
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East China Normal University
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East China Normal University
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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Abstract

This invention discloses one process method to convert erudition energy chip, which comprises the following steps: a, processing P shape macro multi-hole silicon array with certain area proportion and depth; b, getting one layer of shallow knit on silicon; c, removing back silicon with certain thickness; d, depositing one layer of metal on front and back surfaces with thickness between 0.3 to 1 micrometer; then annealing under 400 degrees for 5 to 30 minutes to get the final product. This invention is of depth for more than 150.

Description

A kind of manufacture method of radiant energy conversion chip
Technical field
The present invention relates to a kind ofly convert nuclear radiation the manufacture method of the chip of electric energy to, belong to microelectronics and micro-electromechanical system field.
Background technology
Follow the development of hyundai electronics information technology, various mobile electronic devices continue to bring out, the communication equipment of using as space flight and aviation, novel PDA mobile phone or the like, in order to make the fine work of this kind equipment, the electric power of entrained battery is brought into play a bottleneck of mobile electronic device effect, promptly so-called " severe power shortage " often.The various novel batteries that provide the energy to develop for mobile electronic system are too plenty for the eye to take it all in, as high-energy alkaline cell, Ni-MH battery, lithium battery, wherein lithium ion battery is that present energy storage density is than higher, but nonetheless, its stand-by time still can not meet the demands, and is no more than a week as the stand-by time of major part photograph/camera mobile phone and PDA mobile phone.Place for the electric power resource abundance, as if problem also not obvious, if but be in remote districts, or carry out electric power resources such as field study or remote island and place inadequate or that lack, obviously will have very big problem, for some fields or monitoring point, border, this problem is particularly outstanding, so the strong battery of development of new endurance becomes focus, wherein, nuclear battery adopts the electronic equipment of nuclear battery almost can work down year in year out because of the extremely people's attention of its superpower endurance.Nuclear battery is called radioactivity coordination rope decay battery again, mainly is that heat energy and the light that is discharged when utilizing the radioelement decay produces electric energy.Therefore change the energy that these rays send into electric energy by the semiconductor heat electric transition element, just made nuclear battery.Isotope can be emitted the energy more much bigger than general material in natural decay, and decay time is very long, and therefore, the energy of nuclear battery is big, and volume is little, can use for a long time.Isotope energy size, the speed of the time emitting in decay in addition is not subjected to the influence of temperature, chemical reaction, pressure, electromagnetic field etc. in the external environment.Therefore, it is celebrated accurately and reliably with strong interference immunity and work, becomes the outstanding person in the battery family.Abroad as far back as the sixties just the someone nuclear battery is proposed, think to utilize to collect heat energy that decay produces and to wait the energy is provided by the photovoltaic effect that photon caused that positron-electron annihilation produced such as structures such as pn, traditional nuclear battery mainly adopts such as plutonium 238 solid sources such as grade, its radiographic density is than higher, therefore power can be done very greatly, but its fail safe is the problem that fears are entertained that always, for example report, U.S.'s plutonium nuclear battery accident that once occured frequently, harmful substance leaves behind disaster and cause people to suffer the whole world, in a single day this nuclear battery meets accident, and the nuclear battery explosion of having an opportunity finally causes thousands of people dead because of cancer.And adopt the nuclear battery of gas tritium as working medium since the penetration power of β-ray relatively a little less than, a piece of paper just can block its radiation, metal shell is enough to react completely the radioactivity tritium energy airtight.Therefore, storing and using is comparison safety, but owing to the photon that recombination radiation produced spreads to all directions, and traditional pn knot can only be collected a direction, so efficient is very low, causes the power density of triton battery lower, can't reach practicability.Therefore, the power density that how to improve the triton battery becomes this comparatively safe nuclear battery and moves towards practical key.U.S. scientist announces that a few days ago they have succeeded in developing a kind of novel nuclear battery, and its power is 10 times of similar battery, and can use more than ten years continuously.
Thank to the nuclear battery that leader's research group newly develops by U.S. University of Rochester engineer Philips good fortune, its unique distinction is to be used for the thermoelectric silicon wafer that transforms.They transform its surface, have dug out 1 micron of no SerComm, dark 40 microns concave point, and the reaction environment of such three-dimensional has greatly improved the electric energy that is produced, and at one stroke the power of battery have been improved 10 times, reach the practicability level.
This nuclear battery volume is little, and " longevity ", can work at least 12 years, if it is used in the electronic equipment of daily life, just can save the trouble of frequent replacing battery.At medical domain, it can be the medical instrument continued power of needs heeling-ins all the year round such as cardiac pacemaker in human body.It is not afraid of the temperature great variety, is not afraid of high pressure and corrosion under the deep-sea yet, therefore can go up to the sky with spaceship, can plunge into the commercial sea with bathyscaphe yet.What is called " uniqueness " method that U.S. University of Rochester adopts is exactly directly to adopt anodised way on p-type silicon in fact, carry out the deep hole etching, and then utilize diffusion technology to form the pn knot, because the increase of specific area, and can absorb the ray of emitting from tritium decay in the hole, and efficient is improved significantly, scrutinizing its technology finds, it is when carrying out anodic oxidation making porous silicon, do not carry out graphical treatment, therefore adopt this technology to carry out the size in its aperture of anodic oxidation, shape can only be a kind of being evenly distributed at random, is uncontrollable, therefore also can't design junction area etc., and the random distribution of pore structure can cause pn knot breakdown, and the battery rate of finished products is reduced.
Summary of the invention
Deficiency at the prior art existence, the object of the present invention is to provide and a kind ofly can reach the three-dimensional pn junction structure with regular distribution structure very high-aspect-ratio, with low cost, by on p-type silicon chip, carrying out electrochemical deep etching, acquisition is suitable for making the process of grand porous silicon of the high wall thickness of radiant energy conversion chip, provides the method for utilizing the P diffusion technology to realize three-dimensional pn knot chip manufacturing simultaneously.
Goal of the invention of the present invention is achieved by the following technical solution:
A kind of manufacture method of radiant energy conversion chip comprises the steps:
(1) makes the grand selective porous silicon of p-type: select the p-type silicon chip of resistivity, adopt SiO at 1~30 Ω cm with certain opening area ratio and degree of depth 2Or Si 3N 4As mask layer, carve equally distributed square opening structure with photoetching method at mask layer, Kong Yukong centre distance is at 4 microns or bigger; Etching is carried out in institute's perforate make the window of being opened become inverted pyramid structure, and then carry out anodic oxidation, anodised current strength is controlled at 3~10mA/cm 2, temperature is a room temperature;
(2) silicon is expanded phosphorus and obtain one deck shallow junction: at first pass through PClO at 950 ℃ 2Decomposition deposit phosphorus, carry out rapid thermal annealing again, generally choosing temperature is 950~1000 ℃, annealing time is 5~20 minutes;
(3) remove certain thickness back side silicon: under the situation about being effectively protected in the front after the expansion phosphorus, adopt the 25wt% Tetramethylammonium hydroxide under 85 ℃ of temperature, to corrode 3~5 minutes, use H then 2SO 4/ H 2O 2Clean;
(4) in positive and negative difference deposit layer of metal, metal layer thickness under 400 ℃ of temperature, was annealed 5~30 minutes between 0.3 micron to 1 micron then, promptly made nuclear battery chip of the present invention.
Below for the detailed process of manufacture method of the present invention, with SiO 2As mask layer is example:
At first, make the employed silicon materials of nuclear battery and should be the p-type, and doping one deck n-type is made into shallow junction on p-type silicon, this is because nuclear battery comprises the effect of three aspects, the firstth, and the β volta effect, the secondth, photovoltaic effect, the 3rd is thermal effect.Adopt p-type silicon can make three effect forward stacks as substrate.
The grand porous silicon of making carry out to(for) p-type silicon has had some reports, is characterized in forming easily big cavity, so the area ratio can do very greatly, but for radiant energy conversion chip, if wall is too thin, can't form three-dimensional pn knot.So the key of problem is the bigger structure of wall ratio how to obtain in the making of the grand porous silicon of p-type.
Select p-type (100) silicon chip of resistivity at 1~30 Ω cm.The present invention adopts the SiO of thermal oxidation 2As mask layer.Thickness gets final product more than 300nm.Certainly, also can adopt Si 3N 4Deng as mask layer, but because SiO 2Still etching (can utilize BOE) is all more convenient obtaining (can directly obtain by thermal oxidation), so preferably directly use thermal oxidation SiO 2As mask layer.
Adopt photoetching method, at SiO 2Layer carves equally distributed square structure, and the limit is preferably perpendicular or parallel with (100) datum level.Kong Yukong centre distance should guarantee at 4 microns or bigger, so that make wall thickness satisfy the requirement of pn knot (greater than 2 microns).
Adopt 25wt%TMAH@85 ℃ or 20%KOH@60 or 70 ℃ will be at SiO 2On the window opened become inverted pyramid structure.
Note utilizing BOE (buffered oxide etchant) to come etching SiO if adopt wet processing 2,-as can be at the positive SiO of etching 2The time directly remove back side SiO 2Otherwise.Need an independent step to remove back side SiO 2
After finishing above-mentioned steps, just can carry out anodic oxidation.
Different with the electrochemical anodic oxidation of general meaning, the mode of fixed power source voltage is adopted in anodic oxidation used in the present invention, silicon chip back must be that (this has proposed special requirement to electrically contacting of the back side to printing opacity in fact, one section narration as follows), the mode of stabling current then is by the illumination of control to the silicon back side, this illumination effect is to produce the electron hole in silicon, thereby changes the conductive capability of silicon, utilizes feedback process to make the electric current of entire circuit keep constant substantially.This with anodic metal oxide in function different fully.Particularly illumination must be carried out from the back side of sample.
Silicon chip back is connected with the anode of power supply.In order to make electrically contacting evenly of the back side, the silicon chip that corrodes need form the uniformity of one deck low resistivity layer with Control current overleaf, this low resistivity layer can obtain by the method that ion injects, on this basis, can depositing metal aluminium, utilize photoetching making to go out window structure then so that the illumination needs.Can improve the contact performance at the entire wafer back side like this.We also find directly to utilize conducting solution to contact also with back side silicon can to reach good effect in test, and no longer need to carry out ion and inject and depositing metal.
The selection of corrosive liquid is an emphasis of the present invention, owing to adopt SiO 2As mask layer, generally need to select HF (2-5) % and DMF (dimethylformamide) volume ratio 1:1 mixed solution, but actual tests is found, even corrosion current is littler, the area of its pore structure is bigger than still, that is to say, can't satisfy the three-dimensional pn of making and tie needed wall thickness.But if in above-mentioned corrosive liquid, add the activating agent that volume ratio is 1~2% Triton X-100 (triton x-100), its area ratio can be controlled in 50% when it was 100 microns in corrosion depth, and when making three-dimensional pn junction structure, the degree of depth in hole only needs in 100 microns.Therefore, obviously adopting this improved corrosive liquid to carry out anodic oxidation is the key that realizes three-dimensional pn junction structure.
Anodised current strength generally is controlled at 3~10mA/cm 2, temperature is a room temperature.
The metal or the silicon that corrode used negative electrode and be by hydrofluoric acid corrosion resistance constitute, and the material that adopts is a platinum wire usually.Form the structure of similar a kind of electric capacity with the anode silicon face,
Control system of the present invention need adopt computer control mode.
Experimental provision provided by the present invention is to be applied to instrument and equipment in the manufacture of semiconductor, dustproof, contamination there is very clear and definite requirement, therefore different with the anodic oxidation device of common metal from everyways such as controls of material, for example, etching tank can only be selected corrosion resistant fluorine-based plastics for use.And be preferably in the clean room and carry out.
Need at first remove its surperficial SiO through the sample after the anodic oxidation 2Can adopt concentration is 20% HF acid.
Next step is to expand phosphorus technology, and this technology is exactly the diffusion technology commonly used of integrated circuit, generally needs the control junction depth at 0.1 micron, and technology comprises at first passes through PClO at 950 ℃ 2Decomposition deposit phosphorus, carry out rapid thermal annealing again, generally choose 950~1000 ℃, 5~20 minutes.Annealing time need calculate according to the junction depth of actual annealing temperature and needs.
Expand after the phosphorus under the situation that need be effectively protected in the front, adopt the 25wt% Tetramethylammonium hydroxide under 85 ℃ of temperature, to corrode 3~5 minutes, use H then 2SO 4/ H 2O 2(volume ratio 1:1) cleans under greater than 80 ℃ temperature.
(thermal evaporation, electron beam evaporation or sputter are all right, and thickness is between 0.3 micron to 1 micron to distinguish deposit aluminium at the front and back of sample.Under 400 ℃ of temperature, annealed 5~30 minutes.
The nuclear battery chip has been made success like this.Next just can carry out the assembling of nuclear battery.
The front of ready-made chip is linked to each other with electrode, and the back side links to each other general directly link to each other with pcb board with other electrode.Draw the both sides output electrode of battery.Note when nuclear battery is worked, having only face exposure in the tritium gas atmosphere.
The present invention makes the deep hole array on silicon substrate, its main method adopts electrochemical etching method exactly, and depth-to-width ratio can meet or exceed 150.And, increased substantially the performance of battery and the rate of finished products of manufacturing with the making of the microwell array of this process application in the triton battery, and it is breakdown to reduce the pn knot that the random distribution because of pore structure causes greatly, thus destroy entire cell.
Embodiment
Below in conjunction with the manufacture method of concrete nuclear energy conversion chip, implementation process of the present invention is carried out clear, complete explanation:
Embodiment
The silicon chip that embodiment adopts be p-type 8~13 Ω cm's<100〉silicon chip.Obtaining thickness by standard oxidation (entrusting processing line processing) is the SiO of 300nm 2Oxide layer.
Reticle is designed to 3 microns * 3 microns holes, with 6 microns * 6 microns periodic arrangement quadrate dot matrix, by photoetching process, this arrangement is transferred on the wafer.By BOE (buffered oxide etchant) corrosion SiO 2, the Tetramethylammonium hydroxide that sample is immersed 25wt% was corroded about 3 minutes for 85 ℃, obtained to have the etch pit of inverted pyramid arrangement architecture, and this is the original position that the artificial setting of pitting corrosion is carried out in the back.Next carry out anodic oxidation, adopt device as previously described, what wherein the illumination at the back side was adopted is the adjustable bulb of Ou Silang, maximum operating voltage direct current 12V, its supply power voltage provides by the power module by computer system control, and the deviation of the instruction that puts on power module by anodised actual current value and set point obtains according to certain algorithm again.The set point of electric current is 5mA/cm 2Etching time is 3 hours.
Utilize HF or BOE etching mask SiO 2
Utilize the standard diffusion technology, expand phosphorus, comprise that the deposit of phosphorus and diffusion advance, but the time that diffusion advances is shorter, junction depth control should be at 0.1 micron.
When phosphorus was expanded in the front, phosphorus had also spread certain depth overleaf, and we adopt about 2~3 minutes of 25wt%TMAOH@85 ℃ of corrosion with the back side when effectively protecting the front.Utilize HNO 3(100%) soak 10 minutes, carry out the thermal evaporation of positive and negative aluminium again, the thickness that we use is approximately 500nm, adopts rapid thermal annealing again under the 400C temperature then, handles 5 minutes.The chip part completes like this.

Claims (9)

1, a kind of manufacture method of radiant energy conversion chip comprises the steps: that (1) makes the grand selective porous silicon of p-type with certain opening area ratio and degree of depth: select the p-type silicon chip of resistivity at 1~30 Ω cm, adopt SiO 2Or Si 3N 4As mask layer, carve equally distributed square opening structure with photoetching method at mask layer, Kong Yukong centre distance is 4-6 microns; Etching is carried out in institute's perforate make the window of being opened become inverted pyramid structure, and then carry out anodic oxidation, anodised current strength is controlled at 3~10mA/cm 2, temperature is a room temperature;
(2) silicon is expanded phosphorus and obtain one deck shallow junction: at first pass through PClO at 950 ℃ 2Decomposition deposit phosphorus, carry out rapid thermal annealing again, generally choosing temperature is 950~1000 ℃, annealing time is 5~20 minutes;
(3) remove certain thickness back side silicon: under the situation about being effectively protected in the front after the expansion phosphorus, adopt the 25wt% Tetramethylammonium hydroxide under 85 ℃ of temperature, to corrode 3~5 minutes, use H then 2SO 4/ H 2O 2Clean;
(4) in positive and negative difference deposit layer of metal, metal layer thickness under 400 ℃ of temperature, was annealed 5~30 minutes between 0.3 micron to 1 micron then, promptly made nuclear battery chip of the present invention.
2, the manufacture method of a kind of radiant energy conversion chip according to claim 1 is characterized in that: the described mask layer of (1) step is SiO 2, thickness is more than or equal to 300nm.
3, according to the manufacture method of claim 1 or 2 any described a kind of radiant energy conversion chips, it is characterized in that: the Tetramethylammonium hydroxide that adopts 25wt% is at 85 ℃ of following or 20wt%KOH corrosion SiO under 60 or 70 ℃ 2, acquisition has the etch pit of inverted pyramid arrangement architecture.
4, the manufacture method of a kind of radiant energy conversion chip according to claim 3 is characterized in that: corrosion SiO 2The time can be at the positive SiO of etching 2The time directly remove back side SiO 2
5, according to the manufacture method of claim 1 or 2 any described a kind of radiant energy conversion chips, it is characterized in that: the mode of fixed power source voltage is adopted in described anodic oxidation, silicon chip back is connected with the anode of power supply, and silicon chip back must be a printing opacity, and illumination is carried out from the back side of sample.
6, according to the manufacture method of claim 1 or 2 any described a kind of radiant energy conversion chips, it is characterized in that: adopt SiO 2During as mask layer, the corrosive liquid that anodic oxidation is selected for use is: be 2-5% HF with concentration with dimethylformamide by volume 1:1 mix, in mixed liquor, add the activating agent of the triton x-100 that accounts for mixed liquor volume 1~2% again.
7, according to the manufacture method of claim 1 or 2 any described a kind of radiant energy conversion chips, it is characterized in that: adopting concentration through the sample after the anodic oxidation is that its surperficial SiO is removed in 20% HF acid 2
8, according to the manufacture method of claim 1 or 2 any described a kind of radiant energy conversion chips, it is characterized in that: the used negative electrode of corrosion is that metal or silicon by hydrofluoric acid corrosion resistance constitutes in the anodic oxidation.
9, the manufacture method of a kind of radiant energy conversion chip according to claim 1 is characterized in that: the described metal level of (4) step is an aluminium lamination.
CNB2006101475338A 2006-12-19 2006-12-19 A making method for the radiant energy conversion chip Expired - Fee Related CN100501924C (en)

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CN101117206B (en) * 2007-08-03 2012-09-26 上海欧普泰科技创业有限公司 Method for generating tomography between micro-channel structure and substrate in production process of silicon micro-channel by electrochemical process
CN101174484B (en) * 2007-09-14 2010-05-19 大连理工大学 Production method for upper electrode of groove type isotope micro cell
ES2705690T3 (en) * 2010-01-08 2019-03-26 Tae Tech Inc Conversion of high energy photons into electricity
CN102254814B (en) * 2011-08-16 2013-12-25 中国科学院电工研究所 Silicon oxide selective etching solution, preparation method and application thereof
CN102737747B (en) * 2012-07-05 2015-08-05 四川大学 A kind of miniature tritium battery and preparation method thereof
CN103996422B (en) * 2014-04-25 2016-08-24 南京航空航天大学 A kind of fluorescent core battery

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