CN100498458C - Liquid crystal display panel - Google Patents
Liquid crystal display panel Download PDFInfo
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- CN100498458C CN100498458C CNB2006100607448A CN200610060744A CN100498458C CN 100498458 C CN100498458 C CN 100498458C CN B2006100607448 A CNB2006100607448 A CN B2006100607448A CN 200610060744 A CN200610060744 A CN 200610060744A CN 100498458 C CN100498458 C CN 100498458C
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Abstract
The invention discloses a LCD panel, which comprises the following parts: colorful filtering base, film transistor base corresponding to the colorful filtering base, liquid crystal layer between the film transistor base and the colorful filtering base and frame gel, wherein the film transistor base contains a conductive layer pattern at the surface area of film transistor base, which is near the liquid crystal layer; the conductive layer pattern concludes multiple paralleling para-marker; the frame gel is set corresponding to the conductive layer pattern, which embraces the liquid crystal layer. The invention bases on the para-marker of the conductive layer pattern as standard, which controls wire breadth precision of the coated frame gel and the distance between two bases effectively.
Description
Technical field
The present invention relates to a kind of display panels.
Background technology
Display panels is the key element in the liquid crystal indicator, the liquid crystal molecule that its main element generally includes two glass substrates, is coated on the frame glue (Sealant) between these two glass substrates and is poured in this frame glue and these two spaces that glass substrate is formed.In two above-mentioned glass substrates, one of them substrate has the pixel electrode of many groups, in order to the anglec of rotation of control liquid crystal molecule; Another substrate then has colored filter (Color Filte rFilm), is used for making liquid crystal panel to present colored image.
A kind of display panels of prior art as shown in Figure 1.This display panels 1 comprises a thin film transistor base plate 11, a colored filter substrate 13, a liquid crystal layer 15 and a shaped as frame frame glue 17, this thin film transistor base plate 11 is oppositely arranged with this colored filter substrate 13 intervals one determining deviation, this liquid crystal layer 15 is arranged on 13 of this thin film transistor base plate 11 and this colored filter substrates, this frame glue 17 is folded in 13 of this thin film transistor base plate 11 and this colored filter substrates, surrounds and encapsulate this liquid crystal layer 15.
Seeing also Fig. 2 again, is thin film transistor base plate 11 floor map of this display panels 1.The surface of this thin film transistor base plate 11 is provided with first conductive layer pattern 111 and second conductive layer pattern 113, wherein this first conductive layer pattern 111 is to be arranged by the interlaced clathrate that is in a plurality of conducting wires, and be formed at the middle section of this thin film transistor base plate 11 near liquid crystal layer 15 surfaces, 113 of this second conductive layer patterns are to be block the arrangement by a plurality of conducting wires to form, and are formed on the fringe region of this thin film transistor base plate 11 near liquid crystal layer 15 surfaces.
This display panels 1 is that the employing liquid crystal drip-injection (that is: will seal shaped as frame frame glue 17 earlier and be coated on this thin film transistor base plate 11 peripheries by One Drop Fill, manufacture method ODF); With liquid crystal drip device liquid crystal layer 15 is distributed in the space that this frame glue 17 and this thin film transistor base plate 11 formed; In vacuum environment,, and frame glue 17 solidified make this thin film transistor base plate 11 and these colored filter substrate 13 strong bonded this colored filter substrate 13 and its applying.
When this thin film transistor base plate 11 is fitted with this colored filter substrate 13, need the two spacing is set according to design, thus require accurately coating frame glue, to guarantee the display quality of product; The live width that more needs strict controller chassis glue 17 is to guarantee that panel gap is even.
In the processing procedure of display panels assembling section, the control of frame glue 17 live widths has very big influence to the final products quality.If live width is too thin, and then may producing gas leak phenomenon, to make liquid crystal to fill complete, perhaps may cause display panels 1 between the not good phenomenon of spacing evenness; Live width then may influence the difficulty and the quality thereof of follow-up cutting technique as if too wide, perhaps because the pollution to liquid crystal layer 15 is caused in frame glue 17 too close viewing areas.
In this display panels 1, though rely on second conductive layer pattern 113 that is arranged on this thin film transistor base plate 11, make the dispensing area planarization of this frame glue 17, but because when 17 coatings of frame glue, there is not the position reference foundation, positional precision can only be according to the performance of equipment itself, so cause accuracy error easily during board coating frame glue 17; In addition, the live width of frame glue 17 can only not have the position reference foundation according to device control equally, can cause the live width inequality of frame glue 17 yet.
Summary of the invention
In order to solve the not high and wide uneven problem of frame tree lace of display panels frame glue coating precision of the prior art, be necessary to provide a kind of frame glue coating positional precision height and the wide uniform display panels of frame tree lace.
A kind of display panels, it comprises that the thin film transistor base plate, of a colored filter substrate, relative this colored filter substrate setting is folded in liquid crystal layer and the frame glue between this colored filter substrate and this thin film transistor base plate, this thin film transistor base plate comprises a conductive layer pattern, this conductive layer is arranged on this thin film transistor base plate marginal surface zone, and near this liquid crystal layer side surface, this conductive layer pattern comprises that the contraposition of a plurality of parallel arrangements indicates, this frame glue is to should the conductive layer pattern setting, and surrounds this liquid crystal layer.
At the further improvement of above-mentioned display panels, this conductive layer pattern also comprises a contraposition benchmark, and this contraposition reference indicates perpendicular to this contraposition and is provided with.
Compared with prior art, thin film transistor base plate of the present invention surface is provided with a plurality of parallel arrangement contraposition signs and contraposition reference, rely on this contraposition to indicate promptly this contraposition reference as the contraposition basis, and then control the glue-spread and the coating speed of this frame glue, obtain the frame glue and the substrate spacing of certain specification live width, guarantee the accurate contraposition in the frame glue coating process.When the frame tree lace wide wide or narrow and when exceeding specification, can indicate by this contraposition equally and revise the wide and substrate spacing of controller chassis tree lace as benchmark in real time.
Description of drawings
Fig. 1 is a prior art display panels side cut-away view.
Fig. 2 is a thin film transistor base plate floor map shown in Figure 1.
Fig. 3 is a display panels of the present invention side cut-away view.
Fig. 4 is the thin film transistor base plate floor map of display panels shown in Figure 3.
Fig. 5 is the second conductive layer pattern part plan synoptic diagram on the thin film transistor base plate shown in Figure 4.
Fig. 6 is a display panels manufacturing process synoptic diagram shown in Figure 3.
Fig. 7 is the second conductive layer pattern part plan synoptic diagram shown in the second embodiment of the invention.
Fig. 8 is the second conductive layer pattern part plan synoptic diagram shown in the third embodiment of the invention.
Fig. 9 is the second conductive layer pattern part plan synoptic diagram shown in the four embodiment of the invention.
Embodiment
Seeing also Fig. 3, is display panels 2 diagrammatic cross-sections that first embodiment of the invention discloses.This display panels 2 comprises: a thin film transistor base plate 21, a colored filter substrate 23, a liquid crystal layer 25 and a shaped as frame frame glue 27, this thin film transistor base plate 21 is oppositely arranged with this colored filter substrate 23 intervals one determining deviation, this liquid crystal layer 25 is arranged on 23 of this thin film transistor base plate 21 and this colored filter substrates, this frame glue 27 is folded in 23 of this thin film transistor base plate 21 and this colored filter substrates, and encapsulates this liquid crystal layer 25 23 of this thin film transistor base plate 21 and this colored filter substrates.
This thin film transistor base plate 21 and this colored filter substrate 23 all are glass substrates, liquid crystal layer 25 is interposed in 23 of this thin film transistor base plate 21 and this colored filter substrates, when light beam passes through liquid crystal layer 25, liquid crystal molecule is vertically stood or is reversed into irregularly, thereby intercepts or light beam is passed through smoothly.This frame glue 27 is arranged on around this thin film transistor base plate 21 and this colored filter substrate 23, and encapsulated liquid crystal layer 25 so that good pressing exhaust to be provided, guarantees that simultaneously the liquid crystal layer 25 and the external world are isolated fully.
Seeing also Fig. 4 again, is thin film transistor base plate 21 floor map that are coated with shaped as frame frame glue 27.Wherein this thin film transistor base plate 21 is provided with first conductive layer pattern 211 and second conductive layer pattern 213 near the surface of liquid crystal layer 25.This first conductive layer pattern 211 is arranged on the surperficial middle section of this thin film transistor base plate 21 near liquid crystal layer 25 1 sides, it comprises the metal level of a plurality of sweep traces and a plurality of signal wires, these a plurality of sweep traces and a plurality of signal wire are crisscross arranged and are clathrate and arrange, and video signal writes this display panels 2 in regular turn by this first conductive layer pattern 211.This second conductive layer pattern 213 is arranged on the strip metal layer of this thin film transistor base plate 21 near liquid crystal layer 25 1 side surface fringe regions, itself and the corresponding setting of dispensing area of this shaped as frame frame glue 27, it is with so that these thin film transistor base plate 21 edge area planarizations, simultaneously in order to realize colored filter substrate 23 and these thin film transistor base plate 21 accurate contrapositions.
Seeing also Fig. 5, is the local enlarged diagram of this second conductive layer pattern 213.This second conductive layer pattern 213 comprises contraposition sign 2133 and a plurality of contraposition scale 2135 of a contraposition benchmark 2131, a plurality of parallel arrangements.
This contraposition reference 2131, this contraposition sign 2133 and this contraposition scale 2135 are the strip conductive metal layer that is formed on this thin film transistor base plate 21, wherein this contraposition reference 2131 is along the edge direction setting that is parallel to this thin film transistor base plate 21, the contraposition of these a plurality of parallel arrangements indicates 2133 respectively perpendicular to this contraposition reference 2131, and is symmetrically distributed with respect to this contraposition reference 2131; These a plurality of contrapositions indicate 2133 parallel arrangements, and per two adjacent contrapositions indicate 2133 intervals, one determining deviation, when this contraposition indicates 2133 sign same units ranks; Then its adjacent contraposition indicates 2133 spacing and equates, when this contraposition indicates 2133 when indicating different organizational level, it is unequal that then its adjacent contraposition indicates 2133 spacing; The size of this spacing is between 0.1 to 100 micron; This contraposition scale 2135 is arranged on a wherein contraposition and indicates on 2131, is parallel to this contraposition reference 2131 simultaneously, and the spacing of per two adjacent contraposition scales 2135 is between 0.1 to 100 micron.
The contraposition reference 2131 on thin film transistor base plate of the present invention 21 surfaces is as the coating benchmark at frame glue 27 coating process.This contraposition reference 2131 can be used as the center line of frame glue 27 coatings, also can be used as the edge wheel profile of frame glue 27 coatings, make in frame glue 27 coating process based on this coating benchmark, and then control the glue-spread and the coating speed of this frame glue 27, obtain the frame glue 27 of certain specification live width, thereby guarantee the accurate contraposition in frame glue 27 coating process.When frame glue 27 live widths wide or narrow and when exceeding specification, revise controller chassis glue 27 live widths and substrate spacing in real time as benchmark by this contraposition reference 2131.
The contraposition on thin film transistor base plate of the present invention 21 surfaces indicates 2133 as the coating benchmark at frame glue 27 coating process.This contraposition indicates the 2133 edge wheel profiles that can be used as 27 coatings of frame glue, makes in frame glue 27 coating process based on this coating benchmark the frame glue 27 of acquisition certain specification live width, thereby the accurate coating in assurance frame glue 27 coating process.Wide or narrow and when exceeding specification when frame glue 27 live widths, can indicate 2133 by this contraposition equally and revise glue-spread and coating speed in real time, controller chassis glue 27 live widths and obtain substrate spacing in the specification as benchmark.
Seeing also Fig. 6, is the manufacture method process flow diagram of display panels 2 of the present invention.The manufacture method of this display panels 2 mainly may further comprise the steps: a thin film transistor base plate and a colored filter substrate (step 41) are provided; Coating frame glue is on this thin film transistor base plate (step 42); Pre-roasting frame glue (Seal Pre-bake) (step 43); Dispenser method (One Drop Fill) (step 44); Contraposition and hot pressing (Alignment and
Hot press) (step 45); Frame glue is roasting (Seal post-bake) (step 46) admittedly.According to the manufacture method process flow diagram of this display panels 2, its concrete manufacture process is as described below.
Step 41 a: thin film transistor base plate and a colored filter substrate are provided.
One as shown in Figure 3 a thin film transistor base plate 21 and a colored filter substrate 23 is provided.Wherein this thin film transistor base plate 21 is provided with second conductive layer pattern 213 as shown in Figure 4.
Step 42: coating frame glue is on this thin film transistor base plate.
Corresponding second conductive layer pattern of substrate surface 213 zone coating shaped as frame frame glue 27 at this thin film transistor base plate 21.Wherein this frame glue 27 is coated with along being parallel to these contraposition reference 2131 directions, and this contraposition reference 2131 can be used as the center line of frame glue 27 coatings, also can be used as the edge wheel profile of frame glue 27 coatings.
Step 43: roasting in advance frame glue (Seal Pre-bake).
With the solvent evaporates that frame glue 27 includes, allow frame glue harden to a certain degree, make it again during the contraposition pressing, can allow frame glue 27 slowly by pressing, can guarantee the stability of linear characteristic after the pressing again.
Step 44: dispenser method.
Adopt ODF method dispenser method in the space that this frame glue 27 and this thin film transistor base plate 21 surround.
Step 45: contraposition and hot pressing (Alignment and Hot press).
Adopt ultraviolet glue (UV glue) with this thin film transistor base plate 21 and this colored filter substrate 23 precision contrapositions and fixing, avoid being offset after the hot pressing; Accurately after the contraposition,, obtain the frame glue 27 of certain live width and the frame glue 27 of certain altitude, utilize the frame glue 27 after this pressing to form a determining deviation at this thin film transistor base plate 21 and 23 of this colored filter substrates through the hot pressing of twice different temperatures.
Step 46: frame glue is roasting (Seal post-bake) admittedly.
Adopt ultraviolet light beam to shine from these thin film transistor base plate 21 outsides,, and guarantee the viscosity of this thin film transistor base plate 21 and this colored filter substrate 23 frame glue 27 full solidification of hot pressing by a light shield.
To this contraposition reference 2131 be set on this second conductive layer pattern 213 in the present invention, utilize the coating benchmark of this contraposition reference 2131 as coating frame glue 27, in coating process, along contraposition reference 2131 directions coatings frame glue 27, and the coating live width of this frame glue 27 and length can rely on the contraposition of this second conductive layer pattern 213 indicate 2133 and contraposition scale 2135 be coated with as benchmark.Observe the variable quantity of pressing process center glue 27 live widths by eyes, so the glue-spread and the coating speed of the coating of controller chassis glue, make in the pressing process, effectively guarantee these frame glue 27 live widths and this thin film transistor base plate 21 and these colored filter substrate 23 spacings.
In addition, with the contraposition of this this second conductive layer pattern 213 indicate 2133 and contraposition scale 2135 as benchmark, when frame glue 27 coating out of true take place, can adjust corresponding board setting in real time.
Seeing also Fig. 7, is the another kind of part plan synoptic diagram that is arranged at the second surperficial conductive layer pattern 313 of thin film transistor base plate (figure does not show) that second embodiment of the invention discloses.
The thin film transistor base plate 21 that the thin film transistor base plate that this embodiment disclosed and first embodiment are disclosed is basic identical, and its difference is: second conductive layer pattern 313 of this second embodiment comprises that a contraposition benchmark 3131 and a plurality of contraposition that be arranged in parallel indicate 3133.
This contraposition indicates 3133 for being arranged on the strip metal conductive layer on this thin film transistor base plate surface, and along the edge direction setting that is parallel to this thin film transistor base plate, when this contraposition indicates 3133 sign same units ranks, then its adjacent contraposition indicates 3133 spacing and equates, when this contraposition indicates 3133 when indicating different organizational level, it is unequal that then its adjacent contraposition indicates 3133 spacing; Per two adjacent contrapositions indicate 3133 spacing between 0.1 to 100 micron.
In utilizing this thin film transistor base plate assembling process, bearing of trend along this contraposition sign 3133 is coated with, indicate 3133 as judgment standard with these a plurality of contrapositions, and then control the glue-spread and the coating speed of this frame glue 27, with spacing between the live width that guarantees this frame glue 27 and this substrate.
Seeing also Fig. 8, is second conductive layer pattern, the 413 part plan synoptic diagram that third embodiment of the invention discloses.
The thin film transistor base plate that this embodiment disclosed (figure does not show) is basic identical with the thin film transistor base plate (consulting Fig. 4) that first embodiment is disclosed, and its difference is: this second conductive layer pattern 413 comprises that a plurality of contraposition reference 4131 and a plurality of contraposition indicate 4133.Wherein this a plurality of contraposition reference 4131 intervals one determining deviation be arranged in parallel, when this contraposition reference 4131 indicates the same units rank, then the spacing of 4131 of its adjacent contraposition reference equates, when this contraposition reference 4131 indicated different organizational level, then the spacing of 4131 of its adjacent contraposition reference was unequal; The spacing of per two adjacent contraposition reference 4131 is between 0.1 to 100 micron; These a plurality of contrapositions indicate 4133 same determining deviations at interval and be arranged in parallel, and per two adjacent contrapositions indicate 4133 spacings between 0.1 to 100 micron, and this contraposition reference 4131 and these contraposition sign 4133 mutual square crossings, form a plurality of clathrates.
When utilizing this thin film transistor base plate to assemble, utilize a plurality of contraposition reference 4131 and a plurality of contraposition of this mutual square crossing to indicate 4133 as standard, be coated with frame glue (figure does not show), and then control the glue-spread and the coating speed of this frame glue, with live width and this substrate spacing that guarantees this frame glue.
Seeing also Fig. 9 again, is second conductive layer pattern, the 513 part plan synoptic diagram that four embodiment of the invention discloses.
The thin film transistor base plate that this embodiment disclosed (figure does not show) is basic identical with the thin film transistor base plate (consulting Fig. 4) that first embodiment is disclosed, and difference is: this second conductive layer pattern 513 comprises a plurality of contrapositions signs 5133 and a plurality of contraposition scale 5135.Wherein these a plurality of contrapositions sign 5133 same determining deviations at interval be arranged in parallel, when this contraposition indicates 5133 sign same units ranks, then its adjacent contraposition indicates 5133 spacing and equates, when this contraposition indicates 5133 when indicating different organizational level, it is unequal that then its adjacent contraposition indicates 5133 spacing; Per two adjacent contrapositions indicate 5133 spacings between 0.1 to 100 micron, and each contraposition sign 5133 is provided with a plurality of contraposition scales 5135 that be arranged in parallel.
When utilizing this thin film transistor base plate to assemble, the a plurality of contrapositions that utilize these a plurality of contrapositions signs 4133 and be provided with thereon indicate as benchmark, be coated with frame glue (figure does not show), and then control the glue-spread and the coating speed of this frame glue, with live width and this substrate spacing that guarantees this frame glue.
Claims (9)
1. display panels, it comprises a colored filter substrate, one thin film transistor base plate, one liquid crystal layer and a frame glue, this thin film transistor base plate this colored filter substrate relatively is provided with, this liquid crystal layer is folded between this colored filter substrate and this thin film transistor base plate, this thin film transistor base plate comprises a conductive layer pattern, this conductive layer pattern is arranged on the fringe region on the close liquid crystal layer side surface of this thin film transistor base plate, it is characterized in that: this conductive layer pattern comprises that the contraposition of a plurality of parallel arrangements indicates, this frame glue to should conductive layer pattern coating, and surround this liquid crystal layer.
2. display panels as claimed in claim 1 is characterized in that: it is the strip metal layer that this contraposition indicates.
3. display panels as claimed in claim 1 is characterized in that: the spacing that per two adjacent contrapositions indicate is between 0.1～100 micron.
4. display panels as claimed in claim 1 is characterized in that: this conductive layer pattern comprises that also one is parallel to the contraposition reference of thin film transistor base plate near the fringe region on liquid crystal layer side surface, and this contraposition reference indicates perpendicular to this contraposition and is provided with.
5. display panels as claimed in claim 4 is characterized in that: this contraposition reference is the strip metal layer.
6. display panels as claimed in claim 4 is characterized in that: at least one contraposition is marked with and is provided with a plurality of contraposition scales that are parallel to each other and indicate perpendicular to contraposition.
7. display panels as claimed in claim 6 is characterized in that: per two adjacent contraposition scale spacings are between 0.1～100 micron.
8. display panels as claimed in claim 1, it is characterized in that: this conductive layer pattern comprises that also one is parallel to the contraposition reference of thin film transistor base plate near the fringe region on liquid crystal layer side surface, this contraposition reference is parallel to this contraposition and indicates setting, and these a plurality of contrapositions signs are symmetrically distributed in this contraposition reference both sides.
9. display panels as claimed in claim 1, it is characterized in that: this conductive layer pattern also comprises a plurality of contraposition reference that are parallel to thin film transistor base plate near the fringe region on liquid crystal layer side surface, this contraposition reference all indicates perpendicular to this contraposition and is provided with, and this a plurality of contraposition reference interval one determining deviation is evenly arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100607448A CN100498458C (en) | 2006-05-24 | 2006-05-24 | Liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100607448A CN100498458C (en) | 2006-05-24 | 2006-05-24 | Liquid crystal display panel |
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| CN101078832A CN101078832A (en) | 2007-11-28 |
| CN100498458C true CN100498458C (en) | 2009-06-10 |
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| CNB2006100607448A Active CN100498458C (en) | 2006-05-24 | 2006-05-24 | Liquid crystal display panel |
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| CN101881909A (en) * | 2010-06-29 | 2010-11-10 | 友达光电股份有限公司 | Display panel and manufacturing method thereof |
| TWI408468B (en) * | 2010-06-18 | 2013-09-11 | Au Optronics Corp | Display panel and manufactoring method thereof |
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| TWI408468B (en) * | 2010-06-18 | 2013-09-11 | Au Optronics Corp | Display panel and manufactoring method thereof |
| CN101881909A (en) * | 2010-06-29 | 2010-11-10 | 友达光电股份有限公司 | Display panel and manufacturing method thereof |
| CN101881909B (en) * | 2010-06-29 | 2012-09-05 | 友达光电股份有限公司 | Display panel and manufacturing method thereof |
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| CN101078832A (en) | 2007-11-28 |
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