CN100496131C - Viterbi decoding apparatus and method applicable to digital multimedia broadcast receiver - Google Patents
Viterbi decoding apparatus and method applicable to digital multimedia broadcast receiver Download PDFInfo
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- CN100496131C CN100496131C CNB2005100329607A CN200510032960A CN100496131C CN 100496131 C CN100496131 C CN 100496131C CN B2005100329607 A CNB2005100329607 A CN B2005100329607A CN 200510032960 A CN200510032960 A CN 200510032960A CN 100496131 C CN100496131 C CN 100496131C
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Abstract
This invention relates to digital multi-media broadcasting viterbi coding device and method, which compensates digital multi-media broadcasting sending error and receives rolled coding data and enters branch by different status at rack to pick out minimum path as existence path to process inverse tracing and coding. The invention viterbi device comprises the following parts: single terminal memory for data reading and writing; controller to trace and read above written data through single terminal on above roller coding process to send data into single terminal memory; multiple buffer to temporarily store.
Description
(1) technical field
The present invention is the technology of relevant DMB (DMB) receiver, especially repairs the Viterbi decoding device of required a kind of digital broadcast receiver in multimedia and the technology of method thereof about being installed in the transmission error.
(2) background technology
Recently, the digitlization of broadcast world brings great influence for the analog radio broadcast world, thereby has promoted the arrival in advance of digital radio broadcasting.
In addition, the existing voice wireless radio service that also promoted development
And comprise that data transmit and the DMB (Digital Multimedia Broadcasting: hereinafter to be referred as DMB) of multimedia service.At this, DMB can effectively solve noise and the misinformation phenomenon that transmits channel, and can improve the transmission efficiency of data, and diversified multimedia service can also be provided.
It is the using priciple of the Eureka-147 digital radio broadcasting (DAB) that standard was adopted that the DMB (DMB) that Korea S adopts is followed with European surface wave radio.
In order to improve the performance of DAB multimedia broadcasting, append to be provided with in its device and can reduce RS sign indicating number (Reed-Solomon Code) and the convolutional deinterleaver (Convolutional Interleaver) that transmits the interval error (Burst error) in the channel.
Above-mentioned two modules of appending setting act on DAB composite module unit (Ensemble) input signal in the sender unit, and the error rate of its reduction is enough to provide Video service in the movable signal reception environment.
The transmission channel of above-mentioned DMB broadcasting is as wireless movable signal receiving channels, the size of its received signal (Amplitude) can change (Time-varying) by time of origin, and be subjected to the influence of mobile receiver, also can cause Doppler's diffusion (Doppler Spreading) phenomenon of received signal spectrum (Spectrum).
In addition, DMB transmits signal and compares with existing analog radio broadcast singal, will outwards transmit with minimum signal strength signal intensity.At this moment, if in serious disturbance such as city center (Fading) channel environment, desire received signal by Move tools such as automobiles, the signal strength signal intensity of actual reception is very little so.
Therefore, the DMB receiver should be in above-mentioned this faint signal receiving circumstance, a large amount of as much as possible received signals, and carry out enough compensation to transmitting error.
In addition, consider the characteristics of movable signal receiving terminal machine, should be under the prerequisite of dwindling the expense expenditure to greatest extent, given play to maximum signal receiving performance, and consider the problems such as capacity of battery, also should reduce the driving electric weight of total system significantly, this is the core condition of DMB receiver architecture.
(3) summary of the invention
The present invention is in order to solve the above-mentioned problems in the prior art, a kind of Viterbi decoding device and method thereof that is provided with the efficient code translator digital broadcast receiver in multimedia of viterbi decoder in compensation transmits the required DMB receiver of error to be provided.
Another object of the present invention provides a kind of Viterbi decoding device and method thereof of digital broadcast receiver in multimedia of amount capable of reducing power consumption.
To achieve these goals, the Viterbi decoding device of digital broadcast receiver in multimedia of the present invention is made up of following structure: promptly, for receiving the data of being handled by convolutional encoding, and the branch that on grid, enters with different conditions, choose minimum path jumping figure as survival route, and to its reverse tracking and decipher processing, and be provided with the single port memory of a data read-write with port; By above-mentioned single-port, write in the single port memory by the data that send after the convolutional encoding processing above-mentioned, and by above-mentioned single-port, reverse tracking is also read the above-mentioned controller that writes data; For reducing the data speed from memory, export, and preserve the required a plurality of buffers that append setting of data temporarily.
By above-mentioned single-port, should repeat the cycle that writes once, reads three secondary data.
The above-mentioned interior data of buffer of appending setting should be formed to write Inbound and reciprocal form.
In addition, the viterbi coding method of the digital broadcast receiver in multimedia among the present invention is made up of following several steps: promptly, for receiving the data of being handled by convolutional encoding, and the branch that on grid, enters with different conditions, choose minimum path jumping figure as survival route, and to its reverse tracking and decipher processing, and the above-mentioned data of being handled by convolutional encoding are write in the memory that has single-port; By above-mentioned single-port, reverse tracking is also read the above-mentioned data that write; Above-mentioned reading of data is saved in a plurality of buffers temporarily; Again the reverse data that read above-mentioned interim preservation.
In the present invention, reading the above-mentioned speed of data in the memory that has single-port that temporarily is kept at, should be to write 4 times of data speed.
In the present invention, the reverse speed that reads interim preservation data should be identical with the speed of system's pulse of whole DMB receiver.
Effect of the present invention:
As mentioned above, the Viterbi decoding device of digital broadcast receiver in multimedia receiver of the present invention and the viterbi decoder in the method thereof can efficiently use memory, and can reduce pulse frequency, thereby can significantly reduce the driving electric weight of total system.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is in the present invention, is provided with the overall structure module figure of the DMB receiving system of viterbi decoder.
Fig. 2 is in the present invention, the reverse tracking algorithm schematic drawing of the occupation mode of an indicating device.
When Fig. 3 is a single port memory in using the present invention, the correlation schematic diagram between memory addressing method and the pulse.
Fig. 4 a, 4b are indicating device modes of utilizing among the present invention, use the required memory of the reverse tracking algorithm of Viterbi and append the buffer sizes schematic diagram of setting:
Wherein, Fig. 4 a is a memory; Fig. 4 b is a buffer.
The symbol description of major part in the accompanying drawing:
1: antenna 2: tuner
3:AGC terminal 4:A/D transducer
5:I/Q distributor 6: transfer mode detector
7: signal Synchronization device 8:OFDM demodulator
9: the anti-interleaver 10 of frequency: channel divider 1
11:FIC decoder 12:FIC data decoder
13: anti-interleaver 14 of time: convolution decoder
15: energy descrambler 16: channel divider 2
17: audio/data decoder 18: the anti-interleaver of convolution
19:RS decoder 20: video decoder
(5) embodiment
Below with reference to accompanying drawings, the Viterbi decoding device of digital broadcast receiver in multimedia of the present invention and the embodiment of method thereof are elaborated.
Fig. 1 is in the present invention, is provided with the overall structure module figure of the DMB receiving system of viterbi decoder.
As shown in Figure 1, the DMB receiver among the present invention will receive the broadcast singal that transmits by antenna 1, and the broadcast singal that receives will be converted into logical (Pass-band) signal of band of intermediate frequency (Intermediate Frequency) by tuner 2.
The signal that carries out tuning processing by above-mentioned tuner 2, in order to keep certain size, the yield value that calculates according to the reference signal size will multiply each other in AGC (Automatic Gain Control) terminal 3, and in A/D (Analog-Digital Converter) module 4, to above-mentioned a certain size signal take a sample (Sampling) handle, to convert thereof into digital signal.The above-mentioned digital signal that is converted is by I/Q distributor 5, and the real part (Real Part) of composite signal (Complex Signal) is reverted to composite signal.
At this moment; transfer mode detector 6 is for obtaining frame synchronization and OFDM symbol sync signal accurately; the transfer mode of received signal will be detected; and in ofdm demodulator 8; to remove unnecessary protection interval (Guard Interval); and, the conversion of signals in time field is become the signal of frequency field by FFT (Fast Fourier Transform).The input and output signal of above-mentioned ofdm demodulator 8 will be transformed into the input signal of signal Synchronization device 7, and in signal Synchronization device 7, with the synchronous required information that is extracted in time/frequency field.
The above-mentioned signal of frequency field that is converted into is by the anti-interleaver of frequency (De-interleaver) 9, the location restore of subcarrier (Sub-carrier) signal of processing (Inter leaving) of will reporting to the leadship after accomplishing a task in signal sending end becomes original state, and these signals that are resumed into original state will be by channel divider 1 (10), to be separated into FIC (the Fast Information Channel) channel of control channel and the MSC (MainService Channel) of data channel, and outwards output respectively.
Above-mentioned FIC channel will be imported in the FIC decoder 11, and the required information of descrambling MSC channel is carried out scramble process, and by other those data (routine transport information etc.) that the FIC channel transmits, will be carried out scramble process by FIC data decoder 12.
Above-mentioned MSC channel is by anti-interleaver 13 of time, 16 logical frame (Logical Frame) handled of will reporting to the leadship after accomplishing a task in sender unit revert to original frame sequential, and the above-mentioned MSC channel of handling of being reported to the leadship after accomplishing a task will be repaired the error that takes place in transmitting by repairing the required convolution decoder (Convolutional decoder) 14 of contingent random error (Random error) in the transmission.
Above-mentioned data of being repaired by error will be by energy descrambler 15, so that for encryption is reverted to original data by the data of scramble, and be imported in the channel divider 2 (16).
In above-mentioned channel divider 2 (16), the MSC data channel of above-mentioned transmission is divided into required audio/data signal of DAB service and the required vision signal of DMB service, and exports above-mentioned two kinds of signals respectively.The required audio/data of above-mentioned DAB service will be carried out scramble process by being audio/data decoder 17, and outwards export with the audio/data signal.
The required signal of above-mentioned DMB service passes through the anti-interleaver 18 of convolution again, to append the data that the sexual intercourse difference handles at signal sending end and revert to original order, and by RS decoder 19, the data that will carry out RS coding (Encoding) processing in signal sending end revert to original state.
The above-mentioned data that revert to original state will revert to vision signal and outwards output by video decoder 20.
In the DMB receiver architecture that drives according to aforesaid way, repair the required convolution decoder 14 of random error, will be at signal sending end, to carrying out the convolution scramble process between the data of current input and the input data of preserving in the past, and improve correlation between the data be arranged in order, in order to using aforesaid way, get rid of error at signal receiving end.
The type of drive of representative meaning of above-mentioned convolution decoder 14 is Viterbi decoding algorithms.
Above-mentioned viterbi algorithm is branch jumping figure (branch metric) and path jumping figure (pathmetric), be used for the grid (trellis) of shows signal transmitting terminal and the signal that receives between the yardstick of gap takes place.
Above-mentioned branch jumping figure will be calculated by hamming distance (Hamming distance) or Euclidean distance (Euclidian distance) according to channel model, and the path jumping figure is then calculated by branch jumping figure sum.
In the branch that above-mentioned viterbi algorithm will enter with different conditions, select minimum path jumping figure on grid, and add the branch jumping figure of this state, generating new path jumping figure, and preserve the information of this moment.The path definition that will have an above-mentioned minimal path jumping figure is the path for survival, and after through certain hour (T:Truncation depth), at the reverse tracking of current time axle (trace back) survival route, determines decoding output with this.
At this, the method for utilization viterbi algorithm has register exchange (registerexchange) method and reverse tracking (trace back) method.
Wherein, the switching method of above-mentioned register is for having given play to driveability faster, need append memory and hardware are set, therefore the power consumption of drive system is very big, though and the system drive electric weight of reverse tracking is less, but by scramble process, need certain delay time up to initial value.
In view of the above, the present invention is under the prerequisite based on low electric weight, constitutes total system, and adopts the mode of reverse tracking, and uses viterbi decoder.
Fig. 2 is in the present invention, the reverse tracking algorithm schematic drawing of the occupation mode of an indicating device.The time point that an above-mentioned indicating device (One-pointer) mode will write (write) and read (read) is regarded indicating device (pointer) separately respectively as, is the algorithm that can effectively carry out reverse tracking.
As shown in Figure 2, utilize the mode of reverse tracking to search the viterbi coding method employing memory of survival route, and need write (write) part and read (read) part.
That is to say that the Bank0 among Fig. 2, Bank1, Bank2, Bank3 are meant memory module, their size all equates, and the T among Fig. 2 is meant and blocks the degree of depth (Truncation depth).Wherein, " tb " is meant the interval of reverse tracking (trace back), and " dc " is meant decision (decision) interval, and " wr " is meant and writes (write) module.
In order to obtain correct decoding value, the distance that should reverse tracking be equivalent to block the degree of depth (Truncation depth), and " tb " " dc " module section is the part that reads driving.
At this, in the reverse tracking algorithm of an indicating device mode, write indicator (writepointer) and reading pointer (read pointer) should drive simultaneously.Wherein, the actuating speed of reading pointer should be 3 times of write indicator actuating speed.
This is in order to ensure in memory, avoids write indicator and reading pointer to clash, and handles out value accurately with decoding.
In the present invention, when utilizing indicating device algorithm of actual hardware utilization, be not to use to write inbound port (write port) and two ports of read port (read port), and be to use a port.
That is to say that in order to reduce power consumption, and effectively use the memory addressing method, it not is the single port memory (single port memory) of dual-ported memory (dual port memory) that the present invention adopts.
In order to use single port memory, the pulse of access in memory (access) also should be used one.At this moment, the gaps between their growth rates during for the prompting read-write are equivalent to use 4 times pulse of data pulse.
Below with reference to accompanying drawings above-mentioned relation is elaborated.
When Fig. 3 is a single port memory in using the present invention, the correlation schematic diagram between memory addressing method and the pulse.
As shown in Figure 3, write address (write address) along with data pulse increases (0,1,2,3), read address (read address) then with the access pulse of memory reduce (2T-1,2T-2,2T-3).
In addition, in order after writing once, to read three times, can to write (write_enb) signal and can read (read_enable) signal and adjust, so that only also can arbitrarily drive with single port memory according to the mode of Fig. 3.Above-mentioned this driving relationship will be finished by the control of the controller (not shown) in the viterbi decoder.
When utilizing an indicating device algorithm to carry out reverse tracking, will carry out reverse tracking by opposite direction, and decipher processing with the method, therefore the value of output also will be the backward value of memory bank (memory bank) unit.
At this,, append in the memory bank of T/2 in needing buffer is set in order to obtain the output valve of correct order.At this moment, be input to the value in the buffer that appends setting, be equivalent to the value of reading speed (4 times of pulses), in order to prevent to be input to the phenomenon that (overwrite) appears overriding in value in the buffer, the speed of buffer output valve should equate with the speed of reading speed.
But when adopting the DMB receiver, in anti-demodulation (demodulation) module behind channel divider 1 (10), transmit I, Q value respectively, will transmit data with the twice pulse of original receiver pulse, and be input in the viterbi decoder with the speed of twice pulse.
In view of the above in viterbi decoder, for carrying out the reverse tracking of an indicating device mode, with the impulse speed of 8 times of speed adopting 4 times of speed and 2 times of speed to multiply each other.
At this, be input to the phenomenon that (overwrite) appears overriding in data in the buffer for preventing speed with 8 times of speed, the output speed of buffer also should adopt the 8 times speed identical with the input speed of buffer.
But adopt high-frequency impulse will increase power consumption, therefore,, so also can fully finish system drive adopting original system's pulse from the rear end of viterbi decoder.At this moment,, should adopt the pulse of 8 times of speed, and be the output of buffer, then should adopt the pulse of 1 times of speed for the input of buffer.
For this reason, the buffer sizes of appending setting should be 8 times of memory bank size, will be elaborated in accompanying drawing 4 to this.
Fig. 4 a, Fig. 4 b are indicating device modes of utilizing among the present invention, use the required memory of the reverse tracking algorithm of Viterbi and append the buffer sizes schematic diagram of setting, and wherein Fig. 4 a is a memory; Fig. 4 b is a buffer.
As shown in Figure 4, above-mentioned single port memory is according to the algorithm of an indicating device (One-pointer), need be equivalent to the memory of (2T* state (state) number), and the buffer sizes of appending setting is equivalent to the size of (T/2*1*8).
That is to say, should append 0～7 these 8 buffers are set that the FIL0 (First Input Least Output) that the data that enter at first will be fulfiled last output drives.
Above-mentioned driving process of appending the buffer of setting is, with the pulse of 8 times of speed, writes the end value of carrying out reverse tracking since No. 0 in first buffer at first, and first buffer write full after, write for No. 0 that continues since second buffer.
Last T/2 of above-mentioned first buffer write full after, during since No. 0 value of writing of second buffer, if from last T/2 of first buffer reverse read value, just can obtain the Viterbi end value of correct decoding processing.
Those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.
Claims (5)
1, a kind of Viterbi decoding device of digital broadcast receiver in multimedia, described Viterbi decoding device is for compensating the transmission error of described digital broadcast receiver in multimedia, the data that reception is handled by convolutional encoding, and the branch that on grid, enters with different conditions, choose minimum path jumping figure as survival route, and, it is characterized in that forming by following structure to its reverse tracking and the viterbi decoder of deciphering processing:
Be provided with the single port memory of a data read-write with port;
By described single-port, write in the described single port memory by the data that send after the convolutional encoding processing described, and by described single-port, reverse tracking is also read the described controller that writes data;
For reducing the data speed from described single port memory, export, and preserve a plurality of buffers that append setting of data temporarily.
2, the Viterbi decoding device of digital broadcast receiver in multimedia as claimed in claim 1 is characterized in that:
The cycle that repeats to write once, reads three secondary data by described single-port.
3, a kind ofly use the viterbi coding method that device as claimed in claim 1 carries out digital broadcast receiver in multimedia, it is characterized in that forming by following several steps:
For receiving the data of being handled by convolutional encoding, and the branch that on grid, enters with different conditions, choose minimum path jumping figure as survival route, and to its reverse tracking and decipher processing, and the above-mentioned data of being handled by convolutional encoding are write in the memory that has single-port;
By above-mentioned single-port, reverse tracking is also read the above-mentioned data that write;
Above-mentioned reading of data is saved in a plurality of buffers temporarily;
Again the reverse data that read above-mentioned interim preservation.
4, the viterbi coding method of digital broadcast receiver in multimedia as claimed in claim 3 is characterized in that:
The described speed that reads data in the memory that has a port is 4 times of writing speed.
5, the viterbi coding method of digital broadcast receiver in multimedia as claimed in claim 3 is characterized in that:
The described reverse speed that reads interim preservation data is identical with the speed of overall digital broadcast receiver in multimedia system pulse.
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| CNB2005100329607A CN100496131C (en) | 2005-01-21 | 2005-01-21 | Viterbi decoding apparatus and method applicable to digital multimedia broadcast receiver |
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| CNB2005100329607A CN100496131C (en) | 2005-01-21 | 2005-01-21 | Viterbi decoding apparatus and method applicable to digital multimedia broadcast receiver |
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| CN100496131C true CN100496131C (en) | 2009-06-03 |
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