CN100487465C - Segmenting detecting method for pattern domain of Duffing vibrator phase diagram - Google Patents

Abstract

The present invention provides an image area cutting method of the Duffing vibration generator phase map. 1. Selecting a typical Duffing vibration generator normalized equation. 2. Inserting an A/D converter in front of the typical Duffing vibration generator, inserting an area cutter in back. 3. Inputting the signals having noise to be detected into the A/D converter. 4. A quarter to a tenth of a circle of the signals to be detected is used as the converting circle of the A/D converter and is used together with a Duffing vibration generator equation to figure out the step length. 5. The result is calculated out by the Duffing vibration generator by using a fourth order Runge-Kutta algorithm and is sent to the area cutter. 6. The result is judged by the area cutter which then outputs the detected signals carrying the information of the data to be detected. In the present invention the identifying problem of two-dimensional chaos vibration generator phase map is transformed into a problem of one-dimensional detecting, and the problem that the phase map analyzing method can not be directly used for detecting the communication signals currently is solved.

Description

Detection method is cut apart in Duffing oscillator phasor pattern territory

(1) technical field

The present invention relates to a kind of recognition methods of chaotic oscillator phasor, detection technique is cut apart in the territory that particularly relates to a kind of separate information.

(2) background technology

At present, the known method that detects feeble signal with chaotic oscillator, all realize promptly whether present large scale periodic orbit phenomenon (or intermittent chaos phenomenon) or chaos phenomenon is judged having or not of signal to be checked with the observation chaotic oscillator with the phase transformation state of analyzing chaotic oscillator.

Up to now, the main method of researching and proposing both at home and abroad has: Phase Diagram Analysis method, Lyapunov exponent method, Poincare method of section, power spectrum method, non-integer dimension analytic approach, Melnikov function method etc.

Because it is few to be fit to the chaos system of analytical analysis, so the Phase Diagram Analysis method is subjected to general attention, this also comes from it and has better universality and simple and direct advantage, particularly when distinguishing large scale periodic orbit phenomenon that the Duffing oscillator presents or chaos phenomenon, it almost becomes current a kind of indispensable analysis means.

But, the Phase Diagram Analysis method needs the chaotic oscillator phase path figure that is presented on the waveform instrument with visual inspection to judge, so there is the not high problem of recognition efficiency, in addition, also there is the problem that can't discern in the situation that the phase chart-pattern is switched in time fast, therefore, phasor feature how to discern chaos system automatically is a hot issue of current people's concern.

Document " based on the chaotic characteristic method of discrimination of image recognition theory " (Li Shilin, Yin Chengqun, Shang Qiufeng, Qi Yincheng. based on the chaotic characteristic method of discrimination [J] of image recognition theory. Proceedings of the CSEE, 2003,23 (10): 47-50.) once proposed a kind of chaotic characteristic method of discrimination, and attempted to address the above problem based on the image recognition theory.But because of it needs that long phase path data sample guarantees that algorithm is not dispersed and must could begin to resolve behind the complete phase path data sample obtaining, so existence can't provide the shortcoming of process information in real time.In addition, it is still complicated to calculate Euler's numbers from the image topological characteristic, does not also jump out the theoretical frame that two dimensional image is handled on the principle.Therefore, really do not solve the problem that the Phase Diagram Analysis method faces, the problem that is faced when for example being used for detecting signal of communication in real time.

(3) summary of the invention

The object of the present invention is to provide and a kind ofly can be converted into the Duffing oscillator phasor pattern territory that one-dimensional signal detects problem to 2 D chaotic oscillator phasor identification problem and cut apart detection method.

The object of the present invention is achieved like this:

1, detection method is cut apart in a kind of Duffing oscillator phasor pattern territory:

1.1 select the typical Duffing oscillator of one of following feature of normalization equation tool:

$\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y+{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3=\mathrm{\&gamma;}\cos \left(t\right)+x\left(t\right)$

Or $\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3+[1+x\left(t\right)]y^5=\mathrm{\&gamma;}\sin \left(t\right)$

1.2 insert an analog-digital converter in typical Duffing oscillator front, insert a Region Segmentation device in same typical Duffing oscillator back, the Region Segmentation line selection of Region Segmentation device is taken as square or circular, and the equation that is taken as the Region Segmentation device when square when the Region Segmentation line selection is: $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{ccc}+1,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|<1,& \left|y_2\right|<1\\ -1\mathrm{or}0,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|\&GreaterEqual;1,& \left|y_2\right|\&GreaterEqual;1\end{array}\right.,$ The equation of the Region Segmentation device when the Region Segmentation line selection is taken as circle is: $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{cc}+1,& {\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1^2+y_2^2<1\\ -1\mathrm{or}0,& {\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1^2+y_2^2\&GreaterEqual;1\end{array}\right.;$

Give analog-digital converter 1.3 import noisy signal to be checked;

1.4 with 4～10/one-period of signal to be checked step-length of resolving as change-over period of analog-digital converter and Duffing oscillator equation;

1.5 send into digitized signals and associated noises after analog-digital converter is handled in the Duffing oscillator as disturbance quantity, adopt the quadravalence Runge-Kutta algorithm to resolve to the Duffing oscillator, it is identical with the change over clock cycle of analog-digital converter to resolve step-length, and operation result is given the Region Segmentation device in real time with the form of phase path horizontal stroke, ordinate component;

1.6 the Region Segmentation device is adjudicated in real time to the phase mark point that whether has comprised the Duffing oscillator in the separatrix, territory, and provides court verdict and export the detecting signal that carries signal message to be checked with the form of one dimension time signal.

2, checkout equipment is cut apart in a kind of Duffing oscillator phasor pattern territory, it comprises difference amplifying unit U1, analog-to-digital conversion unit U2, rearmounted dispensing unit U3, intelligent processing unit U4 and clock source U5, difference amplifying unit U1 is electrically connected analog-to-digital conversion unit U2, analog-to-digital conversion unit U2, rearmounted dispensing unit U3 and clock source U5 are electrically connected intelligent processing unit U4, and intelligent processing unit U4 is connected the JTAG socket with rearmounted dispensing unit U3.

The present invention also has some technical characterictics like this:

1, the amplitude of described noisy signal to be checked be no more than ± 0.30～± 0.40V;

2, described intelligent processing unit U4 is FPGA or SoPC chip, and fpga chip is 40 ~ 4,000,000 a chip, and the SOPC chip is a Stratix II chip.

It is square or circular that key feature of the present invention is that the Region Segmentation line can adopt.Essence of the present invention is: utilize the phase mark characteristics of Duffing oscillator, phasor is divided into two special areas, then the Duffing oscillator phase mark point that falls into zones of different is done the one dimension mapping.The separatrix, territory is the mapping formation condition, can get with 2 be the limit square ( $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{ccc}+1,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|<1,& \left|y_2\right|<1\\ -1\mathrm{or}0,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|\&GreaterEqual;1,& \left|y_2\right|\&GreaterEqual;1\end{array}\right.$ ), also can get radius and be 1 circle ( $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{cc}+1,& {\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1^2+y_2^2<1\\ -1\mathrm{or}0,& {\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1^2+y_2^2\&GreaterEqual;1\end{array}\right.$ )。After the territory is divided, inner corresponding the chaotic orbit in separatrix, territory, mapping value gets+and 1; The separatrix, territory outside corresponding the large scale periodic orbit, mapping value gets-1 or 0.Mapping value can also be reversed and be chosen as required.

In conjunction with Fig. 1, the concrete course of work of the present invention and principle are: and the first step, amplitude be no more than ± and the signals and associated noises x (t) of 0.30V is converted into digital quantity via analog-digital converter, and switching rate is 4～10 times of signal frequency to be checked; Second the step, digitized x (t) is sent in the Duffing oscillator that resolves with the quadravalence Runge-Kutta algorithm as disturbance quantity, send into mode by $\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y+{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3=\mathrm{\&gamma;}\cos \left(t\right)+x\left(t\right)$ Or $\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3+[1+x\left(t\right)]y^5=\mathrm{\&gamma;}\sin \left(t\right)$ Determine that it is identical with the change over clock cycle of ADC to resolve step-length, operation result is given the Region Segmentation device in real time with the form of phase path horizontal stroke, ordinate component; In the 3rd step, the Region Segmentation device is adjudicated in real time to the phase mark point that whether has comprised the Duffing oscillator in the separatrix, territory, and provides court verdict with the form of one dimension time signal.

Because the present invention can provide the one dimension time-domain signal of direct reflection Duffing oscillator large scale periodic orbit and chaotic orbit information rapidly and accurately, therefore, just can reach the purpose of automatic identification chaos system two dimension phasor feature.

Beneficial effect of the present invention is:

1. can thoroughly solve at present and can't be directly used in the problem that detects signal of communication to the Phase Diagram Analysis method.The reason that existing Phase Diagram Analysis method is not suitable for detecting signal of communication is that the entrained information of signal of communication can make the phasor pattern of chaotic oscillator change in time, this can make the different phasor of state originally in time passing and overlap, increase difficulty and make real-time difficult treatment so can give artificial observation or discern the phasor state based on the two dimensional image treatment theory, and the present invention directly is mapped as the one dimension time signal fast to the two-dimentional phasor pattern of chaotic oscillator, this just makes follow-up signal handle and becomes more simple and convenient, therefore is particularly suitable for detecting the application scenario of signal of communication.Fig. 2-4 can provide explanation further to above-mentioned effect.

Among Fig. 2-4, the information that s (t) carries for signal of communication; As s (t) when changing in time, Fig. 2 and Fig. 3 are with overlapping.

2. provided a kind of new departure that can discern Duffing oscillator two dimension phasor feature in real time automatically theoretically.The present invention points out that rectangular lines and round wire can be used as the separatrix, territory of cutting apart Duffing oscillator phasor, and this has actual engineering directive significance to making up concrete Region Segmentation utensil.

(4) description of drawings

Fig. 1 is a hardware interconnection theory diagram of the present invention;

Fig. 2-the 4th, main waveform graph of a relation of the present invention;

Fig. 2 is large scale periodic orbit waveform relationship figure;

Fig. 3 is chaotic orbit waveform relationship figure;

Fig. 4 is the signal output waveform graph of a relation of Region Segmentation device;

Fig. 5 is the electrical schematic diagram of embodiments of the invention.

(5) embodiment

Below in conjunction with the drawings and specific embodiments the present invention is described in further detail:

In conjunction with Fig. 1, the concrete steps of present embodiment are:

1. select the typical Duffing oscillator of one of following feature of normalization equation tool:

$\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y+{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3=\mathrm{\&gamma;}\cos \left(t\right)+x\left(t\right)$

Or $\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3+[1+x\left(t\right)]y^5=\mathrm{\&gamma;}\sin \left(t\right)$

2. insert an analog-digital converter in typical Duffing oscillator front, insert a Region Segmentation device in the back.

3. import noisy signal x to be checked (t) and give analog-digital converter, x (t)=s (t)+n (t) is the signal noisy to be checked of input, and s (t) is an input signal, and n (t) is a noise signal;

4. with 4～10/one-period of signal s to be checked (t) step-length of resolving as change-over period of analog-digital converter and Duffing oscillator equation;

5. send into digitized noisy signal x to be checked (t) after analog-digital converter is handled in the Duffing oscillator as disturbance quantity, adopt the quadravalence Runge-Kutta algorithm to resolve to the Duffing oscillator, it is identical with the change over clock cycle of analog-digital converter ADC to resolve step-length, and operation result is given the Region Segmentation device in real time with the form of phase path horizontal stroke, ordinate component;

6. the Region Segmentation device is adjudicated in real time to the phase mark point that whether has comprised the Duffing oscillator in the separatrix, territory, and provides court verdict and the detecting signal s (t) of signal s to be checked (t) information is carried in output with the form of one dimension time signal.

The concrete parameter that present embodiment adopts is:

1. noisy signal x to be checked (t) is noisy signal of communication, and the amplitude peak-to-peak value is not more than ± 0.35V.

2. analog-digital converter A/D change over clock is 30MHz.

3. communication signal carrier frequency to be checked is 3MHz, and the rate of information throughput is 25kHz, and modulation system is BPSK.

4.Duffing vibrator model is

$\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y+{\mathrm{<figure-callout\; id="3"\; label="y"\; filenames="C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}^3=\mathrm{\&gamma;}\cos \left(t\right)+x\left(t\right).$

5.Duffing oscillator resolves the employing fourth-order Runge-Kutta method.

6. the area detector model is

$\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{ccc}+1,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|<1,& \left|y_2\right|<1\\ -1,& \left|{\mathrm{<figure-callout\; id="1"\; label="y"\; filenames="C200710071895E00084.png,C200710071895E00091.png"\; state="\{\{state\}\}">y</figure-callout>}}_1\right|\&GreaterEqual;1,& \left|y_2\right|\&GreaterEqual;1\end{array}\right.$

7. output signal s (t) is for having the digital signal of Transistor-Transistor Logic level.

In conjunction with Fig. 5 and Fig. 6, the present embodiment checkout equipment is made of jointly difference amplifying unit U1, analog-to-digital conversion unit U2, rearmounted dispensing unit U3, intelligent processing unit U4 and clock source U5.

Difference amplifying unit U1 is responsible for an input signal x (t) and is converted to differential signal; Analog-to-digital conversion unit U2 is responsible for a simulating signal x (t) and is converted to 14 binary digital signal, and change over clock is provided by intelligent processing unit U4, and frequency is determined according to signal to be checked; Rearmounted dispensing unit U3 is responsible for intelligent processing unit U4 rearmounted configuration is provided, and the JTAG mode is used in software download; Intelligent processing unit U4 is FPGA or SoPC chip, intelligent processing unit U4 is that FPGA or SoPC chip fpga chip are 40～4,000,000 chip, the SOPC chip is a Stratix II chip, intelligent processing unit U4 is responsible for realizing Duffing oscillator and area detector model, and algorithm realizes adopting VHDL language and the embedded assembly language of μ/COSII; Clock source U5 is responsible for intelligent processing unit U4 system clock is provided.

More than be described as a kind of embodiment of the present invention, can carry out respective change according to technical scheme of the present invention.

Claims (2)

1, detection method is cut apart in a kind of Duffing oscillator phasor pattern territory, it is characterized in that:

1.1 select the typical Duffing oscillator of one of following feature of normalization equation tool:

$\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y+y^3=\mathrm{\&gamma;}\cos \left(t\right)+x\left(t\right)$

Or $\frac{d^{2}y}{{\mathrm{dt}}^2}+\mathrm{\&delta;}\frac{\mathrm{dy}}{\mathrm{dt}}-y^3+[1+x\left(t\right)]y^5=\mathrm{\&gamma;}\sin \left(t\right)$

1.2 insert an analog-digital converter in typical Duffing oscillator front, insert a Region Segmentation device in same typical Duffing oscillator back, the Region Segmentation line selection of Region Segmentation device is taken as square or circular, and the equation that is taken as the Region Segmentation device when square when the Region Segmentation line selection is: $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{ccc}+1,& \left|y_1\right|<1,& \left|y_2\right|<1\\ -1\mathrm{or}0,& \left|y_1\right|\&GreaterEqual;1,& \left|y_2\right|\&GreaterEqual;1\end{array}\right.,$ The equation of the Region Segmentation device when the Region Segmentation line selection is taken as circle is: $\stackrel{\&OverBar;}{y}\left(t\right)=\left\{\begin{array}{cc}+1,& y_1^2+y_2^2<1\\ -1\mathrm{or}0,& y_1^2+y_2^2\&GreaterEqual;1\end{array}\right.;$

Give analog-digital converter 1.3 import noisy signal to be checked;

1.4 with 4～10/one-period of signal to be checked step-length of resolving as change-over period of analog-digital converter and Duffing oscillator equation;

1.5 send into digitized signals and associated noises after analog-digital converter is handled in the Duffing oscillator as disturbance quantity, adopt the quadravalence Runge-Kutta algorithm to resolve to the Duffing oscillator, it is identical with the change over clock cycle of analog-digital converter to resolve step-length, and operation result is given the Region Segmentation device in real time with the form of phase path horizontal stroke, ordinate component;

1.6 the Region Segmentation device is adjudicated in real time to the phase mark point that whether has comprised the Duffing oscillator in the separatrix, territory, and provides court verdict and export the detecting signal that carries signal message to be checked with the form of one dimension time signal.

2, detection method is cut apart in Duffing oscillator phasor pattern according to claim 1 territory, it is characterized in that: the amplitude of described noisy signal to be checked is no more than ± 0.30～± 0.40V.

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