CN100476758C - Data storage realizing method based on NOR FLASH chip - Google Patents

Data storage realizing method based on NOR FLASH chip Download PDF

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Publication number
CN100476758C
CN100476758C CNB2007101202392A CN200710120239A CN100476758C CN 100476758 C CN100476758 C CN 100476758C CN B2007101202392 A CNB2007101202392 A CN B2007101202392A CN 200710120239 A CN200710120239 A CN 200710120239A CN 100476758 C CN100476758 C CN 100476758C
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flash
write
piece
data
flash chip
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CNB2007101202392A
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Chinese (zh)
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CN101118517A (en
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孙建明
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Beijing Jiaxun Feihong Electrical Co Ltd
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Beijing Jiaxun Feihong Electrical Co Ltd
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Abstract

The present invention discloses a data memory realizing method based on the NOR FLASH CMOS chip, and belongs to the FLASH memory technology field. The method is that by creating a FLASH block table and a stored data mapping table, and marking the FLASH block which needs being written in, the modified data can be written in the FLASH regularly. The present invention reduces the erasure of the NOR FLASH and the times of the writing in operation, improves the date storing efficiency on the NOR FLASH CMOS chip; improves the safety and the reliability of data storing, and prolongs the service life of the NOR FLASH CMOS chip.

Description

A kind of data storage implementation method based on NOR FLASH chip
Technical field
The present invention relates to the FLASH technical field of memory, relate in particular to a kind of data storage implementation method based on NOR FLASH chip.
Background technology
Along with development of electronic technology, NOR FLASH chip has obtained application more and more widely as a kind of storer in embedded system.Advantages such as NOR FLASH chip has the reliability height, volume is little, density is big, can wipe, can rewrite.Therefore in embedded system device, NOR FLASH is mainly used in the working procedure of storage system and ensures the configuration data of program reliable operation.
The NORFLASH chip can be read and write and erase operation, is that unit writes usually with the word, is that unit is wiped with the piece; Before carrying out write operation, must carry out erase operation earlier.
The shortcoming of NOR FLASH chip is that the number of times of wiping, writing is limited, therefore frequent wipes, write operation, is unfavorable for the long-term use of NOR FLASH chip.
Summary of the invention
Weak point in view of above-mentioned NOR FLASH chip, the purpose of this invention is to provide a kind of data storage implementation method based on the NORFLASH chip, the object of the present invention is achieved like this: by setting up FLASH piece table and internal storage data map section, the FLASH piece that mark need write, regularly the data that will revise write the FLASH chip, and performing step is as follows:
1) initialization of FLASH chip: set up FLASH piece table and internal storage data map section;
When 1. system power-up starts, detect employed FLASH chip type;
2. according to the block size and the number of blocks of FLASH chip, set up FLASH piece table;
3. every value in the FLASH piece table is set: block size and start address are set, wherein write sign and be changed to 0-and represent to need not to write; Bad block mark is changed to 0-and has represented piece;
4. be stored in the size of the data in the FLASH chip according to need, in Installed System Memory, set up the internal storage data map section of FLASH chip;
2) modification process of data: revise the data in the internal storage data map section, the FLASH piece that mark need write;
When 1. data are revised by system, the data of revising are kept at the internal storage data map section;
2. calculate and revise the side-play amount of data at the internal storage data map section;
3. according to side-play amount and the size of revising data, the FLASH piece that calculating need write;
4. writing of the FLASH piece that need write be set is masked as 1-and represents and need write;
3) ablation process of data: force to write the FLASH piece before the FLASH piece that system's timing scan need write, system restart;
1. after the system power-up startup finishes, start FLASH chip timing write operations device;
2. after FLASH chip timing write operations arrives, scanning FLASH piece table;
If 3. writing of FLASH piece is masked as 1,, calculate the address of the FLASH piece that need write data according to FLASH piece number;
4. wipe the FLASH piece that need write, write new data according to block size;
5. the writing of FLASH piece that has write be set be masked as 0;
6. after having scanned FLASH piece table, restart FLASH chip timing write operations device.
7. before system's execution restarts operation, force scanning FLASH piece table, the data that needs are write write the FLASH chip;
4) FLASH chip write error or when detecting the FLASH chip and makeing mistakes appears, automatically the bad piece in the flag F LASH chip:
When carrying out the write operation of FLASH chip, if mistake, or detect the FLASH chip and make mistakes, this FLASH piece of mark is a bad piece, and bad block mark is set to 1.
Described FLASH piece table comprises piece number, block size, start address, writes sign and bad block mark.
Data in described internal storage data map section and the FLASH chip have one-to-one relationship.
Beneficial effect of the present invention: can be learnt that by such scheme the present invention is by setting up FLASH piece table, the data block that mark need write has reduced the wiping of NOR FLASH, write operation number of times, effectively raises the efficient that NOR FLASH chip is preserved data; Write by bad piece of mark and timing, improved the security and the reliability of data storage, also prolonged the serviceable life of NOR FLASH chip.
Description of drawings
Fig. 1 is a FLASH piece list structure synoptic diagram;
Fig. 2 is the FLASH initialization flowchart;
Fig. 3 is the data modification process flow diagram;
Fig. 4 regularly writes process flow diagram for data.
Embodiment
The invention provides a kind of data storage implementation method based on NOR FLASH chip.Concrete steps are described below in conjunction with Fig. 2, Fig. 3, Fig. 4:
A) initialization procedure of FLASH chip: (as shown in Figure 2)
When (1) system power-up starts, detect employed FLASH chip type;
(2), set up FLASH piece table, as Fig. 1 according to the block size and the number of blocks of FLASH chip;
(3) every value in the FLASH piece table is set: block size and start address are set, write sign and be changed to 0 (expression need not to write), bad block mark was changed to for 0 (having represented piece);
(4) be stored in the size of the data in the FLASH chip according to need, in Installed System Memory, set up the internal storage data map section of FLASH chip.
B) modification process of data: (as shown in Figure 3)
When (1) data are revised by system, the data of revising are kept at the internal storage data map section;
(2) calculate the side-play amount of modification data at the internal storage data map section;
(3) according to side-play amount and the size of revising data, the FLASH piece that calculating need write;
(4) the writing of FLASH piece that need write is set and is masked as 1 (expression need write).
C) ablation process of data: (as shown in Figure 4)
(1) system power-up start finish after, start FLASH chip timing write operations device (occurrence can according to the operating position setting of system);
(2) after FLASH chip timing write operations arrives, scanning FLASH piece table;
(3),, calculate the address of the FLASH piece that need write data according to FLASH piece number if writing of FLASH piece is masked as 1;
(4) wipe the FLASH piece that need write, write new data according to block size;
(5) the writing of FLASH piece that has write is set and is masked as 0;
(6) scanned FLASH piece table after, restart FLASH chip timing write operations device.
(7) before system's execution restarts operation, force scanning FLASH piece table, the data that needs are write write the FLASH chip.
D) when carrying out the write operation of FLASH chip, if mistake, or detect the FLASH chip and make mistakes, this FLASH piece of mark is a bad piece, and bad block mark is set to 1.
By the complete explanation of the foregoing description based on the implementation method of the data storage of NOR FLASH chip.The above is preferred embodiment of the present invention only, is not limited to the present invention, and is within the spirit and principles in the present invention all, any modification of being made, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (3)

1. the data storage implementation method based on NOR FLASH chip is characterized in that, by setting up FLASH piece table and internal storage data map section, and the FLASH piece that mark need write, regularly the data that will revise write the FLASH chip, and performing step is as follows:
1) initialization of FLASH chip: set up FLASH piece table and internal storage data map section;
When 1. system power-up starts, detect employed FLASH chip type;
2. according to the block size and the number of blocks of FLASH chip, set up FLASH piece table;
3. every value in the FLASH piece table is set: block size and start address are set, wherein write sign and be changed to 0-and represent to need not to write; Bad block mark is changed to 0-and has represented piece;
4. be stored in the size of the data in the FLASH chip according to need, in Installed System Memory, set up the internal storage data map section of FLASH chip;
2) modification process of data: revise the data in the internal storage data map section, the FLASH piece that mark need write;
When 1. data are revised by system, the data of revising are kept at the internal storage data map section;
2. calculate and revise the side-play amount of data at the internal storage data map section;
3. according to side-play amount and the size of revising data, the FLASH piece that calculating need write;
4. writing of the FLASH piece that need write be set is masked as 1-and represents and need write;
3) ablation process of data: force to write the FLASH piece before the FLASH piece that system's timing scan need write, system restart;
1. after the system power-up startup finishes, start FLASH chip timing write operations device;
2. after FLASH chip timing write operations arrives, scanning FLASH piece table;
If 3. writing of FLASH piece is masked as 1,, calculate the address of the FLASH piece that need write data according to FLASH piece number;
4. wipe the FLASH piece that need write, write new data according to block size;
5. the writing of FLASH piece that has write be set be masked as 0;
6. after having scanned FLASH piece table, restart FLASH chip timing write operations device.
7. before system's execution restarts operation, force scanning FLASH piece table, the data that needs are write write the FLASH chip;
4) FLASH chip write error or when detecting the FLASH chip and makeing mistakes appears, automatically the bad piece in the flag F LASH chip:
When carrying out the write operation of FLASH chip, if mistake, or detect the FLASH chip and make mistakes, this FLASH piece of mark is a bad piece, and bad block mark is set to 1.
2. a kind of data storage implementation method based on NOR FLASH chip according to claim 1 is characterized in that: described FLASH piece table comprises piece number, block size, start address, writes sign and bad block mark.
3. a kind of data storage implementation method based on NOR FLASH chip according to claim 1, it is characterized in that: the data in described internal storage data map section and the FLASH chip have one-to-one relationship.
CNB2007101202392A 2007-08-14 2007-08-14 Data storage realizing method based on NOR FLASH chip Expired - Fee Related CN100476758C (en)

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CN102609331A (en) * 2012-01-19 2012-07-25 苏州希图视鼎微电子有限公司 File format of loading code in NAND flash
CN104216791B (en) * 2013-05-30 2018-05-01 上海斐讯数据通信技术有限公司 A kind of method of verification Flash storages data
WO2015108995A1 (en) * 2014-01-17 2015-07-23 California Institute Of Technology Asymmetric error correction and flash-memory rewriting using polar codes
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CN104063186B (en) * 2014-06-30 2016-04-06 成都万维图新信息技术有限公司 A kind of data access method of electronic equipment

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