CN100463525C - Video frequency coding method and device capable of dynamic regulating computational complexity - Google Patents
Video frequency coding method and device capable of dynamic regulating computational complexity Download PDFInfo
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- CN100463525C CN100463525C CNB2006101551312A CN200610155131A CN100463525C CN 100463525 C CN100463525 C CN 100463525C CN B2006101551312 A CNB2006101551312 A CN B2006101551312A CN 200610155131 A CN200610155131 A CN 200610155131A CN 100463525 C CN100463525 C CN 100463525C
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Abstract
A video coding method being able to dynamically adjust complicated degree of calculation includes confirming calculation resource available to code a frame of image and measuring consumed calculation resource in coding current frame of image, comparing consumed calculation resource with high and low thresholds, decreasing complicated degree in coding residual macroblock if consumed calculation resource is greater than high threshold and increasing complicated degree in coding residual macroblock if said resource is less than low threshold as well as remaining complicated degree unchanged if said resource is between high and low thresholds.
Description
Technical field
The present invention relates to the Digital Video Processing technical field, be meant the method for video coding that a kind of computation complexity can dynamically adjust and the device of this method of employing specifically.
Background technology
Digital video technology is being widely applied to such as fields such as video broadcasting, video conference and video telephone, multimedia recreation and digital video monitorings.The process object of digital video technology is a video sequence, and video sequence by many continuously, the time goes up that the video pictures of being correlated with forms.The video sequence of uncompressed need take too many memory space or transmission bandwidth, with horizontal resolution be 720, vertical resolution is 576, frame per second is that the standard definition video sequence of 25 frame/seconds is an example, always has about 165 megabit data volumes its second.Under existing technical merit, directly store or transmit so that lot of data is unpractical, therefore must use the digital video coding technology that these original video sequences are compressed processing, and then packed data is stored or transmitted.
H.26X or MPEG-X series the video coding international standard of current main-stream is, a common feature of these coding standards is exactly that calculated performance to processor device has proposed very high requirement, and is particularly all the more so under high-resolution, high frame per second situation.In traditional method for video coding, the mode of operation of Video processing and process are constant.But along with the input video content change, the calculated load of Video processing also can correspondingly fluctuate, under the limited situation of encoder apparatus calculated performance, be easy to cause the situation of frame losing, and then influence the overall look and feel quality of video sequence because of the discontinuous of video pictures.
H.26X or MPEG-X series video coding standard all be based on the operation framework that time-domain and spatial domain are mixed, they in the enterprising DPCM operation of time-domain, on spatial domain, carry out piece DCT (discrete cosine transform or be similar to its integer transform) operation.Wherein DPCM operation is to reduce the temporal redundancy of video sequence by carry out estimation and motion compensation computing between frame and frame, and dct transform operation be by the video signal conversion on the spatial domain on frequency domain, signal energy is compressed, operate the spatial redundancies that reduces video pictures by follow-up QUANT (quantification) again, and DEQUANT (inverse quantization) and IDCT (inverse discrete cosine transform or be similar to its contrary integer transform) are carried out in the output after the QUANT operation operate, reconstruct image.Those skilled in the art knows that in the aforesaid operations process, estimation and DCT/QUANT/DEQUANT/IDCT computing are to consume encoder apparatus to handle the maximum operation of resource.So how the processing stock number that can provide according to encoder apparatus and the video sequence content to be encoded of input, dynamically adjust the complexity of aforesaid operations process, make and encoder apparatus encoded video sequence in real time become the problem that those skilled in the art are concerned about very much.
Application number is that 02826217.4 application for patent discloses a kind of dynamically method of control of video encoder complexity.It is according to the full level in the buffer area of the pending data flow of input, and by a predetermined encoder complexity allocation list, comes control of video calculation of coding load.In this encoder complexity allocation list, always have 8 options.Each option has all further been stipulated the coding method that encoder allows in frame operation rank, and every class coding method is subdivided into 3 kinds according to required computation complexity again.In these coding methods described in this application for patent, the dynamic control of computation complexity is all undertaken by the frame rank.But other control of frame level is unallowed in many application, itself does not just allow in some applications to occur such as the B frame coding method described in the complexity allocation list.And the control granularity of frame level sex control method is also too coarse, is not easy to realize the meticulous control of computation complexity.
Summary of the invention
The invention provides the method for video coding that a kind of computation complexity can dynamically be adjusted in the macro block rank, overcome the defective that coding method in the past can only be carried out computation complexity control in the frame rank.
The method for video coding that a kind of computation complexity can dynamically be adjusted, when coding one frame video pictures, dynamically adjust the coding computation complexity and may further comprise the steps:
(1) determines that this frame picture of coding allows the computational resource that uses;
(2) measure the used up computational resource of current this frame picture of coding;
(3) the high and low threshold value that the computational resource that has consumed and two that obtains in the step (2) is set in advance compares, if the computational resource that has consumed greater than high threshold, then reduces the complexity of coding residue macro block; If the computational resource that has consumed less than little threshold value, then increases the complexity of coding residue macro block, if the computational resource that has consumed between large and small threshold value, then keeps the complexity of coding residue macro block constant.
The present invention also provides a kind of device that adopts said method.
A kind of code device that adopts above-mentioned method for video coding comprises:
The macro-block level encoder that meets traditional coding scheme;
Be used to measure and write down the calculated load monitor of the current computational resource that coded macroblocks consumed;
According to the output of calculated load monitor, dynamically adjust the computation complexity dynamic controller of the encoder complexity of encoder;
Described encoder is made up of conversion and quantizer, variable length coder, exercise estimator and motion compensator;
The calculated load monitor is measured the current computational resource that has used of encoder, and sends measurement result to the computation complexity dynamic controller; Before the next macro block of coding, the computation complexity dynamic controller is according to the computational resource of the use situation that receives, for the complexity of the next macro block of encoding is dynamically adjusted, the hop threshold and three of the motion search hop threshold of operations such as output search form parameter, dct transform are adjusted signal; Encoder is according to the output of computation complexity dynamic controller, according to macro block data of video encoding standard standard coding, last output bit flow.
Described calculated load monitor by current macro starting and ending coding counter, coded macroblocks consumption of natural resource accumulator, coded macroblocks number accumulator and the total macro block number of present frame register, present frame calculated load indicating device and the present frame processor resource register that allows to consume is formed; Current macro starting and ending coding counter is used for before macro block data of record coding device coding and counting afterwards, output according to current macro starting and ending coding counter, coded macroblocks consumption of natural resource accumulator counts the computational resource that encoder has consumed, the total macro block number of coded macroblocks number accumulator and the present frame recorder trace macro block number of having encoded and needing the altogether macro block number of encoding, the processor resource register that the computational resource that this frame picture of coding that writes down in conjunction with present frame calculated load indicating device allows, present frame allow to consume can be to the information on load of computation complexity dynamic controller output current encoder.
The dynamic adjustment of other computation complexity of macro-block level specifically comprises following three aspects by this two-part operation realizes to estimation and DCT/QUANT/DEQUANT/IDCT:
1) the hop threshold control of operation such as dct transform is controlled coding by the hop threshold of operations such as dynamic adjustment dct transform and whether macro block is carried out DCT/QUANT/DEQUANT/IDCT and operate, and then controls the calculated load of this part operation.
2) motion search hop threshold control comes controlled encoder whether to carry out the estimation computing by dynamic adjustment motion search hop threshold.
3) control of search form parameter by the search shape that dynamic adjustment estimation will adopt, comes the calculated load of controlled motion estimating part.
Description of drawings
Fig. 1 is the structural representation block diagram of code device of the present invention system;
Fig. 2 is the structural representation block diagram of calculated load monitor of the present invention;
Fig. 3 is the SKIP control strategy flow chart of operation part such as dct transform in the encoder;
Fig. 4 is the SKIP control strategy flow chart of estimation part;
Fig. 5 is a kind of search Adjusting Shape strategic process figure of estimation part;
Fig. 6 is the operational flowchart that encoder macro-block level computation complexity is dynamically adjusted.
Embodiment
As shown in Figure 1, a kind of code device system that adopts computation complexity dynamic adjusting method of the present invention comprises:
The macro-block level encoder that meets traditional coding scheme;
Be used to measure and write down the calculated load monitor of the current computational resource that coded macroblocks consumed;
According to the output of calculated load monitor, dynamically adjust the computation complexity dynamic controller of the encoder complexity of encoder;
Encoder is made up of DCT, QUANT, DEQUANT and IDCT (being called for short conversion and quantizer), VLC (variable length coder), ME (exercise estimator) and MC (motion compensator) four parts.
As shown in Figure 2, the calculated load monitor is by current macro starting and ending coding counter 210, coded macroblocks consumption of natural resource accumulator 220, the total macro block number of coded macroblocks number accumulator and present frame register 230, the processor resource register 250 that present frame calculated load indicating device 240 and present frame allow to consume is formed, current macro starting and ending coding counter 210 is used for before macro block data of record coding device coding and counting afterwards, output according to current macro starting and ending coding counter 210, coded macroblocks consumption of natural resource accumulator 220 can count the computational resource that encoder has consumed, the total macro block number of coded macroblocks number accumulator and the present frame register 230 record macro block number of having encoded and needing the altogether macro block number of encoding, the processor resource register 250 that the computational resource that this frame picture of coding that writes down in conjunction with present frame calculated load indicating device 240 allows, present frame allow to consume can be to the information on load of computation complexity dynamic controller output current encoder.
Code device of the present invention is in cataloged procedure, and the calculated load monitor is measured the current computational resource that has used of encoder, and sends measurement result to the computation complexity dynamic controller; Before the next macro block of coding, the computation complexity dynamic controller is according to the computational resource of the use situation that receives, for the complexity of the next macro block of encoding is dynamically adjusted, the hop threshold and three of the motion search hop threshold of operations such as output search form parameter, dct transform are adjusted signal; Encoder is according to the output of computation complexity dynamic controller, according to macro block data of video encoding standard standard coding, last output bit flow.
The dynamic adjustment of other computation complexity of macro-block level specifically comprises following three aspects by this two-part operation realizes to estimation and DCT/QUANT/DEQUANT/IDCT:
1) the hop threshold control of operation such as dct transform is controlled coding by the hop threshold of operations such as dynamic adjustment dct transform and whether macro block is carried out DCT/QUANT/DEQUANT/IDCT and operate, and then controls the calculated load of this part operation.
2) motion search hop threshold control comes controlled encoder whether to carry out the estimation computing by the hop threshold of dynamic adjustment motion search.
3) control of search form parameter by the search shape that dynamic adjustment estimation will adopt, comes the calculated load of controlled motion estimating part.
As shown in Figure 3, when encoder carries out operation such as dct transform to macro block data, after the hop threshold that receives operations such as the dct transform that sended over by the computation complexity dynamic controller, encoder at first calculates in the macro block sad value (absolute value of difference with) of four luminance block data and reference block data; The linear combination result of the hop threshold of operating such as SAD and dct transform relatively then, if more than or equal to 0, then encoder is proceeded operations such as conversion, does not otherwise just carry out operation such as conversion.Last encoder is provided with coded macroblocks information according to the aforesaid operations result.
As shown in Figure 4, encoder is when motion estimation operation, after receiving the motion search hop threshold that sends over by the computation complexity dynamic controller, encoder at first calculates corresponding sad value according to initial motion vectors, the magnitude relationship that compares this sad value and motion search hop threshold then, if the former is big, then continue to do motion estimation operation, and with the motion vector of the minimum sad value correspondence found in the search procedure as the optimal motion vector, otherwise just do not carry out motion estimation operation, initial motion vectors as the optimal motion vector.
As shown in Figure 5, encoder is when motion estimation operation, after receiving the search form parameter that is sended over by the computation complexity dynamic controller, encoder is selected a kind of motion estimation operation of carrying out in the totally three classes search shape according to parameter value in the big search shape of operand (as hexagonal greatly), moderate search shape (as little diamond pattern) and the little search shape (as cross) of operand of operand.
Fig. 6 is the operational flowchart of computation complexity dynamic controller of the present invention, the computation complexity dynamic controller receives the calculated load indication information of calculated load monitor output, after carrying out corresponding logical operation and judgement, export hop threshold and three computation complexity control informations of motion search hop threshold of operations such as search form parameter, dct transform respectively to encoder, and then the computation complexity of the next macro block of encoder encodes controlled, the computational resource that makes encoder encodes one frame be consumed maintains in the allowed band.
As shown in Figure 6, after obtaining calculated load indication information T, judge earlier T drop on following three territories (0, T_down), [T_down, T_up], (T_up, ∞) which territory in are selected corresponding redirect branch according to judged result then.Suppose that T drops on (T_up, ∞) in the territory, promptly T calculates D_u=T-T_up so earlier greater than T_up, judge that again D_u drops on following three territories (0, D_uthres2), [D_uthres2, D_uthres1], (D_uthres1, which territory ∞) is selected corresponding redirect branch according to judged result then, carries out corresponding calculated complexity control strategy.If D_u drops on that (0, D_uthres2) on the territory, the coding calculated load be described, and to exceed allowed band less, only needs by adjusting the purpose that signal of search form parameter can reach the load adjustment; If D_u drops on [D_uthres2, D_uthres1] territory, illustrate that the coding calculated load exceeds allowed band largely, need can reach the purpose that load is adjusted by two signals of hop threshold of adjusting operations such as search form parameter and dct transform; And if D_u drops on (D_uthres1, ∞) on the territory, it is a lot of to illustrate that the coding calculated load exceeds allowed band, at this moment needs to reach the purpose that load is adjusted by hop threshold and three signals of motion search hop threshold of adjusting operations such as search form parameter, dct transform.Shown in flow chart, the operation when T drops on other zones is similar to said process.
Claims (1)
1. video coding apparatus that computation complexity can dynamically be adjusted is characterized in that comprising:
The macro-block level encoder that meets traditional coding scheme;
Be used to measure and write down the calculated load monitor of the current computational resource that coded macroblocks consumed;
According to the output of calculated load monitor, dynamically adjust the computation complexity dynamic controller of the encoder complexity of encoder;
Described calculated load monitor by current macro starting and ending coding counter (210), coded macroblocks consumption of natural resource accumulator (220), coded macroblocks number accumulator and the total macro block number of present frame register (230), present frame calculated load indicating device (240) and the present frame processor resource register (250) that allows to consume is formed;
Current macro starting and ending coding counter (210) is used for before macro block data of record coding device coding and counting afterwards, output according to current macro starting and ending coding counter (210), coded macroblocks consumption of natural resource accumulator (220) counts the computational resource that encoder has consumed, the total macro block number of coded macroblocks number accumulator and present frame register (230) the record macro block number of having encoded and needing the altogether macro block number of encoding, the computational resource that this frame picture of coding that writes down in conjunction with present frame calculated load indicating device (240) allows, present frame allow the information on load of the processor resource register (250) of consumption to computation complexity dynamic controller output current encoder;
The calculated load monitor is measured the current computational resource that has used of encoder, and sends measurement result to the computation complexity dynamic controller; Before the next macro block of coding, the computation complexity dynamic controller is according to the computational resource of the use situation that receives, for the complexity of the next macro block of encoding is dynamically adjusted, the hop threshold and three of the motion search hop threshold of output search form parameter, dct transform operation are adjusted signal; Encoder is according to the output of computation complexity dynamic controller, according to macro block data of video encoding standard standard coding, last output bit flow;
Described encoder is made up of conversion and quantizer, variable length coder, exercise estimator and motion compensator.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1301461A (en) * | 1998-05-20 | 2001-06-27 | 皇家菲利浦电子有限公司 | Encoding block-organized data |
| CN1398491A (en) * | 2000-11-14 | 2003-02-19 | 皇家菲利浦电子有限公司 | Dynamic adaption of complexity level in scalable MPEG-2 video decoder |
| CN1461566A (en) * | 2001-04-18 | 2003-12-10 | 皇家菲利浦电子有限公司 | Dynamic complexity prediction and regulation of MPE G2 decording in media processor |
| CN1801936A (en) * | 2005-12-30 | 2006-07-12 | 杭州华为三康技术有限公司 | Motion image code controlling method and code device |
| WO2006092671A1 (en) * | 2005-03-03 | 2006-09-08 | Koninklijke Philips Electronics N.V. | Adaptive fallback system for mpeg decoders |
| CN1860792A (en) * | 2003-09-02 | 2006-11-08 | 索尼株式会社 | Video encoding device, video encoding control method, and computer readable storage medium storing video encoding control program |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1301461A (en) * | 1998-05-20 | 2001-06-27 | 皇家菲利浦电子有限公司 | Encoding block-organized data |
| CN1398491A (en) * | 2000-11-14 | 2003-02-19 | 皇家菲利浦电子有限公司 | Dynamic adaption of complexity level in scalable MPEG-2 video decoder |
| CN1461566A (en) * | 2001-04-18 | 2003-12-10 | 皇家菲利浦电子有限公司 | Dynamic complexity prediction and regulation of MPE G2 decording in media processor |
| CN1860792A (en) * | 2003-09-02 | 2006-11-08 | 索尼株式会社 | Video encoding device, video encoding control method, and computer readable storage medium storing video encoding control program |
| WO2006092671A1 (en) * | 2005-03-03 | 2006-09-08 | Koninklijke Philips Electronics N.V. | Adaptive fallback system for mpeg decoders |
| CN1801936A (en) * | 2005-12-30 | 2006-07-12 | 杭州华为三康技术有限公司 | Motion image code controlling method and code device |
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