CN100463435C - Non-common ground series bus physical layer implementation - Google Patents
Non-common ground series bus physical layer implementation Download PDFInfo
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- CN100463435C CN100463435C CNB2006100022078A CN200610002207A CN100463435C CN 100463435 C CN100463435 C CN 100463435C CN B2006100022078 A CNB2006100022078 A CN B2006100022078A CN 200610002207 A CN200610002207 A CN 200610002207A CN 100463435 C CN100463435 C CN 100463435C
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Abstract
A communication circuit is used for transmitting data between a plurality of devices which have non-common ground voltages. The communication circuit comprises a plurality of transmitting input nodes coupled to the devices, respectively, a transmitting current path, a plurality of receiving output nodes coupled to the devices, respectively, and a receiving current path. The transmitting current path is coupled to the transmitting input nodes. The current through the transmitting current path is varied according to the input signal of the transmitting input nodes. The receiving current path is coupled to the receiving output nodes. The current through the receiving current path is varied according to the current of the transmitting current path such that data is transmitted from the transmitting input nodes to the receiving output nodes.
Description
Technical field
The present invention relates in general to as signal communication fields such as I2C BUS, LIN BUS, SMBUS, universal serial bus, more specifically, the present invention relates to altogether not expanding of universal serial bus.Specifically, the present invention relates to not have altogether not communicating by letter of coupled apparatus.
Background technology
In battery management, always need battery status with AFE (analog front end) (AFE) monitoring of equipment such as cell voltage and so on.Analog front-end equipments is connected with battery, obtains about the numerical data as the state of cell voltage and so on.Numerical data will be transferred to microprocessor, carries out as various processing such as electric weight calculating or protections.
Along with the element number of power brick constantly increases, it is more and more higher that the voltage of power brick will become.In addition, the number of batteries of AFE monitoring of equipment will be subjected to the number of pins of AFE equipment and the withstand voltage restriction of AFE equipment.In this case, only an analog front-end equipments can not be monitored the entire cell bag.Therefore, need to use a plurality of analog front-end equipments to monitor the state of power brick, will between microprocessor and each analog front-end equipments, set up communication path like this.
With reference to Fig. 1 of prior art, it shows the block diagram of communicate by letter structure or bus 10 between power brick 20 and the microprocessor 15.Power brick comprise a plurality of battery pack blocks or organize 22,24 ... and 26.A plurality of analog front- end equipments 12,14 ... and 16 stacks, and be connected respectively to battery pack 22,24 ... and 26, be used to monitor battery pack 22,24 ... and the state of each battery pack in 26.In other words, analog front- end equipments 12,14 ... and 16 in each only monitor the part of power brick 20.Bus 10 be connected to analog front- end equipments 12,14 ... and 16.Can find analog front- end equipments 12,14 ... and 16 do not have common ground voltage, if set up communication channel between them, just needs voltage isolation.Usually, use coupled apparatus such as optocoupler, inductance or electric capacity set up AFE module 12,14 ... and 16 and microprocessor 15 between communication path to reach the purpose of voltage isolation.Earth signal does not transmit by the coupled apparatus such as optocoupler, inductance or electric capacity altogether.These methods are complicated and expensive.
Summary of the invention
The objective of the invention is to realize not having altogether not communicating by letter of coupled apparatus.That is, the objective of the invention is between the bus module that does not have common ground voltage, to set up the not earth communication system or the bus circuit altogether of communication path.
Be used for having not the telecommunication circuit of transmission data between a plurality of equipment of ground voltage altogether for realizing top purpose, the invention provides.This telecommunication circuit comprises a plurality of transmission inputs, the transmission current path that is connected respectively to described equipment, a plurality of reception outputs and the received current path that is connected respectively to described equipment.The transmission current path is connected to the transmission input.Electric current by the transmission current path changes according to the input signal that sends input.The received current path is connected to the reception output.Electric current by the received current path changes according to the electric current in transmission current path, so that data are transferred to the reception output from sending input.
According to a further aspect in the invention, the invention provides the telecommunication circuit that is used for transmission data between a plurality of equipment with a plurality of voltage sources of floating that are connected in series.This telecommunication circuit comprises first node, a plurality of Section Point, a plurality of output and a plurality of switch.First node is connected to the equipment with the highest or minimum voltage in the voltage source voltage in the described equipment, and has the first node voltage source that is connected in series with loading resistor.The voltage at the described equipment two ends in the voltage at first node voltage source two ends and the described equipment is directly proportional or less than this voltage.Section Point is connected respectively to all the other equipment, and has a plurality of Section Point voltage sources respectively.The voltage at the second voltage source two ends equals the voltage between all the other equipment two ends substantially respectively.The first and second node voltage sources are connected in series.Output is connected to the first and second node voltage sources.Switch is used for the first and second node voltage sources are coupled to alternatively the voltage source of described equipment, so that the output voltage of output is according to the state change of switch.
Description of drawings
The following detailed description of carrying out in conjunction with the drawings, other purposes of the present invention, advantage and new feature will become more obvious.
Fig. 1 is the block diagram that is connected to each unit of power brick of microprocessor in the prior art by analog front-end equipments and bus.
Fig. 2 shows according to the not common ground buses topology of one embodiment of the invention or the block diagram of circuit.
Fig. 3 shows according to the not common ground buses topology of one embodiment of the invention or the block diagram of circuit.
Fig. 4 shows according to the not common ground buses topology of one embodiment of the invention or the block diagram of circuit.
Fig. 5 is the amplification block diagram that shows according to the bus circuit of not common ground buses circuit one embodiment of the invention, shown in Figure 4.
Fig. 6 is the block diagram that shows according to the bus topology of one embodiment of the invention.
Fig. 7 shows according to not common ground buses topology one embodiment of the invention, that have the voltage source of floating or the block diagram of circuit.
Fig. 8 a and Fig. 8 b show according to not common ground buses topology one embodiment of the invention, that have the voltage source of floating or the block diagram of circuit.
Embodiment
Now will be in detail with reference to embodiment of the present invention, non-common ground series bus physical layer is realized.When describing in conjunction with embodiment when of the present invention, will be understood that to be not intended to limit the invention to these embodiments.On the contrary, the present invention is intended to cover and can be included in the spirit and scope of the present invention that accessory claim limits with interior alternate embodiment, remodeling and equivalent.
And, in below of the present invention, describing in detail, illustrated many specific detail, so that complete understanding of the present invention to be provided.Yet those of ordinary skill in the art will recognize that the present invention can implement under the situation that does not have these specific detail.In other cases, do not describe known method, process, parts and circuit in detail, to avoid that each side of the present invention is fogged.
With reference to Fig. 2, illustrate not common ground buses circuit 100 according to one embodiment of the invention.As shown in Figure 2, common ground buses circuit 100 does not comprise three bus modules 102,104 and 106.Bus module 102,104 is in 106 on (stand on) different voltage (for example, V0 or ground, V1 and V3).Be apparent that to those skilled in the art according to embodiment of the present invention, common ground buses circuit 100 can not comprise the bus module greater or less than three.
In common ground buses circuit 100 not, input voltage signal is the input from node 162.Input voltage signal is converted into current signal.In another embodiment of the invention, input signal can be a current signal, in this case, can save the step or the process of conversion.Then, current signal is transmitted between bus module 102,104 and 106, and is converted into the voltage signal from node 122 outputs.After this manner, input signal is transferred to low common-mode voltage end from high common-mode voltage end.
As shown in Figure 2, when input voltage is in low state, IN=0, switch or MOSFET 164 will be switched on.That is, when input voltage is lower than the V3 certain value for example more than 0.8 volt the time, MOSFET 164 will be switched on.MOSFET 165 and MOSFET 166 form current mirror, make electric current flow through one from the current path of V3 through MOSFET 164, MOSFET 165, MOSFET 145 and MOSFET 125 to VO or ground.This electric current also flows to V0 through resistor 124, produces voltage signal on resistor 124.In other words, resistor 124 converts current signal to voltage signal.Inverse gate 123 is connected to resistor 124, to export an output signal at node 122 places.Will appreciate that output voltage will be in low state, OUT=0, that is, when input voltage was in low state, the output voltage at node 122 places equaled 0 or ground in the bus module 102.
On the other hand, when input voltage is in high state, IN=1, MOSFET 164 will be disconnected.Promptly, the amount that is lower than V3 when input voltage is less than certain value for example 0.3 volt the time, MOSFET 164 will be disconnected, there is not electric current to flow through that current path, the input of inverse gate 123 will be in low state, make output voltage be in high state, OUT=1, that is, the output voltage at node 122 places equals V1 in the bus module 102.Therefore, observe from bus module 106 (high common-mode voltage end: VDD=V3, signal GND=V2) can be transferred to bus module 102 (low common-mode voltage end: VDD=V1, GND=V0).The communication between the common ground buses module is not described in detail in Fig. 7, Fig. 8 a and Fig. 8 b.
And the maximum voltage drop of observing MOSFET 125 in that current path, MOSFET 145 and MOSFET 165 two ends is approximately equal to or less than the difference between the supply voltage of bus module 102,104 and 106.For example, the maximum voltage drop at MOSFET 145 two ends of bus module 104 is illustrated by equation 1-3, and is as follows:
The voltage (V196) of voltage (the V192)-node 196 of the Vds=node 192 of MOSFET 145; (1)
The Vgs ≈ V2 of the Vgs+MOSFET 145 of V192=V2-MOSFET 146; (2)
The Vgs ≈ V1 of the Vgs+MOSFET 125 of V196=V1-MOSFET 126; (3)
Therefore, the Vds of MOSFET 145 approximates (V2-V1).Those of ordinary skill in the art will appreciate that high voltage V3 is not applied on any single MOSFET, but has been divided into several small voltages.
With reference to Fig. 3, illustrate not common ground buses circuit 200 according to one embodiment of the invention.As shown in Figure 3, common ground buses circuit 200 does not comprise three bus modules 202,204 and 206, and bus module 202,204 and 206 is on the different voltage [for example, V0 (or ground), V1 and V3].Be apparent that to those skilled in the art, this not common ground buses circuit 200 can comprise bus module greater or less than three.
In common ground buses circuit 200 not, input voltage is the input from node 222.When input voltage is in the state of hanging down, switch or MOSFET 224 will be disconnected.Current source 227, MOSFET 226 and MOSFET 225 form current mirror, make electric current flow through one from the current path of V3 through MOSFET 265, MOSFET245 and MOSFET 225 to V0 or ground.This electric current resistor 264 of also flowing through produces voltage signal at resistor 264 places.Resistor 264 converts current signal to voltage signal.Inverse gate 263 is connected to resistor 264, to export an output signal at node 262 places.Will appreciate that when the input voltage at node 222 places was in the state of hanging down, the output voltage at node 262 places will be in high state in the bus module 206.
When input voltage was in high state, MOSFET 224 will be switched on.The grid of MOSFET225 is dragged down.To not have any current flows through resistor 264.The input of inverse gate 263 will be in high state, and the output voltage at node 262 places will be in low state.
Therefore, input voltage signal converts current signal to by current mirror and switch 224.Then, current signal transfers to bus module 206 from bus module 202 through bus module 204, and current signal is converted into output voltage signal then, and this output voltage signal is from node 262 outputs.Input signal is transmitted paramount common-mode voltage end from low common-mode voltage end.
With reference to Figure 4 and 5, wherein illustrate not vertical altogether bus circuit 300 according to embodiment of the present invention.Vertical bus circuit 300 comprises a plurality of bus modules 302,304,306 and 308 that are connected to traversal trunk module 301.For illustrative purposes, 4 bus modules have been shown among Fig. 4, yet, should be appreciated that embodiment of the present invention can support one or more bus modules.Traversal trunk module 301 has public ground with bus module 302.Traversal trunk 301 is to have the typical bus module that is used to send with the sending node 452 and the receiving node 454 of received signal.For example, bus module 302,304,306 and 308 is connected respectively to a plurality of battery pack 392,394,396,398 of battery 390.A plurality of equipment (not shown) as analog front-end equipments and so on also are connected respectively to bus module 302,304,306 and 308.The microprocessor (not shown) also can be connected to traversal trunk module 301, so that the numerical data such as the magnitude of voltage of battery pack 392,394,396,398 can be transferred to microprocessor.For example, analog front-end equipments can be connected to battery pack 392, is used for the voltage transitions of battery pack 392 is become digital signal and gives microprocessor with this digital data transmission.Bus module 302,304,306 can be identical with each bus module in 308, and be formed the independent integrated circuit that can be connected in series and be connected to battery 390.
Preferably with reference to Fig. 5, bus module 302 comprises signal sending circuit 382, signal receiving circuit 384 and switching circuit 386.Switch 386 serves as common ground compatible transceiver, to send and to receive earth signal altogether.Switching circuit 386 only is activated in public ground node or minimum bus module 302.Signal sending circuit 382 is similar with bus module 102 and 106 shown in Figure 2, and signal receiving circuit 384 is similar with bus module 202 and 206 shown in Figure 3.
Now refer again to Fig. 4, when according to the vertical altogether bus circuit 300 of embodiment of the present invention operations, the sending node 452 of the sending node of arbitrary bus module or traversal trunk module 301 can be used to send signal in the bus module 302,304,306,308.In addition, all receiving nodes 430,431,433,435 of bus module 302,304,306,308 and the receiving node 454 of traversal trunk module 301 can be used to received signal.
For example, when any vertical sending node place in sending node 402,442,444 or 446 sends signal, resistor 408 will be via the transmission current path received current signal that comprises node 370,372,374,376 and 378, and converts current signal to voltage signal.Voltage signal is transferred to receiving unit 384, and as shown in Figure 5, bus module 302,304,306 and 308 receiving node 430,431,433 and 435 will be exported this signal then.Similarly, when signal when the sending node 452 of traversal trunk module 301 is sent out, bus module 302,304,306 and 308 receiving node 430,431,433 and 435 will be exported this signal.
Each bus module in the bus module 302,304,306,308 can form identical integrated circuit (IC) chip.The switch 388 of lowermost bus module 302 is by configuration pin 387 controls.At lowermost level (stage), the switch 388 of bus module 302 keeps conducting state, and in other levels, the switch 352,354,356 of bus module 304,306,308 keeps off-state.
And in lowermost level, switch 388 remains closed, and the voltage-driven switch 389 of resistor 408 produces a voltage signal at pullup resistor 303 places that are connected to voltage source Vcc.The voltage signal driven MOS FET 422 at pullup resistor 303 places, as shown in Figure 5 and current mirror 424, electric current will flow through the received current path that comprises node 371,373,375,377 and 379 like this.Node 371 is connected to ground.When bus module 308 was the highest module, node 379 was connected to the power supply (power) of this bus module.Then, bus module 302,306,304 and all receiving nodes 430,431,433 and 435 of 308 will receive a voltage signal.As shown in Figure 4, the voltage signal at pullup resistor 303 places also is transferred to the receiving node 454 of traversal trunk module 301.
In addition, when signal is sent out at sending node 452 places of traversal trunk module 301, MOSFET456 will be driven, and electric current will flow through pullup resistor 303, so that will come driven MOS FET 422 and current mirror 424 at pullup resistor 303 places voltage of generation.Electric current will flow through the received current path, and module 302,306,304 and all receiving nodes 430,431,433,435 of 308 will receive a voltage signal.Therefore, when any bus module of a signal from the bus module that comprises vertical bus module and traversal trunk module was sent out, each receiving node of these bus modules will receive this signal.In other words, comprise that each bus module in the bus module of vertical and traversal trunk module can be simultaneously from arbitrary bus module reception data.
In addition, for the arbitration purpose, universal serial bus needs " line with " (WIRE AND) function.With reference to Fig. 4, wherein bus module 302,304,306 and 308 has sending node 402,442,444 and 446 respectively.In this layout, carry out " line with " logic function according to the not common ground buses circuit 300 of embodiment of the present invention.When any sending node in sending node 402,442,444 and 446 is in low state, the electric current by the transmission current path will be worth for certain, make the voltage at resistor 408 places be in high state, and the voltage at pullup resistor 303 places is in low state.
On the other hand, when all sending nodes 402,442,444 and 446 are in high state, the electric current by the transmission current path will be about zero, make the voltage at resistor 408 places be in low state, and the voltage at pullup resistor 303 places is in high state.In other words, as long as any logical value of sending node 402,442,444 and 446 is 0, the logical value at pullup resistor 303 places just is 0.Have only each logical value of sending node 402,442,444 and 446 to be at 1 o'clock, the logical value at pullup resistor 303 places is 1.
With reference to Fig. 6, show bus topology 600 according to one embodiment of the invention.Bus topology 600 is used for the I2C bus and uses.In protocol level, it uses identical with conventional I2C.Bus topology 600 comprises a plurality of vertical bus modules 612,614 and 616 and a plurality of traversal trunk module 622 and 624.For illustrative purposes, figure 6 illustrates three bus modules.Yet, should be appreciated that embodiment of the present invention can support one or more bus modules.Vertical bus module 612,614 and 616 is connected respectively to a plurality of battery pack blocks 652,654 and 656 of battery 650.According to description above, vertical bus module 612,614 and 616 is on the different voltage, can be by the I2C agreement with other bus module communication.
With reference to Fig. 7, show not common ground buses circuit 700 according to one embodiment of the invention.As shown in Figure 7, common ground buses circuit 700 does not comprise four bus modules 702,704,706 and 708.Bus module 702,704,706 and 708 for example is connected respectively to a plurality of battery pack 732,734,736 and 738 of battery 730.Be apparent that to those skilled in the art common ground buses circuit 700 can not comprise that these bus modules can be connected to the battery pack of equal number more than four bus modules.
Bus module 702,704,706 and 708 comprises a plurality of voltage sources 722,742,762 and 782 of floating.In addition, bus module comprises buffer 724,744,764 and 784.In addition, bus module comprises switch 726,746,766 and 786.
In the not common ground buses circuit 700 according to embodiment of the present invention, the voltage that the voltage at voltage source 782 two ends equals battery pack 738 multiply by COEFFICIENT K, and wherein, for example, K can equal 0.8, that is, and and V1=VBT1*K, wherein K=0.8.The voltage at voltage source 762,742 and 722 two ends equals the voltage of battery pack 736,734 and 732 respectively, (for example, V2=VBT2, V3=VBT3, V4=VBT4).
In this layout, when all switches 726,746,766 and 786 disconnected, buffer 724,744,764 and 784 input voltage will equal the voltage difference of voltage source 782 and battery pack 738, (for example, VBT1-V1).
As long as any one switch closure in the switch 726,746,766 and 786, buffer 724,744,764 and 784 input voltage will equal local ground.For example, in this case, the input voltage of buffer 744 equals the voltage of battery pack 732, (for example, VBT4).
Therefore, not common ground buses circuit 700 satisfied requirements as universal serial bus such as I2C buses, and can be used for not having publicly but the system that is connected in series for identical purpose.Not common ground buses circuit 700 according to embodiment of the present invention is suitable for the battery that its voltage has tolerance, as is used for battery of motor vehicle etc.
In addition, can be used to comprise CLOCK and DATA bus according to the structure of the not common ground buses circuit 700 of one embodiment of the invention, to observe as bus protocols such as I2C bus protocols.
With reference to Fig. 8 a and Fig. 8 b, show not common ground buses circuit 800 according to one embodiment of the invention.Bus circuit 800 comprises four bus modules 802,804,806 and 808, and these bus modules can be identical and be formed independent integrated circuit.Bus module 802,804,806 and 808 is connected to four battery pack 832,834,836 and 838 of battery 830.
For clarity sake, will describe bus module 802 and 808 as an example in detail hereinafter.Shown in Fig. 8 a and Fig. 8 b, bus module 802 comprises the voltage source 850 of floating that is connected to switch 856 and buffer 881.The voltage of voltage source 850 floated is directly proportional with the voltage of battery pack 832.Switch 856 is by signal input node 854 controls.Signal output node 882 is served as in the output of buffer 881.In this layout, the bus module 802 of bus circuit 800 is similar to the bus module 702 of bus circuit shown in Figure 7 700.
When all signal input nodes 855,857,859 of bus module 804,806 and 808 disconnected switch 865,867,869, buffer 881,883,885 and 887 output node 882,884,886 and 888 output will change with the input signal of signal input node 854.
As indicated above, the voltage that five-star voltage source produces is less than the voltage of corresponding battery pack, and the voltage that the voltage source of all the other grades produces equals the voltage of corresponding battery pack.
In addition, voltage source 840 comprises the switch 844 that is used for resistor 846 is coupled to the resistor 848 of voltage source 840.Switch 844 is by configuration pin 845 controls.
In one embodiment, each bus module 802,804,806 and 808 can form identical integrated circuit (IC) chip.
As shown in Fig. 8 a and Fig. 8 b, bus module 808 is in the superlative degree, it is low that the input of configuration pin 845 will keep, and switch 844 will remain closed, and makes the voltage at voltage source 840 two ends of bus module 808 be lower than the voltage at voltage source 850 two ends of bus module 802.It is high that the input of all the other bus modules 802,804 and 806 configuration pin keeps.
Although the description of front and accompanying drawing have embodied the preferred embodiments of the invention, but will be understood that, can carry out in preferred embodiments variously increasing, changing and replace, and not break away from spirit and scope that limit, principle of the present invention as accessory claim.Those of ordinary skill in the art will appreciate that, the present invention can be with being used for practice of the present invention and being specially adapted to specific environment and form, structure, layout, ratio, material, element and parts and otherwise many changes that operation requires are used, and do not depart from principle of the present invention.Therefore, at present will to be considered to all be illustrative and nonrestrictive to disclosed embodiment in all fields, and scope of the present invention pointed out by accessory claim and legal equivalents thereof, and be not limited to the description of front.
Claims (25)
1. be used for telecommunication circuit, comprise at communication between devices:
Be in a plurality of a plurality of equipment that are not total on the ground voltage;
Be connected respectively to a plurality of bus modules of described a plurality of equipment;
Be connected respectively to a plurality of transmission input nodes of described a plurality of bus modules;
Be connected to the transmission current path of described a plurality of transmission input nodes, wherein the input signal of importing nodes according to described a plurality of transmissions by the electric current in described transmission current path changes; And
Be connected to the resistor in transmission current path, be used for described current conversion is become voltage signal, make described input signal between described a plurality of equipment, transmit (communicate).
2. the described telecommunication circuit of claim 1 is characterized in that, also comprises:
Be connected respectively to a plurality of reception output nodes of described a plurality of equipment; With
Be connected to the received current path of described a plurality of reception output nodes, wherein pass through of the described electric current change of the electric current in described received current path according to described transmission current path;
Be connected respectively to a plurality of reception resistors in described received current path, be used for described current conversion is become a plurality of reception voltage signals, make described input signal from described a plurality of reception output node outputs.
3. the described telecommunication circuit of claim 2 is characterized in that, also comprises:
Data communication path is used for described transmission current path is coupled in described received current path, the feasible described electric current change of passing through the described electric current in described received current path according to described transmission current path.
4. the described telecommunication circuit of claim 3 is characterized in that, described data communication path is positioned at minimum ground voltage place.
5. telecommunication circuit that is used to transmit data comprises:
Have a plurality of a plurality of vertical equipment that are not total to ground voltage;
At least one horizontal equipment, wherein said horizontal equipment are positioned at described a plurality of minimum ground voltage place that is not total to ground voltage;
Be connected respectively to a plurality of vertical transmission input node of described a plurality of vertical equipment;
Be connected to the horizontal transmission input node of described horizontal equipment; And
Be connected to the transmission current path of described a plurality of vertical transmission input node and described horizontal transmission input node, the electric current in wherein said transmission current path changes according to the input signal of described a plurality of vertical transmission input nodes and described horizontal transmission input node.
6. the described telecommunication circuit of claim 5 is characterized in that, also comprises:
Laterally receive output node, it is connected to described horizontal equipment and described transmission current path, makes described input signal transmit between described vertical equipment and described horizontal equipment.
7. the described telecommunication circuit of claim 5 is characterized in that, also comprises:
Be connected to a plurality of vertical reception output node of described vertical equipment; With
Be connected to the received current path in described a plurality of vertical reception output nodes and described transmission current path, wherein pass through of the described electric current change of the electric current in described received current path, make described input signal transfer to described a plurality of vertical reception output node from described a plurality of vertical transmissions input nodes and described horizontal transmission input node according to described transmission current path.
8. the described telecommunication circuit of claim 7 is characterized in that, also comprises:
Data communication path is used for described transmission current path is coupled in described received current path, the feasible described electric current change of passing through the electric current in described received current path according to described transmission current path.
9. the described telecommunication circuit of claim 8 is characterized in that, described data communication path is positioned at minimum ground voltage place.
10. the described telecommunication circuit of claim 7 is characterized in that, described telecommunication circuit is observed the I2C serial bus protocol.
11. a telecommunication circuit that is used to transmit data comprises:
Be connected to first bus module of first equipment in a plurality of equipment, wherein said a plurality of equipment comprises a plurality of voltage sources that are connected in series, described first bus module comprises first voltage source of floating, and wherein said first floats the voltage at voltage source two ends less than the voltage at the first voltage source two ends that are associated with described first equipment;
A plurality of second bus modules that are connected in series with described first bus module, each bus module in described a plurality of second bus module is connected in described a plurality of equipment a remaining associate device and comprises second voltage source of floating, the voltage at described second floats voltage that voltage source has equals the substantially two ends, corresponding voltage source of described associate device;
Be connected to described first and second a plurality of output nodes of floating voltage source; And
A plurality of switches are used for described first and second voltage sources of floating are coupled to the corresponding voltage source alternatively, make the output of described output node change according to the state of described switch.
12. the described telecommunication circuit of claim 11 is characterized in that described first voltage source is positioned at the high voltage end of the described a plurality of voltage sources that are connected in series.
13. the described telecommunication circuit of claim 11 is characterized in that described first voltage source constitutes the minimum voltage of described a plurality of voltage sources.
14. the described telecommunication circuit of claim 11 is characterized in that, described a plurality of equipment are analog front-end equipments, and described a plurality of voltage sources are a plurality of battery pack of battery.
15. a telecommunication circuit that is used at communication between devices comprises:
Be in a plurality of altogether on the ground voltage and a plurality of equipment that are connected in series;
Via correspondence not altogether ground voltage be connected to a plurality of communication modules of described a plurality of equipment, each communication module in wherein said a plurality of communication module comprises input pin and is formed integrated circuit (IC) chip, first equipment in wherein said a plurality of equipment is on described a plurality of the highest or minimum voltage that is not total in the ground voltage, a predetermined logic values is transfused to the input pin of described first equipment, and wherein another predetermined logic values is transfused to the corresponding input pin of the surplus equipment in described a plurality of equipment; With
By the transmission current path of described a plurality of communication modules, be used between described a plurality of communication modules, transmitting data.
16. the described telecommunication circuit of claim 15 is characterized in that, also comprises:
By the signal path of described a plurality of communication modules, be used between described a plurality of communication modules, sending and receiving described data.
17. the described telecommunication circuit of claim 15 is characterized in that, also comprises:
By the received current path of described a plurality of communication modules, be used for receiving described data from described transmission current path.
18. the described telecommunication circuit of claim 17 is characterized in that, a transmission current is coupled at described a plurality of communication modules place in described received current path, and the described input of the described input pin of one of them corresponding device remains on described predetermined logic values.
19. the described telecommunication circuit of claim 15 is characterized in that, also comprises:
A plurality of voltage sources, wherein when the described input of the described input pin of a corresponding device remains on described predetermined logic values, the voltage at each the voltage source two ends in described a plurality of voltage source is less than the voltage at described corresponding device two ends, and wherein when the described input of the described input pin of described corresponding device did not remain on described predetermined logic values, the voltage at each the voltage source two ends in described a plurality of voltage sources equaled the voltage at described corresponding device two ends.
20. the described telecommunication circuit of claim 15 is characterized in that, described telecommunication circuit is observed the I2C serial bus protocol.
21. the described telecommunication circuit of claim 15 is characterized in that, described a plurality of communication modules are formed integrated circuit (IC) chip.
22. a telecommunication circuit that is used at communication between devices comprises:
Be in a plurality of a plurality of equipment that are not total to ground voltage;
Be connected to a plurality of transmission input nodes of described a plurality of equipment; And
Be connected to the transmission current path of described a plurality of transmission input nodes, wherein the input signal of importing node according to described transmission by the electric current in described transmission current path changes, and makes data transmit between described a plurality of equipment.
23. the described telecommunication circuit of claim 22 is characterized in that, also comprises:
Be connected to a plurality of reception output nodes of described a plurality of equipment; And
Be connected to the received current path of described a plurality of reception output nodes, wherein pass through of the described electric current change of the electric current in described received current path, make described data transfer to described a plurality of reception output node from described a plurality of transmissions input nodes according to described transmission current path.
24. the described telecommunication circuit of claim 23 is characterized in that, also comprises:
Data communication path is used for described received current path is connected to described transmission current path, the feasible described electric current change of passing through the described electric current in described received current path according to described transmission current path.
25. the described telecommunication circuit of claim 24 is characterized in that, described data communication path is positioned at minimum ground voltage place.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US64996005P | 2005-02-04 | 2005-02-04 | |
| US60/649,960 | 2005-02-04 | ||
| US11/282,426 | 2005-11-18 |
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| Publication Number | Publication Date |
|---|---|
| CN1815992A CN1815992A (en) | 2006-08-09 |
| CN100463435C true CN100463435C (en) | 2009-02-18 |
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| CNB2006100022078A Active CN100463435C (en) | 2005-02-04 | 2006-01-24 | Non-common ground series bus physical layer implementation |
| CN 200620001725 Expired - Lifetime CN200941623Y (en) | 2005-02-04 | 2006-01-24 | Non-common ground series bus physical layer implementation |
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| CN 200620001725 Expired - Lifetime CN200941623Y (en) | 2005-02-04 | 2006-01-24 | Non-common ground series bus physical layer implementation |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI418114B (en) * | 2009-12-29 | 2013-12-01 | O2Micro Int Ltd | Compensating circuit and method in battery packs |
| US9291680B2 (en) | 2009-12-29 | 2016-03-22 | O2Micro Inc. | Circuits and methods for measuring a cell voltage in a battery |
| EP3985406A1 (en) * | 2020-10-16 | 2022-04-20 | O2Micro, Inc. | Controller and method for detecting battery cell voltage |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100463435C (en) * | 2005-02-04 | 2009-02-18 | 美国凹凸微系有限公司 | Non-common ground series bus physical layer implementation |
| DE102014215730A1 (en) * | 2014-08-08 | 2016-02-11 | Robert Bosch Gmbh | Battery cell module with communication device for data exchange between a plurality of similar battery cell modules connected in series |
| CN107592249B (en) * | 2015-12-09 | 2020-09-15 | 上海联影医疗科技有限公司 | Communication method |
| CN106953787B (en) * | 2017-03-28 | 2022-09-20 | 华南理工大学 | Battery management system multi-host communication method and device based on level migration |
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| CN2137363Y (en) * | 1992-06-23 | 1993-06-30 | 南昌有色冶金设计研究院 | Dc voltage isolated measuring device |
| US5513218A (en) * | 1994-06-20 | 1996-04-30 | Delco Electronics Corp. | Compensation for ground voltage variation on a communication bus |
| CN1289052A (en) * | 1999-09-22 | 2001-03-28 | 中国科学院大连化学物理研究所 | Fuel cell unit voltage measuring method |
| US6373330B1 (en) * | 2001-01-29 | 2002-04-16 | National Semiconductor Corporation | Bandgap circuit |
| CN200941623Y (en) * | 2005-02-04 | 2007-08-29 | 美国凹凸微系有限公司 | Non-common ground series bus physical layer implementation |
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- 2006-01-24 CN CNB2006100022078A patent/CN100463435C/en active Active
- 2006-01-24 CN CN 200620001725 patent/CN200941623Y/en not_active Expired - Lifetime
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN2137363Y (en) * | 1992-06-23 | 1993-06-30 | 南昌有色冶金设计研究院 | Dc voltage isolated measuring device |
| US5513218A (en) * | 1994-06-20 | 1996-04-30 | Delco Electronics Corp. | Compensation for ground voltage variation on a communication bus |
| CN1289052A (en) * | 1999-09-22 | 2001-03-28 | 中国科学院大连化学物理研究所 | Fuel cell unit voltage measuring method |
| US6373330B1 (en) * | 2001-01-29 | 2002-04-16 | National Semiconductor Corporation | Bandgap circuit |
| CN200941623Y (en) * | 2005-02-04 | 2007-08-29 | 美国凹凸微系有限公司 | Non-common ground series bus physical layer implementation |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI418114B (en) * | 2009-12-29 | 2013-12-01 | O2Micro Int Ltd | Compensating circuit and method in battery packs |
| US8629679B2 (en) | 2009-12-29 | 2014-01-14 | O2Micro, Inc. | Circuits and methods for measuring cell voltages in battery packs |
| US9291680B2 (en) | 2009-12-29 | 2016-03-22 | O2Micro Inc. | Circuits and methods for measuring a cell voltage in a battery |
| EP3985406A1 (en) * | 2020-10-16 | 2022-04-20 | O2Micro, Inc. | Controller and method for detecting battery cell voltage |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1815992A (en) | 2006-08-09 |
| CN200941623Y (en) | 2007-08-29 |
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