CN100458889C

CN100458889C - Plasma display apparatus and driving method thereof

Info

Publication number: CN100458889C
Application number: CNB2005101251489A
Authority: CN
Inventors: 郑允权; 姜成昊; 尹相辰; 沈寿锡
Original assignee: LG Electronics Inc
Current assignee: LG Electronics Inc
Priority date: 2004-11-19
Filing date: 2005-11-21
Publication date: 2009-02-04
Anticipated expiration: 2025-11-21
Also published as: KR20060056165A; CN100472589C; CN100501821C; CN1776789A; CN1776788A; CN1776790A; KR100656704B1

Abstract

The invention relates to plasma display device, and more particularly relates to the plasma display device and a driving method thereof, wherein, scan electrodes are scanned according to one of multiple scan types, and the last maintenance pulse of a maintenance pulse which is exerted on the scan electrodes or maintenance electrodes is controlled. The plasma display device of the invention comprises a plasma display panel provided with a plurality of scan electrodes, a plurality of maintenance electrodes and a plurality of data electrodes intersecting the scan electrodes and the maintenance electrodes, and a controller. The controller is used for scanning the scan electrodes by using one of the multiple scan types in an addressing cycle, wherein, the multiple scan types which have different sequence are used for scanning the scan electrodes; a data pulse is applied to the data electrode corresponding to one scan type and at least one sub-field which is controlled in a frame; the difference value between an application time point of the last maintenance pulse of the maintenance pulse and the application time point of a reset pulse is greater than the difference value between the application time points of the two maintenance pulses; the maintenance pulse is exerted on the scan electrodes or the maintenance electrodes in a maintenance cycle after the addressing cycle; and the reset pulse is exerted on the scan electrodes in a reset cycle of the next sub-field.

Description

Plasma display panel device and driving method thereof

Technical field

The present invention relates to plasma display panel device, and more specifically, relate to plasma display panel device and driving method thereof, wherein according to the one scan scan electrode of a plurality of scan types, and control be added to scan electrode or keep electrode last keep pulse.

Background technology

Usually, Plasmia indicating panel comprises front panel and rear panel.The barrier rib that forms between plate and the rear panel in front forms a unit.Each unit is filled with main discharge gas, such as neon (Ne), and the mixed gas of helium (He) or Ne+He and comprise the in a small amount inert gas of xenon (Xe).A plurality of these unit form a pixel.For example, red (R) unit, green (G) unit and blueness (B) unit form a pixel.If with HF voltage discharge lag gas, it produces vacuum ultraviolet.The fluorescent material that forms between barrier rib is excited with display image.It is thin and light that Plasmia indicating panel can be made, and therefore become the bright spot in the display device of future generation.

Fig. 1 shows the view of the structure of general Plasmia indicating panel.

As shown in Figure 1, substrate 100 and meron 110 before Plasmia indicating panel comprises.On preceding substrate 100, on the front glass 101 that is used as the display surface of display image on it, arrange a plurality of electrode pairs of keeping that wherein form scan electrode 102 in pairs and keep electrode 103.In meron 100, intersecting a plurality of a plurality of addressing electrodes 113 of keeping electrode pair as layout on the back glass 111 of rear surface.At this moment, preceding substrate 100 and meron 110 are parallel to each other, and have preset distance betwixt.

Preceding substrate 100 comprises scan electrode 102 and keeps the electrode pair of electrode 103 that it discharges each other, and keeps the radiation of unit in the discharge cell.In other words, each scan electrode 102 and keep electrode 103 and have transparency electrode (a) that forms by transparent ITO material and the bus electrode (b) that forms by metal material.Scan electrode 102 and keep electrode 103 and covered the insulation that it is used for limiting discharge current and electrode pair is provided by one or more dielectric layers 104.On dielectric layer 104, form protective seam 105 thereon, thereby promote discharge scenario with the magnesium oxide (MgO) that deposits.

In meron 110, layout parallel to each other is used to form a plurality of discharge spaces, just, and the barrier rib of the bar shaped of discharge cell (or net form).In addition, be parallel to barrier rib 112 settings and produce vacuum ultraviolet a plurality of addressing electrode 113 by carrying out address discharge.Radiation is used for R, the G of the visible light of display image and the upper surface that B fluorescent material layer 114 is applied to meron 110 during address discharge.Between addressing electrode 113 and fluorescent material layer 114, be formed for protecting the dielectric layer 115 of addressing electrode 113.

In the Plasmia indicating panel of said structure, with matrix form structure electrode.This will describe with reference to figure 2.

Fig. 2 is the view that has schematically shown the arrangement of electrodes of three electrode A C surface-discharge type Plasmia indicating panels (being called " PDP " hereinafter).

With reference to figure 2, three electrode A C surface-discharge type PDP of the prior art are included in the scan electrode Y1 that forms on the upper plate to Yn with keep electrode Z, with the addressing electrode X1 that on lower plate, forms to Xm, make addressing electrode X1 to Xm cross scan electrode Y1 to Yn with keep electrode Z.

The discharge cell 200 that is used to show redness, green and blue any one by with cells arranged in matrix scan electrode Y1 to Yn, keep electrode Z and addressing electrode X1 point of crossing to Xm.

Form scan electrode Y1 thereon to Yn and upper plate upper strata piezodielectric layer (not shown) and the MgO protective seam (not shown) of keeping electrode Z.

Be used to prevent that barrier rib that light between adjacent discharge cell 200 and electricity are disturbed mutually is formed on wherein forms the lower plate of addressing electrode X1 to Xm.On the surface of lower plate and barrier rib, form by ultraviolet ray excited to send the fluorescent material of luminous ray.

Will be such as He+Xe, the inert mixed gas of Ne+Xe or He+Xe+Ne is infused in the upper plate of PDP and the discharge space between the lower plate.

To the method that realize the gray level of image in the plasma display panel device of above-mentioned structure be described with reference to figure 3.

As shown in Figure 3, for the image gray levels of the Plasmia indicating panel of representing prior art, a frame is divided into several height fields with different radiation numbers.Each son field is divided into reset cycle (RPD) of being used for the initialization whole unit, be used to select the addressing period (APD) of the unit that discharges and be used for realizing according to the discharge number keep the cycle (SPD) of gray level.For example, if be intended to, will be divided into eight sons (SF1 is to SF8) corresponding to 1/60 wonderful frame period (16.67ms), as shown in Figure 2 with 256 gray level display images.Each of eight sons (SF1 is to SF8) is divided into reset cycle, addressing period once more and is kept the cycle.

The reset cycle of each son field is identical for each son field with addressing period.Because the voltage difference between addressing electrode and scan electrode (just, transparency electrode) produces the address discharge that is used to select unit to be discharged.In each son field, keep the cycle with 2 ⁿRatio (wherein n=0,1,2,3,4,5,6,7) increase.Because as mentioned above each son keep cyclomorphosis, by controlling keeping the cycle of each son, just, keep the gray level of discharge number presentation video.

Fig. 4 is the view of equivalent capacity (C) that Plasmia indicating panel has been described.

With reference to figure 4, the equivalent capacity of Plasmia indicating panel (C) is included between the data electrode, such as the equivalent capacity (Cm1) between data electrode X1 and the data electrode X2, at data electrode and scan electrode, such as the equivalent capacity (Cm2) between data electrode X1 and the scan electrode Y1, with at data electrode with keep electrode, such as data electrode X1 with keep equivalent capacity (Cm2) between the electrode Z1.

Simultaneously, the state that is added to the voltage of scan electrode Y or data electrode X changes according to the operation of the on-off element that comprises in drive IC, this drive IC is such as being used for by provide scanning impulse to come the turntable driving IC of driven sweep electrode Y to scan electrode Y at addressing period, such as being used for by provide data pulse to come the data driver IC of driving data electrode X to data electrode X at addressing period.Therefore, the displacement current (Id) that produces above-mentioned equivalent capacity (Cm1) and equivalent capacity (Cm2) flows through data driver IC through data electrode.

As mentioned above, if the equivalent capacity of Plasmia indicating panel increases.The amount that flows through the displacement current (Id) of data driver IC increases.If the switching number of data driver IC increases, the amount of displacement current (Id) increases.The switching number of data driver IC changes according to the view data of input.

More specifically, in the situation of the special pattern that repeats between 0 and 1 of the logical value of view data, the amount that flows through the displacement current of data driver IC excessively increases therein.Therefore, existence is such as the problem of the electrical damage of burning data driver IC.

Fig. 5 shows the waveform of example of the drive waveforms of general Plasmia indicating panel.Figure 11 a is the view that shows the wall CHARGE DISTRIBUTION in the discharge cell that changes according to as shown in Figure 5 drive waveforms length by length to 6e.

The drive waveforms of Fig. 5 will be described to 6e with reference to figure 11a.

With reference to figure 5, each son (SFn-1, SFn) comprise the reset cycle (RP) that is used for the whole screen of initialization, be used to select the addressing period (AP) of discharge cell, be used to keep the keeping the cycle (SP) and be used for wiping erase cycle (EP) of discharge of selected discharge cell 1 at the wall electric charge of discharge cell 1.

In the erase cycle (EP) of (n-1) son (SFn-1), will wipe tilt waveform (ERR) and be added to and keep electrode Z.During erase cycle (EP), 0V is added to scan electrode Y and addressing electrode X.Wiping tilt waveform (ERR) is that its voltage rises to the positive positive tilt waveform of keeping voltage (Vs) gradually from 0V.Produce and to keep the opening in the unit of discharge by wiping tilt waveform (ERR) therein, at scan electrode Y with keep electrode Z and produce erasure discharge.Wall electric charge in opening the unit is wiped by erasure discharge.As a result, each discharge cell 1 has wall CHARGE DISTRIBUTION shown in Fig. 6 a afterwards immediately in erase cycle (EP).

Setting up the cycle in (SU) of the reset cycle (RP) of n (SFn) beginning therein is added to all scan electrode Y with positive tilt waveform (PR), and 0V is added to keeps electrode Z and addressing electrode X.The mode of the positive tilt waveform (PR) by the cycle of setting up (SU), the voltage on scan electrode Y rises to resetting voltage (Vr) gradually from the positive voltage (Vs) of keeping, and this resetting voltage (Vr) is higher than the positive voltage (Vs) of keeping.By the mode of positive tilt waveform (PR), in the discharge cell of whole screen, between scan electrode Y and addressing electrode X and at scan electrode Y with keep the dark discharge that generation wherein seldom produces light between the electrode Z.As the result of this dark discharge, the cycle of setting up (SU) afterwards, positive wall electric charge is stayed addressing electrode X and keeping on the electrode Z immediately, and negative wall electric charge is stayed on the scan electrode Y.Shown in Fig. 6 b.When the cycle of setting up (SU) produces dark discharge, be initialized near the voltage that can produce the trigger voltage (Vf) of discharge at scan electrode Y and gap voltage (Vg) and the gap voltage between scan electrode Y and addressing electrode X kept between the electrode Z.

The cycle of setting up (SU) afterwards, at remove the cycle (SD) of reset cycle (RP), negative tilt waveform (NR) is added to scan electrode Y.Simultaneously, the positive voltage (Vs) of keeping is added to and keeps electrode Z and 0V is added to addressing electrode X.By the mode of negative tilt waveform (NR), the voltage on scan electrode Y drops to negative erasing voltage (Ve) gradually from the positive voltage (Vs) of keeping.By the mode of negative tilt waveform (NR), in the discharge cell of whole screen, at scan electrode Y with keep between the electrode Z and between scan electrode Y and addressing electrode X and produce dark discharge.As the result of the dark discharge in the cycle of removing (SD), the wall CHARGE DISTRIBUTION in each discharge cell 1 is changed into optimum addressing situation, shown in Fig. 6 c.At this moment, except the wall electric charge of scheduled volume, the unwanted excessive wall electric charge of address discharge is wiped by scan electrode Y from each discharge cell 1 and addressing electrode X.Be inverted to negative polarity in the polarity of keeping the wall electric charge on the electrode Z from positive polarity, and keep on the electrode Z from the negative wall electric charge accumulation that scan electrode Y moves.When removing the cycle in (SD) of reset cycle (RP) produces dark discharge, become near trigger voltage (Vf) at scan electrode Y and gap voltage and the gap voltage between scan electrode Y and addressing electrode X kept between the electrode Z.

At addressing period (AP), when (when SCNP) order is added to scan electrode Y, and scanning impulse (SCNP) synchronously is added to addressing electrode X with positive data pulse (DP) with negative scanning impulse.(voltage SCNP) is scanning voltage (Vsc) to scanning impulse, and it drops to negative scanning voltage (Vy) from 0V or near the negative scan bias voltage (Vyb) of 0V.The voltage of data pulse (DP) is positive data voltage (Va).During addressing period (AP), will be lower than the positive positive Z bias voltage (Vzb) of keeping voltage (Vs) and be added to and keep electrode Z.In immediately gap voltage being adjusted to state afterwards in the reset cycle (RP) therein near the voltage of trigger voltage (Vf), between scan electrode Y and addressing electrode X, produce address discharge, and the gap voltage between electrode Y, X has been used opening in the unit above trigger voltage (Vf) of scanning voltage (Vsc) and data voltage (Va).Therefore first address discharge between scan electrode Y and addressing electrode X produces the starting charged particle in discharge cell, and causes at scan electrode Y and keep the discharge of second between the electrode Z, shown in Fig. 6 d.What wherein produce address discharge opens wall CHARGE DISTRIBUTION in the unit shown in Fig. 6 e.

Simultaneously, do not produce the state that wall CHARGE DISTRIBUTION in the closing unit of address discharge keeps Fig. 6 c basically therein.

In the cycle of keeping (SP), the positive pulse (SUSP) of keeping of keeping voltage (Vs) alternately is added to scan electrode Y and keeps electrode Z.Keep pulse (SUSP) for each, because the cause of the wall CHARGE DISTRIBUTION of Fig. 6 e is opened in the unit at scan electrode Y and kept to produce between the electrode Z and keep discharge what selected by address discharge.Opposite, in closing unit, do not producing discharge during the cycle of keeping.This is because when with first positive when keeping voltage (Vs) and being added to scan electrode Y, because the state of the wall CHARGE DISTRIBUTION of closing unit maintenance shown in Fig. 6 c, can not surpass trigger voltage (Vf) at scan electrode Y and the voltage kept between the electrode Z.

But, in existing plasma display panel device, produce discharge cell 1 is controlled in several discharges with the reset cycle (RP) of erase cycle (EP) by (n-1) son (SFn-1) and n (SFn) initialization and wall electric charge.Therefore, the darkroom contrast value goes wrong and therefore contrast-ratio reduction because reduce.

In addition, in existing plasma display panel device, in the situation of negative wall electric charge excessive accumulation on scan electrode Y, do not produce dark discharge because in the erase cycle (EP) of (n-1) son (SFn-1), wipe the wall electric charge glibly therein at set up the cycle (SU) of n (SFn).If can not normally produce dark discharge, not initialization discharge cell in the cycle of setting up (SU) as mentioned above.In this situation, for produce discharge in the cycle of setting up, resetting voltage (Vr) should be very high.If do not produce dark discharge in the cycle of setting up (SU), the condition in the discharge cell after the reset cycle does not become optimum addressing condition immediately.This has caused improper discharge or erroneous discharge.In addition, if the erase cycle (EP) at (n-1) son (SFn-1) is too much accumulated positive wall electric charge immediately at scan electrode Y afterwards, when setting up the cycle in (SU) at n (SFn), with the positive voltage (Vs) of keeping, when being added to scan electrode Y, the beginning voltage of just positive tilt waveform (PR) produces strong discharge.Therefore, initialization is inhomogeneous on whole unit.To describe these problems in detail with reference to figure 7.

Fig. 7 illustrated when driving Plasmia indicating panel according to as shown in Figure 5 drive waveforms, in the cycle of setting up at scan electrode with keep the view of the variation of the applied external voltage in discharge cell and gap voltage between the electrode.

Fig. 7 shows in the cycle of setting up (SU) at scan electrode Y and keeps applied external voltage (Vyz) and the gap voltage in discharge cell (Vg) between the electrode Z.Applied external voltage (Vyz) is by the solid line indication of Fig. 7, and it is the external voltage that is added to scan electrode Y and keeps electrode Z.Because 0V is added to keeps electrode Z, applied external voltage (Vyz) voltage with positive tilt waveform (PR) basically is identical.In Fig. 7,1., 2. and 3. dotted line indicates the mode by the wall electric charge in discharge cell, the gap voltage that forms (Vg) in discharge gas.Because whether produce discharge in the formerly sub-field of the basis of the wall quantity of electric charge in discharge cell change, gap voltage (Vg) 1., 2. and is 3. indicated the ground change as dotted line.Scan electrode Y and keep between the electrode Z applied external voltage (Vyz) and in the relation of the gap voltage that forms in the discharge gas in the discharge cell (Vg) shown in following equation 1.

[equation 1]

Vyz＝Vg+Vw

In Fig. 7, gap voltage 1. (Vg) refers to wherein that the wall electric charge in discharge cell is fully wiped and the abundant little situation of wall electric charge.Gap voltage (Vg) and applied external voltage (Vyz) increase with being directly proportional, if produce dark discharge but it reaches trigger voltage (Vf).Gap voltage in discharge cell is initialized as trigger voltage (Vf) by dark discharge.

In Fig. 7, gap voltage 2. (Vg) refers to wherein during the erase cycle (EP) of (n-1) son (SFn-1) and produces strong discharge, and therefore is reversed in the situation of the wall charge polarity in the wall CHARGE DISTRIBUTION in the discharge cell.At this moment, the polarity of the wall electric charge of accumulating on scan electrode Y immediately afterwards in erase cycle (EP) is because strong discharge is reversed to positive polarity.This situation takes place in the situation that the low or inclination of wiping tilt waveform (ERR) of the homogeneity of discharge cell changes according to variation of temperature when the size of PDP is big.In this situation, as the 2. indication of Fig. 7, because primary clearance voltage (Vg) excessively increases, with positive when keeping voltage (Vs) and being added to scan electrode Y, gap voltage (Vg) is above trigger voltage (Vf) during reset cycle (RP).Therefore, produce strong discharge.Because by in the cycle of setting up (SU) with remove the cycle mode of the strong discharge in (SD), discharge cell is not initialized to the wall CHARGE DISTRIBUTION of optimum addressing condition, just, the wall CHARGE DISTRIBUTION shown in Fig. 6 c may produce address discharge in the closing unit that should close.In other words, if produce strong erasure discharge in the erase cycle between the reset cycle, produce erroneous discharge.

In Fig. 7,3. gap voltage (Vg) refers to wherein because do not produce during the erase cycle (EP) of (n-1) son (SFn-1) or very weak ground produces erasure discharge, the situation that the wall CHARGE DISTRIBUTION in discharge cell (as result's formation of keeping discharge of generation immediately before erasure discharge) remains unchanged.This will be described in greater detail below.As shown in Figure 7, in the time will keeping pulse (SUSP) and be added to scan electrode Y, produce the last discharge of keeping.As the last result who keeps discharge, negative wall electric charge stays that scan electrode Y goes up and positive wall electric charge is stayed and kept on the electrode Z.But, carry out initialization though must wipe these wall electric charges with normal in next height field, if do not produce erasure discharge or very weak produce erasure discharge, the polarity of wall electric charge remains unchanged.Do not produce erasure discharge or very weak the reason that produces erasure discharge is that the homogeneity of discharge cell among the PDP is very low, or the inclination of wiping tilt waveform (ERR) changes according to variation of temperature.In this case, because primary clearance voltage (Vg) is very low, just, as Fig. 7 3. shown in negative polarity, even tilt waveform (PR) positive in the cycle of setting up rises to resetting voltage (Vf), the gap voltage in discharge cell (Vg) does not reach trigger voltage (Vf).Therefore, in the cycle of setting up (SU) with remove the cycle and do not produce dark discharge in (SD).Therefore, if the erase cycle before the reset cycle does not produce erasure discharge or very weak produces erasure discharge, produce erroneous discharge or improper discharge because can not normally carry out initialization.

In the situation 2. of Fig. 7, the relation between gap voltage (Vg) and trigger voltage (Vf) such as below equation 2 expression.In the situation 3. of Fig. 7, the relation between gap voltage (Vg) and trigger voltage (Vf) such as below equation 3 expression.

[equation 2]

Vgini+Vs＞Vf

[equation 3]

Vgini+Vr＜Vf

Wherein Vgini is just at the cycle of setting up (SU) primary clearance voltage before, can be as can be seen from Figure 7.

Consider the problems referred to above, being used for making it possible to can be by 4 expression of following equation in erase cycle (EP) and the normal initialized gap voltage condition (or wall voltage condition) of carrying out of reset cycle (RP), and it satisfies equation 2 and equation 3.

[equation 4]

Vf-Vr＜Vgini＜Vf-Vs

As a result, if the cycle of setting up (SU) before primary clearance voltage (Vgini) do not satisfy the condition of equation 4, existing plasma display panel device may produce erroneous discharge, misplace electricity and improper discharge, and has narrow work allowance.In other words, for guaranteeing operational reliability and the operation allowance in the existing plasma display panel device, should normally carry out the erase operation in erase cycle (EP).But, may carry out erase operation according to the homogeneity of discharge cell and the serviceability temperature of PDP, as mentioned above improperly.

In addition, in existing plasma display panel device, because the too much space charge that under hot environment, takes place and because the unstable wall CHARGE DISTRIBUTION that the amount of the active movement of space voltage causes can produce erroneous discharge, misplace electricity and improper discharge.Therefore, because narrowing down, the work allowance goes wrong.This will describe in detail to 8c with reference to figure 8a.

Fig. 8 a is to have illustrated when under hot environment to 8c, when driving Plasmia indicating panel according to as shown in Figure 5 drive waveforms, and the view of the performance of space charge and space charge.

The amount of the space charge that produces under discharge scenario under hot environment and its amount of exercise are greater than under room temperature or the low temperature.Therefore, keeping in the discharge of (n-1) son (SFn-1), produce a large amount of space charges.Even just n (SFn) set up the cycle (SU) afterwards, a large amount of space charges 300 in discharge space keep active, shown in Fig. 8 a.

If have therein in the state that the space charge 300 of active movement exists in discharge space, during addressing period, data voltage (Va) is added to addressing electrode X and scanning voltage (Vy) is added to scan electrode Y, as scheme shown in a, result as the foundation in the cycle of setting up (SU) discharge, negative space charge 300 and the negative wall electric charge of accumulating on scan electrode Y reconfigure, and result as the foundation in the cycle of setting up (SU) discharge, negative space charge 300 also and the positive wall electric charge of on addressing electrode X, accumulating reconfigure, shown in Fig. 8 b.

As a result, shown in Fig. 8 c, by setting up the negative wall electric charge on the scan electrode Y that discharge forms and being wiped free of by the positive wall electric charge of setting up on the addressing electrode X that forms that discharges.(Vy) be added to addressing electrode X and scan electrode Y, gap voltage (Vg) does not reach trigger voltage (Vf) though with data voltage (Va) and scanning voltage.Therefore, do not produce address discharge.Therefore, if drive waveforms as shown in Figure 5 is added to the PDP that uses under hot environment, because the mistake that the unit is opened in frequent generation writes and has problems.

Fig. 8 d shows the view according to the erroneous discharge that temperature determined of the plasma display panel device of the drive waveforms operation of the driving method that depends on prior art.

With reference to figure 8d, in the plasma display panel device of operating according to the drive waveforms of the driving method that depends on prior art, in the situation that temperature around the panel is high relatively, the ratio that wherein space electric charge 401 and wall electric charge 400 reconfigure in discharge cell increases therein.Therefore, reduce, produce erroneous discharge because participate in the absolute magnitude of the wall electric charge of discharge.Above-mentioned space charge 401 is the electric charges that exist in the space in discharge cell, and unlike wall electric charge 400, does not participate in discharge.

For example, the ratio that wherein space electric charge 401 and wall electric charge 400 reconfigure in addressing period in discharge cell increases, and participates in the amount minimizing of the wall electric charge 400 of address discharge.This makes the address discharge instability.In this case, when the order of addressing is more leaned on the back, can fully guarantee wherein can reconfigure the time of space charge 401 and wall electric charge 400.This further makes the address discharge instability.Therefore, produce the high temperature erroneous discharge, in the cycle of keeping, close such as the discharge cell of in addressing period, opening.

In addition, in the situation that the temperature around the panel is high relatively, keep discharge if produce in the cycle of keeping therein, the speed of space charge 401 accelerates at interdischarge interval.This has increased the ratio that space charge 401 and wall electric charge 400 reconfigure.Therefore, because 400 reconfiguring after any one keeps discharge of space charge 401 and wall electric charge, the amount that the wall electric charge 400 of discharge is kept in participation reduces, and this has hindered the generation next one and has kept discharge.Therefore, go wrong because produce the high temperature erroneous discharge.

Summary of the invention

Therefore, the objective of the invention is to solve at least prior art problems and shortcoming.

The purpose of this invention is to provide a kind of plasma display panel device and driving method thereof, stable discharging under hot environment wherein, and, prevent electrical damage to driver IC according to selected one or more execution scannings in a plurality of scan types.

Plasma display panel device of the present invention comprises: Plasmia indicating panel, and it comprises a plurality of scan electrodes, a plurality ofly keeps electrode and intersects a plurality of scan electrodes and keep a plurality of data electrodes of electrode; And controller, it is used for using at addressing period the one scan scan electrode of the different a plurality of scan types of the order wherein scan a plurality of scan electrodes, data pulse is added to data electrode corresponding to a scan type, and be controlled at difference between application time of last application time of keeping pulse of keeping pulse and reset pulse greater than the difference between two application time of keeping pulse at least one height field of frame, this keeps pulse is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

The invention provides a kind of plasma display panel device, it comprises: Plasmia indicating panel, and it comprises a plurality of scan electrodes, a plurality ofly keeps electrode and intersects a plurality of scan electrodes and a plurality of a plurality of data electrodes of keeping electrode; And controller, it is used for using at addressing period the one scan scan electrode of the different a plurality of scan types of the order wherein scan a plurality of scan electrodes, data pulse is added to data electrode corresponding to a scan type, with at least one height field of frame, be controlled between application time of last application time of keeping pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, the pulse of keeping that this is last is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

In addition, the present invention also provides a kind of plasma display panel device, and it comprises: Plasmia indicating panel, and it comprises a plurality of scan electrodes, is parallel to a plurality of data electrodes of keeping electrode and cross scan electrode and keeping electrode of scan electrode; And controller, it is in second datagraphic of first datagraphic of the data image that is different from the picture data of importing in addressing period, with the scanning sequency scanning scan electrode of a plurality of scan electrodes of being different from first datagraphic; Data pulse is added to data electrode corresponding to the scanning sequency of a plurality of scan electrodes; With at least one height field of frame, control keep between application time of application time of keeping pulse at last of pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, this pulse of keeping at last of keeping pulse is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

Further, the present invention also provides a kind of method that drives plasma display panel device, this plasma display device comprises a plurality of scan electrodes, a plurality ofly keep electrode and intersect a plurality of scan electrodes and keep a plurality of data electrodes of electrode, this method comprises: the one scan scan electrode that uses the different a plurality of scan types of the order that wherein scans a plurality of scan electrodes in addressing period; Application data bursts is to the data electrode corresponding to a scan type, with at least one height field of frame, control keep at last between application time of application time of pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, this keeps pulse at last is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

The present invention can reduce generating noise and the stable discharging of PDP under hot environment.Therefore can prevent to produce the erroneous discharge that depends on temperature.

Description of drawings

To be described in detail with reference to the attached drawings the present invention, the element that wherein detailed numeral is similar.

Fig. 1 shows the view of the structure of general PDP;

Fig. 2 is the view that has schematically shown the arrangement of electrodes of three-electrode surface discharge type PDP;

Fig. 3 is the view that the method for the image gray levels of realizing prior art ionic medium display device has been described;

Fig. 4 is the view of equivalent capacity (C) that PDP has been described;

Fig. 5 shows the oscillogram of example of the drive waveforms of general PDP;

Fig. 6 a is the view that shows basis drive waveforms as shown in Figure 5 wall CHARGE DISTRIBUTION that change, in discharge cell length by length to 6e;

Fig. 7 illustrated when driving PDP according to as shown in Figure 5 drive waveforms, in the cycle of setting up at scan electrode with keep applied external voltage in the electric discharge between electrodes unit and the view of the variation of gap voltage;

Fig. 8 a is to have illustrated under hot environment to 8c, drive the view of the expression of PDP time space electric charge and space charge according to as shown in Figure 5 drive waveforms, and Fig. 8 d is the view that the erroneous discharge that depends on temperature has been described;

Fig. 9 a and 9b are the views that has illustrated according to the driving method of the plasma display panel device of first embodiment of the invention;

Figure 10 is the view that the displacement current amount that depends on input image data has been described;

Figure 11 a and 11b have illustrated the view of considering view data change scanning sequency and therefore changing the illustrative methods of displacement current;

Figure 12 is the view that has illustrated according to the Another Application example of the driving method of the plasma display panel device of first embodiment of the invention;

Figure 13 has illustrated to be used to realize driving the structure of scanner driver of method of plasma display panel device and the view of operation according to first embodiment of the invention;

Figure 14 shows the basic circuit piece that comprises in the data comparator 1000 that comprises in the scanner driver according to the plasma display panel device of first embodiment of the invention;

Figure 15 describes the view that first to the 3rd of data comparator determines the work of unit in detail;

Figure 16 shows and depend on first to the 3rd decision unit 734-1 that comprises, the table of the graphical content of the view data of the output signal of 734-2 and 734-3 in the basic circuit piece according to the data comparator of first embodiment of the invention;

Figure 17 is the block diagram according to the data comparator 1000 of the scanner driver of the plasma display panel device of first embodiment of the invention and scanning sequency decision unit 1001;

Figure 18 shows the table of graphical content of the determined view data of output signal of first to the 3rd decision unit XOR1, XOR2 and the XOR3 that comprise in the data comparator of first embodiment of the invention;

Figure 19 is another structure of the basic circuit piece that comprises in the data comparator 1000 that comprises in the scanner driver that has illustrated according to the plasma display panel device of first embodiment of the invention;

First to the 9th decision unit XOR1 that comprises in the circuit block of Figure 19 that Figure 20 shows in first embodiment of the invention is to the table of the graphical content of the determined view data of output signal of XOR9;

Figure 21 be consider Figure 19 and 20 according to the data comparator 1000 of the scanner driver of the plasma display panel device of first embodiment of the invention and the block diagram of scanning sequency decision unit 1001;

Figure 22 is the block diagram according to the embodiment of wherein each son data comparator of using of first embodiment of the invention and scanning sequency decision unit;

Figure 23 is the view according to selection basis illustrative methods of the son field of any one scanning scan electrode Y of a plurality of scan types in a frame of first embodiment of the invention;

Figure 24 has illustrated according to the first embodiment of the invention view that scanning sequency can differ from one another in the figure of two different images data;

Figure 25 be illustrated according to first embodiment of the invention pass through critical value is set and the view of the illustrative methods of gated sweep order according to viewdata graphics;

Figure 26 has illustrated that according to first embodiment of the invention decision is corresponding to the view of the illustrative methods of the scanning sequency of scan electrode group, and each scan electrode group comprises a plurality of scan electrode Y;

Figure 27 illustrated according to second embodiment of the invention, is controlled at the last application time of keeping pulse and the view of the method for the difference between the application time of the reset pulse that applies in the reset cycle of next height field;

Figure 28 has illustrated the view of reason of keeping the application time of pulse according to the control of second embodiment of the invention;

Figure 29 is the view that describes the application time of keeping pulse in detail;

Figure 30 is according to second embodiment of the invention, and the view of the other method of the difference between application time of the reset pulse that is controlled at the last application time of keeping pulse and applies in the reset cycle of next height field has been described;

Figure 31 has illustrated according to second embodiment of the invention, the oscillogram of the example of the driving method of plasma display panel device;

Figure 32 has illustrated according to second embodiment of the invention, the oscillogram of another example of the driving method of plasma display panel device;

Figure 33 has illustrated according to second embodiment of the invention, the oscillogram of the another example of the driving method of plasma display panel device;

Figure 34 a is the view that shows the wall CHARGE DISTRIBUTION in the discharge cell that changes according to as shown in figure 33 drive waveforms length by length to 34e;

Figure 35 shows the oscillogram according to the drive waveforms of the sub-field duration of residue except the first sub-field duration in the another example of the method for the driving plasma display panel device of second embodiment of the invention;

Figure 36 shows the mode of the drive waveforms by as shown in figure 35, just the view of the wall CHARGE DISTRIBUTION that forms in discharge cell after the cycle of keeping;

Figure 37 is the drive waveforms that has illustrated according to shown in Figure 33 and 35, the wall CHARGE DISTRIBUTION in the discharge cell that formed before the cycle of setting up and the view of gap voltage;

Figure 38 illustrated when driving PDP according to drive waveforms shown in Figure 33 and 35, in the cycle of setting up at scan electrode with keep the view of the variation of the applied external voltage in discharge cell and gap voltage between the electrode;

Figure 39 is the mode of example that the drive waveforms of the prior art by as shown in Figure 5 has been described, erase cycle and during the reset cycle at the view of the change of keeping electrode upper wall charge polarity;

Figure 40 is the mode that has illustrated by the drive waveforms shown in Figure 33 and 35, in the reset cycle at the view of the change of keeping the wall charge polarity on the electrode;

Figure 41 shows according to second embodiment of the invention, depends on the another example of the method that drives plasma display panel device, the view of the drive waveforms of the first sub-field duration in the driving method of plasma display panel device;

Figure 42 shows according to second embodiment of the invention, depends on the another example of the method that drives plasma display panel device, the oscillogram of the drive waveforms of the sub-field duration of residue in the driving method of plasma display panel device outside the first sub-field duration;

Figure 43 shows according to second embodiment of the invention, depends on the oscillogram of driving method of plasma display panel device of the another example of the method that drives plasma display panel device;

Figure 44 shows the block diagram according to the structure of the plasma display panel device of the embodiment of the invention.

Embodiment

The preferred embodiments of the present invention will be described with reference to the accompanying drawings in further detail.

Fig. 9 a and 9b are the views that has illustrated according to the driving method of the plasma display panel device of first embodiment of the invention.

At first with reference to figure 9a, in method, drive plasma display panel device in a frame, to be divided into reset cycle, addressing period and to keep the drive waveforms in cycle, as mentioned above according to the driving plasma display panel device of first embodiment of the invention.

Setting up in the cycle of reset cycle, (Ramp-up) is added to scan electrode Y with the rising edge waveform.The rising edge waveform produces weak dark discharge in the discharge cell of this screen.Rising edge discharge causes that also positive wall electric charge is at data electrode X with keep and accumulate on the electrode Z and cause that negative wall electric charge accumulates on scan electrode Y.

Removing in the cycle of reset cycle, after the rising edge waveform is added to scan electrode Y, the negative edge waveform (Ramp-down) that drops to the predetermined voltage level that is lower than ground (GND) level voltage from the positive voltage of the crest voltage that is lower than the rising edge waveform produces weak dark discharge discharge cell, fully wipe on scan electrode Y the excessively wall electric charge of formation thus.Removing discharge makes the wall electric charge be able to the discharge of stable generation data evenly to stay the degree in the unit.

In addressing period, will be added to scan electrode Y from the negative scanning impulse that scan reference voltage (Vsc) descends, scanning scan electrode Y.Positive data pulse is added to data electrode X corresponding to scanning impulse.

When the wall voltage that is added on the voltage difference between scanning impulse and the data pulse and in the reset cycle, produces, in the discharge cell of having used data pulse, produce address discharge.In the discharge cell of selecting by address discharge, form the wall electric charge that wherein when voltage (Vs) is kept in application, can produce the degree of discharge.

In this case, when a plurality of scan electrode Y of scanning in addressing period, according to the one scan scan electrode Y of the different a plurality of scan types of the scanning sequency of a plurality of scan electrode Y wherein.

For example, shown in Fig. 9 a, by using first scanning impulse (SP1) can at first scan a plurality of scan electrodes to scan electrode Y1 scan electrode Y1.Can scan next scan electrode Y2 by applying second scanning impulse (SP2) to scan electrode Y2 afterwards.Can scan next scan electrode Y3 by applying the 3rd scanning impulse (SP3) to scan electrode Y3 afterwards.This will be discussed in more detail below.

Keeping in the cycle after addressing period will be kept pulse (Sus) and alternately be added to scan electrode Y and keep the one or more of electrode Z.No matter when wall voltage in being added on discharge cell and when keeping pulse applies and keeps pulse, in the discharge cell of being selected by address discharge, at scan electrode Y with keep to produce between the electrode Z and keep discharge, just, shows discharge.

Keep in the cycle keeping the application time of keeping pulse (SUSL) at last of keeping pulse that is added to scan electrode Y in the cycle and in the reset cycle of next height field, being added to difference (Ws1) between application time of reset pulse of scan electrode Y at least one height field of frame greater than the difference between the application time of keeping pulse at two at this.

Fig. 9 a only shows wherein with the last situation that pulse (SUSL) is added to scan electrode Y of keeping.But, last keep pulse (SUSL) and also can be added to and keep electrode Z.

In Fig. 9 a, last keep pulse (SUSL) afterwards with finishing to apply, the voltage of scan electrode Y remains on the voltage of ground level (GND), makes in last application time of keeping pulse (SUSL) and the difference that is added in the reset cycle of next height field between application time of reset pulse of scan electrode Y big relatively.But, can be set in other method long relatively in last application time of keeping pulse (SUSL) and the difference that in the reset cycle of next height field, is added between application time of reset pulse of scan electrode Y.This is shown in Fig. 9 b.

With reference to figure 9b, by increasing the last pulse width of keeping pulse (SUSL), can be with in the last application time of keeping pulse (SUSL) with in the reset cycle of next height field, be added to difference between application time of reset pulse of scan electrode Y that ground is set is big relatively.

To describe in detail below wherein will the last application time of keeping pulse (SUSL) and in the reset cycle of next height field, be added to difference between application time of reset pulse of scan electrode Y be provided with big relatively method.

In this case, describe in detail to use the method for a plurality of scan electrode Y of one scan of the different a plurality of scan types of the order that wherein scans a plurality of scan electrode Y below.

The key factor that determines one of a plurality of scan types is displacement current (Id) amount according to view data.This will describe with reference to Figure 10.

Figure 10 is the view that the displacement current amount of the view data that depends on input has been described.

With reference to Figure 10, in (a),, just, when scanning impulse being provided to the second scan electrode Y2,, provide the view data of alternating logic value to Xm such as data electrode X1 with 1 (height) and 0 (low) to data electrode as the scanning second scan electrode Y2.In addition, when scanning the 3rd scan electrode Y3, data electrode X keeps logical value 0.Logical value 1 is the voltage of wherein data pulse, and just, wherein the state of application data voltage (Vd) is corresponding to the state of data electrode X.Logical value 0 is wherein to use 0V to the state of corresponding data electrode X, just, and the state of application data voltage (Vd) not wherein.

In other words, its logical value is added to a discharge cell on the scan electrode Y in the view data that replaces between 1 and 0.The view data of maintenance logical value 0 is added to the discharge cell on the next scan electrode Y.At this moment, the displacement current (Id) that flows through each data electrode X can be represented with expression 1.

[equation 1]

Id＝1/2(Cm1+Cm2)Vd

Id: the displacement current that flows through each data electrode X

Cm1: the equivalent capacity between data electrode X

Cm2: at data electrode X and scan electrode Y or at data electrode X with keep equivalent capacity between the electrode Z

Vd: the voltage that is added to the data pulse of each data electrode X.

In (b), when the scanning second scan electrode Y2, the view data of its logical value maintenance 1 is provided to data electrode X1 to Xm.In addition, when scanning during the 3rd scan electrode Y3, its logical value kept 0 view data be provided to data electrode X1 to Xm.Logical value 0 is the state that wherein 0V is added to the corresponding data electrode, just, and the state of application data voltage (Vd) not wherein, as mentioned above.

In other words, this is that wherein logical value remains 1 view data and is provided to discharge cell and its logical value on the scan electrode Y and remains the situation that 0 view data is provided to the discharge cell on the next scan electrode Y.In addition, this for its logical value wherein remain 0 view data be provided to one on the scan electrode Y discharge cell and its logical value is remained the situation that 1 view data is provided to the discharge cell on the next scan electrode Y also is feasible.At this moment, the displacement current (Id) that flows through each data electrode X can be represented with following equation 2.

[equation 2]

Id＝1/2(Cm2)Vd

Id: the displacement current that flows through each data electrode X

Vd: the voltage that is added to the data pulse of each data electrode X

In (c), when the scanning second scan electrode Y2, the view data that its logical value is alternately changed between 1 and 0 is provided to data electrode X1 to Xm.In addition, when scanning during the 3rd scan electrode Y3, provide its logical value to make the phase place of view data from phase place phase shift 180 degree of the view data that is added to the discharge cell on the second scan electrode Y2 in the view data that alternately changes between 1 and 0.

In other words, its logical value is provided to a discharge cell on the scan electrode Y in the view data that alternately changes between 1 and 0.Its logical value is provided to discharge cell on next scan electrode Y in the view data that alternately changes between 1 and 0, makes this view data have from the phase place of phase place phase shift 180 degree of the view data that is added to a discharge cell on the scan electrode Y.The displacement current (Id) that flows through each data electrode X can be by 3 expressions of following equation.

[equation 3]

Id＝1/2(4Cm1+Cm2)Vd

Id: the displacement current that flows through each data electrode X

Vd: the voltage that is added to the data pulse of each data electrode X

In (d), when the scanning second scan electrode Y2, the view data that its logical value is alternately changed between 1 and 0 is provided to data electrode X1 to Xm.In addition, when scanning during the 3rd scan electrode Y3, provide its logical value to make the phase place of view data identical with the phase place of view data of discharge cell on being added to the second scan electrode Y2 in the view data that alternately changes between 1 and 0.

In other words, its logical value is provided to a discharge cell on the scan electrode Y in the view data that alternately changes between 1 and 0.Its logical value is provided to discharge cell on next scan electrode Y in the view data that alternately changes between 1 and 0, makes this view data have the phase place identical with the phase place of the view data that is added to a discharge cell on the scan electrode Y.At this moment, the displacement current (Id) that flows through each data electrode X can be represented by following equation 4.

[equation 4]

Id＝0

Id: the displacement current that flows through each data electrode X

Cm2: between data electrode X and scan electrode Y or at data electrode X with keep equivalent capacity between the electrode Z

Vd: the voltage that is added to the data pulse of each data electrode X

In (e), when scanning scan electrode Y2, the view data of its logical value maintenance 0 is provided to data electrode X1 to Xm.In addition, when scanning during the 3rd scan electrode Y3, its logical value remains 0 view data and is provided to data electrode X1 to Xm.

In other words, its logical value remains 0 view data and is provided to discharge cell on a scan electrode Y, and its logical value remains 0 view data and is provided to discharge cell on the next scan electrode Y.

In addition, this remains 1 view data for its logical value wherein and is provided to discharge cell on a scan electrode Y, and its logical value to remain the situation that 1 view data is provided to the discharge cell on the next scan electrode Y also be feasible.At this moment, the displacement current (Id) that flows through each data electrode X can be represented by following equation 5.

[equation 5]

Id＝0

Id: the displacement current that flows through each data electrode X

Vd: the voltage that is added to the data pulse of each data electrode X

From equation 1 to 5, wherein its logical value is provided to a discharge cell on the scan electrode Y in the view data of alternate between 1 and 0 as can be seen, and its logical value is provided to discharge cell on next scan electrode Y in the view data of alternate between 1 and 0, makes the phase place of view data have the most significant digit that flows through data electrode X and move electric current from the situation of phase place phase shift 180 degree of the view data of the discharge cell that is added to a scan electrode Y.

Simultaneously, as can be seen, wherein its logical value is provided to a discharge cell on the scan electrode Y in the view data of alternate between 1 and 0, and its logical value is provided to discharge cell on next scan electrode Y in the view data of alternate between 1 and 0, make the phase place situation identical of view data with the phase place of the view data of the discharge cell that is added to a scan electrode Y, and wherein logical value is remained 0 view data be added to one on the scan electrode Y discharge cell and the situation of the discharge cell on the next scan electrode Y have the minimum displacement current that flows through data electrode X.

From the description of Figure 10, alternately provide in the situation of view data as can be seen therein with Different Logic level, shown in Figure 10 (c), the highest displacement current flows, and data driver IC to stand the probability of maximum electrical damage the highest in this situation.

In other words, from the viewpoint in response to the data driver IC of a data electrode X, the view data shown in Figure 10 (c) is corresponding to the highest situation of switching number of data driver IC wherein.Therefore, the blocked operation number of data driver IC is big more as can be seen, and the displacement current that flows through data driver IC is big more, and data driver IC to stand the probability of electrical damage high more.

To the example of considering these view data change scanning sequencies and therefore changing displacement current be described with reference to figure 11a and 11b.

From Figure 11 a and 11b, Figure 11 a shows identical view data with 11b as can be seen, except their scanning sequency, just, the order of scanning.

At first with reference to figure 11a, provide therein in the situation of the view data of the figure of figure shown in (b), if with the sequential scanning scan electrode Y identical with (a), because the logical value of view data arranges that therein the frequency that changes on the direction of scan electrode Y is frequent relatively, produce high relatively displacement current.

If the scanning sequency of adjusting scan electrode Y once more is for shown in Figure 11 b (a), the result arranges the view data of this figure shown in Figure 11 b (b).In this case, because the logical value of view data arranges that therein the frequency that changes on the direction of scan electrode Y reduces, the displacement current of generation reduces.

As a result, if according to the scanning sequency of the view data gated sweep electrode Y shown in Figure 11 b, the displacement current amount that flows through data driver IC reduces, and the probability that data driver IC stands electrical damage reduces.

Generate method based on the principle of Figure 11 a and 11b according to driving plasma display panel device of the present invention.To Another Application example according to the method for driving plasma display panel device of the present invention be described with reference to Figure 12.

Figure 12 is the view that has illustrated according to another example of the driving method of the plasma display panel device of first embodiment of the invention.

With reference to Figure 12, can use four scan types according to the method for driving plasma display panel device of the present invention, just, the first kind (Class1), second type (type 2) is carried out scanning for selected one of the 3rd type (type 3) and the 4th type (type 4), as shown in figure 12.

In the scanning sequency of first scan type (Class1), with wherein according to Y1-Y2-Y3-... arrange the order execution scanning of scan electrode Y.

In the scanning sequency of second scan type (type 2), sequential scanning belongs to first group scan electrode Y, and sequential scanning belongs to second group scan electrode Y.In other words, scanning scan electrode Y1-Y3-Y5-..., Yn-1, and scanning scan electrode Y2-Y4-Y6-..., Yn.

In the scanning sequency of the 3rd scan type (type 3), after sequential scanning belonged to the scan electrode Y that first group scan electrode Y and sequential scanning belong to second group, sequential scanning belonged to the 3rd group scan electrode Y.In other words, at scanning scan electrode Y1-Y4-Y7-..., Yn-2 and scanning scan electrode Y2-Y5-Y8-..., after the Yn-1, scanning scan electrode Y3-Y6-Y9-..., Yn.

In the scanning sequency of the 4th scan type (type 4), belong to first group scan electrode Y in sequential scanning, sequential scanning belongs to after the scan electrode Y that second group scan electrode Y and sequential scanning belong to the 3rd group, and sequential scanning belongs to the 4th group scan electrode Y.In other words, at scanning scan electrode Y1-Y5-Y9-..., Yn-3, scanning scan electrode Y2-Y6-Y10 ..., Yn-2, scanning scan electrode Y3-Y7-Y11 ..., after the Yn-1, scanning scan electrode Y4-Y8-Y12-..., Yn.

In Figure 12, show a selected method that scans scan electrode Y of using four kinds of scan methods.But, the invention is not restricted to said method, use multiple scan type, such as two kinds of scan types, the method for a selected scanning scan electrode Y of three kinds of scan types or five kinds of scan types also is fine.

To describe the structure of the scanner driver 202 of Fig. 2 with reference to Figure 13 in detail, it is used to use the one scan scan electrode Y of a plurality of scan types.

Figure 13 has illustrated to be used to realize according to the structure of the scanner driver of the driving method of the plasma display panel device of first embodiment of the invention and the view of operation.

With reference to Figure 13, be used to realize comprise data comparator 1000 and scanning sequency decision unit 1001 according to the scanner driver of the method for driving plasma display panel device of the present invention.

Data comparator 1000 receives the view data by 204 mappings of a son map unit, it uses a plurality of scan types, comes the displacement calculating magnitude of current by the view data of the unit set on view data that relatively constitutes the unit set that is positioned at the one or more discharge cells on the specific scan electrode Y line and the vertical and horizontal direction that is positioned at unit set.

Term " unit set " refers to set to form one or more unit of a unit.For example because corresponding to the unit combination of R, G and B to form a pixel, pixel is corresponding to unit set.

Based on the information about the displacement current amount about being calculated by data comparator 1000, scanning sequency decision unit 1001 uses the scan type decision scanning sequency with minimum displacement current.

The information about scanning sequency by scanning sequency decision unit 1001 decisions is applied to data alignment device 205.This data alignment device 205 is aimed at the view data of carrying out a son mapping according to the scanning sequency that is determined by above-mentioned scanning sequency decision unit 1001 by a son map unit 240 again, provides the view data of aiming at again to arrive data electrode X.

The formation of the scanner driver 202 of Figure 13 will be described in conjunction with Figure 12.If calculate about the displacement current amount of four kinds of scan types of Figure 12 data comparator 1000 by Figure 13, and the information about the displacement current amount of four kinds of scan types is applied to scanning sequency decision unit 1001, the displacement current amount that scanning sequency decision unit 1001 compares about four kinds of scan types, and select to have a scan type of minimum displacement current.For example, suppose that the displacement current amount about first scan type is 10, displacement current amount about second scan type is 15, displacement current amount about the 3rd scan type is 11, and the displacement current amount about the 4th scan type is 8, the 4th scan type is selected in scanning sequency decision unit 1001, and determines the scanning sequency of scan electrode Y according to selected the 4th scan type.

Simultaneously, if about four kinds of scan types, just, except the displacement current amount of all scan types of first, third and fourth scan type of second scan type enough low, make it not cause the electrical damage to the data driver IC, any one of first, third and fourth scan type can be selected in scanning sequency decision unit 1001.

In this case, can set in advance about enough low not cause information to the electrical damage of data driver IC.In other words, enough low not cause that the maximum current value to the electrical damage of data driver IC is set to critical value.Can select the scan type of the displacement current subcritical value that wherein produces.

To describe data comparator shown in Figure 13 1000 in detail with reference to Figure 14.

Figure 14 shows the basic circuit piece that comprises in the data comparator 1000 that comprises in the scanner driver according to the plasma display panel device of first embodiment of the invention.

As shown in figure 14, in plasma display panel device of the present invention, the basic circuit piece that comprises in the data comparator 1000 of scanner driver comprises storage unit 731, the first buffer memory Buf1, the second buffer memory Buf2, first to the 3rd decision unit 734-1,734-2 and 734-3, demoder 735, first to the 3rd adds and unit 736-1,736-2 and 736-3, first to the 3rd electric current counter 737-1,737-2 and 737-3 and electric current add and unit 738.

Corresponding to (l-1) scan electrode, just, the view data of (l-1) scanning electrode wire is stored in the storage unit 731.Input is corresponding to the l scan electrode, just, and the view data of l scanning electrode wire.

The interim storage of the first buffer memory Buf1 is corresponding to the view data of (q-1) discharge cell of the discharge cell of l scanning electrode wire.

The interim storage of the second buffer memory Buf2 is corresponding to the view data of (q-1) discharge cell of the discharge cell that is stored in (l-1) scanning electrode wire in the storage unit 731.

The first decision unit 734-1 comprises the XOR gate element, and it compares the view data and the view data that is stored in (q-1) discharge cell of the l scanning electrode wire among the first buffer memory Buf1 of the q discharge cell of l scanning electrode wire.Result as a comparison, if two view data differ from one another, the first decision unit 734-1 output 1.If two view data are mutually the same, the first decision unit 734-1 output 0.

The second decision unit 734-2 comprises the XOR gate element, and it compares the view data and the view data that is stored in (q-1) discharge cell of (l-1) scanning electrode wire among the second buffer memory Buf2 of the q discharge cell of (l-1) scanning electrode wire.Result as a comparison, if two view data differ from one another, the second decision unit 734-2 output 1.If two view data are mutually the same, the second decision unit 734-2 output 0.

The 3rd decision unit 734-3 comprises the XOR gate element, and it relatively is stored in the view data and the view data that is stored in (q-1) discharge cell of (l-1) scanning electrode wire among the second buffer memory Buf2 of (q-1) discharge cell of (l-1) scanning electrode wire among the first buffer memory Buf1.Result as a comparison, if two view data differ from one another, the 3rd decision unit 734-3 output 1.If two view data are mutually the same, the 3rd decision unit 734-3 output 0.

To be described in detail in the operation of first to the 3rd decision unit that comprises in the basic circuit piece of data comparator 1000 of above-mentioned structure with reference to Figure 15.

Figure 15 is the operation that describes first to the 3rd decision unit of data comparator in detail.1., 2. and 3. corresponding to the first decision unit 734-1, second determines unit 734-2, the work of the 3rd decision unit 734-3.

With reference to Figure 15, data comparator of the present invention 1000 uses the first decision unit 734-1 to the, three decision unit 734-3 relatively to be positioned at the view data of the adjacent cells of the level of a unit and vertical direction and the variation in definite view data.

Demoder 735 outputs are corresponding to first to the 3rd decision unit 734-1,3 bit signals of the output signal of each of 734-2 and 734-3.

Figure 16 shows first to the 3rd decision unit 734-1 that comprises in the basic circuit piece that depends on according to the data comparator of first embodiment of the invention, the table of the graphical content of the view data of the output signal of 734-2 and 734-3.

With reference to Figure 16, if first to the 3rd decision unit 734-1, the output signal of each of 734-2 and 734-3 is (0,0,0), and the Graphic State of this and view data shown in Figure 10 (a) is identical.If output signal is (0,0,0), displacement current (Id) is 0.

If first to the 3rd decision unit 734-1, the output signal of each of 734-2 and 734-3 is (0,0,1), and the Graphic State of this and view data shown in Figure 10 (b) is identical.Therefore, if output signal is (0,0,1), displacement current (Id) and Cm2 are directly proportional.

If first to the 3rd decision unit 734-1, the output signal of each of 734-2 and 734-3 is (0,1,0), (0,1,1), any one of (1,0,0) and (1,0,1), the Graphic State of this and view data shown in Figure 10 (a) is identical.Therefore, if output signal is (0,1,0), (0,1,1), any one of (1,0,0) and (1,0,1), displacement current (Id) and (Cm1+Cm2) be directly proportional.

If first to the 3rd decision unit 734-1, the output signal of each of 734-2 and 734-3 is (1,1,0), and the Graphic State of this and view data shown in Figure 10 (d) is identical.Therefore, if output signal is (1,1,0), displacement current (Id) is 0.

If first to the 3rd decision unit 734-1, the output signal of each of 734-2 and 734-3 is (1,1,1), and the Graphic State of this and view data shown in Figure 10 (c) is identical.Therefore, if output signal is (1,1,1), displacement current (Id) and (4Cm1+Cm2) be directly proportional.

In addition, first to the 3rd of Figure 14 adds and unit 736-1, and 736-2 and 736-3 add and from the output number of the specific 3 bit signals output of demoder 735, and output adds and the result.

In other words, first adds and adds with unit 736-1 and wherein by demoder 735 output (0,1,0), (0,1,1), the number of any one of (1,0,0) and (1,0,1).Second adds the number that adds and wherein exported by demoder 735 (C2) (0,0,1) with unit 736-2.The 3rd adds the number that adds and wherein exported by demoder 735 (C3) (1,1,1) with unit 736-3.

First to the 3rd electric current counter 737-1,737-2,737-3 add and unit 736-1 from first respectively, and second adds and add with unit 736-2 and the 3rd and unit 736-3 receives C1, C2 and C3, and the displacement calculating magnitude of current.

Electric current adds and adds with unit 738 and by first to the 3rd electric current counter 737-1,737-2, the displacement current amount that 737-3 calculates.

Figure 17 is the block diagram according to the data comparator 1000 of the scanner driver in the plasma display panel device of first embodiment of the invention and scanning sequency decision unit 1001.

As shown in figure 17, in the plasma display panel device according to first embodiment of the invention, the data comparator 1000 of scanner driver has the structure that wherein connects four basic circuit pieces as shown in figure 17.The 1001 relatively outputs of four basic circuit pieces of scanning sequency decision unit are with the scanning sequency of the minimum displacement current of decision output.Figure 17 comprises as shown in figure 16 the situation of four scan types altogether corresponding to scan type wherein.In other words, Figure 17 shows corresponding to wherein from the data comparator 1000 and the scanning sequency decision unit 1001 of the situation of four scan types to scan type scanning scan electrode Y altogether.

Data comparator 1000 comprises first to the

4th storage unit

2001,2003,2005 and 2007, the first to the 4th electric

currents decision unit

2010,2030,2050 and 2070.In other words, storage unit and electric current decision unit are corresponding to as shown in figure 17 basic circuit piece.

First to the

4th storage unit

2001,2003,2005 and 2007 is connected to each other, and storage is corresponding to the view data of four scan electrodes (Y) line.In other words, 2001 storages of first storage unit are corresponding to the view data of (l-4) scan electrode (Y) line.2003 storages of second storage unit are corresponding to the view data of (l-3) scan electrode (Y) line.2005 storages of the 3rd storage unit are corresponding to the view data of (l-2) scan electrode (Y) line.2007 storages of the 4th storage unit are corresponding to the view data of (l-1) scan electrode (Y) line.

First electric current decision unit 2010 receives the view data of l scan electrode (Y) line and the view data of (l-4) scan electrode (Y) line, and it is stored in first storage unit 2001.If the electric current that has received first electric current decision unit 2010 of view data is lower than the electric current of second to the 4th electric

current decision unit

2030,2050 and 2070, the 4th scan type of scanning sequency and Figure 12 (type 4) is identical.In other words, with Y1-Y5-Y9-..., Y2-Y6-Y10-..., Y3-Y7-Y11-..., Y4-Y8-Y12-.... order carry out scanning.

The work of first electric current decision unit 2010 and basic circuit piece identical.View data corresponding to (l-4) scan electrode (Y) line is stored in first storage unit 2001, and input is corresponding to the view data of l scan electrode (Y) line.

The interim storage of the first buffer memory Buf1 is corresponding to the view data of (q-1) discharge cell of the discharge cell of l scan electrode (Y) line.

The interim storage of the second buffer memory Buf2 is corresponding to the view data of (q-1) discharge cell of the discharge cell that is stored in (l-4) scan electrode (Y) line in first storage unit 2001.

The first decision unit XOR1 comprises the XOR gate element, and it is the view data (l of the q discharge cell of l scan electrode (Y) line relatively, q) and be stored in (q-1) discharge cell of l scan electrode (Y) line among the first buffer memory Buf1 view data (l, q-1).Result as a comparison, if two data differ from one another, first decision unit XOR1 output valve=1.If two view data are mutually the same, first decision unit XOR1 output valve=0.

The second decision unit XOR2 comprises the XOR gate element, and it is the view data (l of (q-1) discharge cell of l scan electrode (Y) line relatively, q-1) and be stored in (q-1) discharge cell of (l-4) scan electrode (Y) line among the second buffer memory Buf2 view data (l-4, q-1).Result as a comparison, if two data differ from one another, second decision unit XOR2 output valve=1.If two view data are mutually the same, second decision unit XOR2 output valve=0.

The 3rd decision unit XOR3 comprises the XOR gate element, and it relatively is stored in the view data (l-4 of (q-1) discharge cell of (l-4) scan electrode (Y) line among the second buffer memory Buf2, q-1) and from the view data of the q discharge cell of (l-4) scan electrode (Y) line of first storage unit 901 output (l-4, q).Result as a comparison, if two data differ from one another, the 3rd decision unit XOR3 output valve=1st.If two view data are mutually the same, the 3rd decision unit XOR3 output valve=0th.

The first demoder Dec1 parallel receive first to the 3rd determines the output signal of unit XOR1, XOR2 and XOR3 and exports 3 bit signals afterwards.

Figure 18 shows the table of graphical content of the view data of the output signal that depends on first to the 3rd decision unit XOR1, XOR2 and the XOR3 that comprise in the data comparator according to first embodiment of the invention.

With reference to Figure 18, the electric capacity of the decision displacement magnitude of current changes according to the output signal of first to the 3rd decision unit XOR1, the XOR2 and XOR3.

First to the 3rd adds with unit Int1, Int2 and Int3 adds and from the output number of specific 3 bit signals of first demoder Dec1 output, and output adds and the result.

In other words, first adds and adds with unit Int1 and (C1) wherein by first demoder Dec1 output (0,0,1), (0,1,1), the number of any one of (1,0,0) and (1,1,0).Second adds (0,1,0) that adds and (C2) exported by the first demoder Dec1 with unit Int2.The 3rd add with unit Int3 (add and) wherein by the number of first demoder Dec1 output (1,1,1).

First to the 3rd electric current counter Cal1, Cal2, Cal3 add and unit Int1 from first respectively, and second adds and add with unit Int2 and the 3rd and unit Int3 receives C1, C2 and C3, and the displacement calculating magnitude of current.

In other words, the first electric current counter Cal1 multiply by (Cm1+Cm2) with the output (C1) of unit Int1 and calculates the magnitude of current by adding first.This second electric current counter Cal2 multiply by Cm2 with the output (C2) of unit Int2 and calculates the magnitude of current by adding second.The 3rd electric current counter Cal3 multiply by (4Cm1+Cm2) with the output (C3) of unit Int3 and calculates the magnitude of current by adding the 3rd.

First electric current add will add by the displacement current amount that first to the 3rd electric current counter Cal1, Cal2 and Cal3 calculate with unit Add1 and.

With with the identical mode of operation of first electric current decision unit, second to the 4th electric

current decision unit

2030,2050 and 2070 is the adding and measure of the displacement calculating magnitude of current also.

The first decision unit XOR1 of second electric current decision unit 2030 comprises the XOR gate element, it is the view data (l of the q discharge cell of l scan electrode (Y) line relatively, q) and the view data of (q-1) discharge cell of l scan electrode (Y) line of in the first buffer memory Buf1, storing (l, q-1).Result as a comparison, if two view data differ from one another, the first decision unit XOR1 output 1.If two view data are mutually the same, the first decision unit XOR1 output 0.

The second decision unit XOR2 of second electric current decision unit 2030 comprises the XOR gate element, it is the view data (l of (q-1) discharge cell of l scan electrode (Y) line relatively, q-1) and the view data of (q-1) discharge cell of (l-3) scan electrode (Y) line of in the second buffer memory Buf2, storing (l-3, q-1).Result as a comparison, if two view data differ from one another, the second decision unit XOR2 output 1.If two view data are mutually the same, the second decision unit XOR2 output 0.

The 3rd decision unit XOR3 of second electric current decision unit 2030 comprises the XOR gate element, view data (the l-3 of (q-1) discharge cell of (l-3) scan electrode (Y) line that it is relatively stored in the second buffer memory Buf2, q-1) and from the view data of the q discharge cell of (l-3) scan electrode (Y) line of second storage unit 2003 output (l-3, q).Result as a comparison, if two view data differ from one another, the 3rd decision unit XOR3 output 1.If two view data are mutually the same, the 3rd decision unit XOR3 output 0.

In addition, the first decision unit XOR1 of the 3rd electric current decision unit 2050 comprises the XOR gate element, it is the view data (l of the q discharge cell of l scan electrode (Y) line relatively, q) and the view data of (q-1) discharge cell of l scan electrode (Y) line of in the first buffer memory Buf1, storing (l, q-1).Result as a comparison, if two view data differ from one another, the first decision unit XOR1 output 1.If two view data are mutually the same, the first decision unit XOR1 output 0.

The second decision unit XOR2 of the 3rd electric current decision unit 2050 comprises the XOR gate element, it is the view data (l of (q-1) discharge cell of l scan electrode (Y) line relatively, q-1) and the view data of (q-1) discharge cell of (l-2) scan electrode (Y) line of in the second buffer memory Buf2, storing (l-2, q-1).Result as a comparison, if two view data differ from one another, the second decision unit XOR2 output 1.If two view data are mutually the same, the second decision unit XOR2 output 0.

The 3rd decision unit XOR3 of the 3rd electric current decision unit 2050 comprises the XOR gate element, view data (the l-2 of (q-1) discharge cell of (l-2) scan electrode (Y) line that it is relatively stored in the second buffer memory Buf2, q-1) and from the view data of the q discharge cell of (l-2) scan electrode (Y) line of the 3rd storage unit 2005 output (l-2, q).Result as a comparison, if two view data differ from one another, the 3rd decision unit XOR3 output 1.If two view data are mutually the same, the 3rd decision unit XOR3 output 0.

The first decision unit XOR1 of the 4th electric current decision unit 2070 comprises the XOR gate element, it is the view data (l of the q discharge cell of l scan electrode (Y) line relatively, q) and the view data of (q-1) discharge cell of l scan electrode (Y) line of in the first buffer memory Buf1, storing (l, q-1).Result as a comparison, if two view data differ from one another, the first decision unit XOR1 output 1.If two view data are mutually the same, the first decision unit XOR1 output 0.

The second decision unit XOR2 of the 4th electric current decision unit 2070 comprises the XOR gate element, it is the view data (l of (q-1) discharge cell of l scan electrode (Y) line relatively, q-1) and the view data of (q-1) discharge cell of (l-1) scan electrode (Y) line of in the second buffer memory Buf2, storing (l-1, q-1).Result as a comparison, if two view data differ from one another, the second decision unit XOR2 output 1.If two view data are mutually the same, the second decision unit XOR2 output 0.

The 3rd decision unit XOR3 of the 4th electric current decision unit 2070 comprises the XOR gate element, view data (the l-1 of (q-1) discharge cell of (l-1) scan electrode (Y) line that it is relatively stored in the second buffer memory Buf2, q-1) and from the view data of the q discharge cell of (l-1) scan electrode (Y) line of the 4th storage unit 2007 output (l-1, q).Result as a comparison, if two view data differ from one another, the 3rd decision unit XOR3 output 1.If two view data are mutually the same, the 3rd decision unit XOR3 output 0.

Scanning sequency decision unit 1001 receives by first to the 4th electric

current decision unit

2010,2030,2050 and the 2070 displacement current amounts of calculating, and, or be lower than the scanning sequency of any one decision scan electrode Y of the scan type of the critical current that sets in advance according to the displacement current that wherein produces afterwards according to the electric current decision unit decision scanning sequency of the minimum displacement current of output.

For example, if scanning sequency decision unit 1001 determines that the displacement current amount that receives from second electric current decision unit 2030 is minimum, scanning sequency decision unit 1001 be provided with scanning sequency make with the identical mode of the 3rd scan type (type 3) of Figure 14, with Y1-Y4-Y7-..., Y2-Y5-Y8-, Y3-Y6-Y9-..., order carry out scanning.

In addition, if scanning sequency decision unit 1001 determines that the displacement current amount that receives from the 3rd electric current decision unit 2050 is minimum, scanning sequency decision unit 1001 be provided with scanning sequency make with the identical mode of second scan type (type 2) of Figure 14, with Y1-Y3-Y5-, Y2-Y4-Y6-..., order carry out scanning.

In addition, if scanning sequency decision unit 1001 determines that the displacement current amount that receives from the 4th electric current decision unit 2070 is minimum, scanning sequency decision unit 1001 be provided with scanning sequency make with the identical mode of first scan type (Class1) of Figure 14, with Y1-Y2-Y3-Y4-Y5-Y6-,, order carry out scanning.

Simultaneously, in the plasma display panel device of the present invention that reference Figure 14 describes, the basic circuit piece that comprises in the data comparator 1000 of scanner driver is different from Figure 14 ground structure.This will describe with reference to Figure 19.

Figure 19 is the block diagram of another structure of the basic circuit piece that comprises in the data comparator 1000 that comprises in the scanner driver that has illustrated according to the plasma display panel device of first embodiment of the invention.

With reference to Figure 19, the basic circuit piece of Figure 19 passes through corresponding to the variation in the view data of R, G of the q on the l scanning electrode wire and (q-1) pixel and B unit, corresponding to the variation in the view data of R, the G of the q on (l-1) scanning electrode wire and (q-1) pixel and B unit, and, come the displacement calculating magnitude of current corresponding to the variation in the view data of R, the G of the q pixel on the l scanning electrode wire and (q-1) pixel on (l-1) scanning electrode wire and B unit.

The interim storage of first to the 3rd storage unit Memory1, Memory2 and Memory3 is corresponding to the view data of the R unit of (l-1) scanning electrode wire, corresponding to the view data of the G unit of (l-1) scanning electrode wire with corresponding to the view data of the B unit of (l-1) scanning electrode wire.

First to the 3rd decision unit XOR1, XOR2 and the XOR3 decision is corresponding to the variation between the view data of R, the G of the q pixel on the l scanning electrode wire and B unit.

In other words, the first decision unit XOR1 relatively corresponding to the view data of the R unit of the q pixel on the l scanning electrode wire (l, qR) and corresponding to the view data of the G unit of the q pixel on the l scanning electrode wire (l, qG).Result as a comparison, if two data differ from one another, the first decision unit XOR1 output logic value 1.If two data are mutually the same, the first decision unit XOR1 output logic value 0.

The second decision unit XOR2 relatively corresponding to the view data of the G unit of the q pixel on the l scanning electrode wire (l, qG) and corresponding to the view data of the B unit of the q pixel on the l scanning electrode wire (l, qB).Result as a comparison, if two data differ from one another, the second decision unit XOR2 output logic value 1.If two data are mutually the same, the second decision unit XOR2 output logic value 0.

The 3rd decision unit XOR3 relatively corresponding to the view data of the B unit of the q pixel on the l scanning electrode wire (l, qB) and corresponding to the view data of the R unit of (q-1) pixel on the l scanning electrode wire (l, q-1R).Result as a comparison, if two data differ from one another, the 3rd decision unit XOR3 output logic value 1.If two data are mutually the same, the 3rd decision unit XOR3 output logic value 0.

The the 4th to the 6th decision unit XOR4, XOR5 and XOR6 decision is corresponding to the variation between the view data of R, the G of the q pixel on (l-1) scanning electrode wire and B unit.

The 4th decision unit XOR4 relatively corresponding to the view data of the R unit of the q pixel on (l-1) scanning electrode wire (l-1, qR) and corresponding to the view data of the G unit of the q pixel on (l-1) scanning electrode wire (l-1, qG).Result as a comparison, if two data differ from one another, the 4th decision unit XOR4 output logic value 1.If two data are mutually the same, the 4th decision unit XOR4 output logic value 0.

The 5th decision unit XOR5 relatively corresponding to the view data of the G unit of the q pixel on (l-1) scanning electrode wire (l-1, qG) and corresponding to the view data of the B unit of the q pixel on (l-1) scanning electrode wire (l-1, qB).Result as a comparison, if two data differ from one another, the 5th decision unit XOR5 output logic value 1.If two data are mutually the same, the 5th decision unit XOR5 output logic value 0.

The 6th decision unit XOR6 relatively corresponding to the view data of the B unit of the q pixel on (l-1) scanning electrode wire (l-1, qB) and corresponding to the view data of the R unit of (q-1) pixel on (l-1) scanning electrode wire (l-1, q-1R).Result as a comparison, if two data differ from one another, the 6th decision unit XOR6 output logic value 1.If two data are mutually the same, the 6th decision unit XOR6 output logic value 0.

The the 7th to the 9th decision unit XOR7, XOR8 and XOR9 respectively by relatively corresponding to the view data of R, the G of the q pixel on the l scanning electrode wire and B unit with corresponding to R, the G of the q pixel on (l-1) scanning electrode wire and the view data of B, decide the variation between view data.

In other words, the 7th decision unit XOR7 relatively corresponding to the view data of the R unit of the q pixel on the l scanning electrode wire (l, qR) and corresponding to the view data of the R unit of the q pixel on (l-1) scanning electrode wire (l-1, qR).Result as a comparison, if two data differ from one another, the 7th decision unit XOR7 output logic value 1.If two data are mutually the same, the 7th decision unit XOR7 output logic value 0.

The 8th decision unit XOR8 relatively corresponding to the view data of the G unit of the q pixel on the l scanning electrode wire (l, qG) and corresponding to the view data of the G unit of the q pixel on (l-1) scanning electrode wire (l-1, qG).Result as a comparison, if two data differ from one another, the 8th decision unit XOR8 output logic value 1.If two data are mutually the same, the 8th decision unit XOR8 output logic value 0.

The 9th decision unit XOR9 relatively corresponding to the view data of the B unit of the q pixel on the l scanning electrode wire (l, qB) and corresponding to the view data of the B unit of the q pixel on (l-1) scanning electrode wire (l-1, qB).Result as a comparison, if two data differ from one another, the 9th decision unit XOR9 output logic value 1.If two data are mutually the same, the 9th decision unit XOR9 output logic value 0.

Demoder Dec output is corresponding to the output signal (Value1, Value2 and Value3) of first to the 3rd decision unit XOR1, the XOR2 and XOR3, output signal (the Value4 of the 4th to the 6th decision unit XOR4, XOR5 and XOR6, Value5 and Value6), and 3 bit signals of the output signal (Value7, Value8 and Value9) of the 7th to the 9th decision unit XOR7, XOR8 and XOR9.

Figure 20 shows first to the 9th decision unit XOR1 that comprises in the circuit block according to Figure 19 of first embodiment of the invention the table to the content figure of the determined view data of output signal of XOR9.

With reference to Figure 20, first to the 3rd adds with unit Int1, Int2 and Int3 adds and (C1, C2, C3) from the output number of 3 bit signals, this 3 bit signal is exported from demoder Dec, and correspond respectively to the output signal (Value1, Value2 and Value3) of first to the 3rd decision unit XOR1, XOR2 and XOR3, first to the 3rd adds with unit Int1, Int2 and Int3 output and adds and the result afterwards.

The the 4th to the 6th adds with unit Int4, Int5 and Int6 adds and (C4, C5, C6) from the output number of 3 bit signals, this 3 bit signal is exported from demoder Dec, and correspond respectively to the output signal (Value4, Value5 and Value6) of the 4th to the 6th decision unit XOR4, XOR5 and XOR6, output afterwards adds and the result.

The the 7th to the 9th adds with unit Int7, Int8 and Int9 adds and (C7, C8, C9) from the output number of 3 bit signals, this 3 bit signal is exported from demoder Dec, and correspond respectively to the output signal (Value7, Value8 and Value9) of the 7th to the 9th decision unit XOR7, XOR8 and XOR9, output afterwards adds and the result.

First to the 3rd electric current counter Cal1, Cal2 and Cal3 are respectively from first, second with the 3rd add and unit Int1, Int2 and Int3 receive C1, C2 and C3, and the displacement calculating magnitude of current.

The the 4th to the 6th electric current counter Cal4, Cal5 and Cal6 add and unit Int4, Int5 and Int6 receive C4, C5 and C6 from the 4th, the 5th and the 6th respectively, and the displacement calculating magnitude of current.

The the 7th to the 9th electric current counter Cal7, Cal8 and Cal9 add and unit Int7, Int8 and Int9 receive C7, C8 and C9 from the 7th, the 8th and the 9th respectively, and the displacement calculating magnitude of current.

First electric current adds the displacement current amount that adds with unit Add1 and calculated by first to the 3rd electric current counter Cal1, Cal2 and Cal3.

Second electric current adds the displacement current amount that adds with unit Add2 and calculated by the 4th to the 6th electric current counter Cal4, Cal5 and Cal6.

The 3rd electric current adds the displacement current amount that adds with unit Add3 and calculated by the 7th to the 9th electric current counter Cal7, Cal8 and Cal9.

As mentioned above, can calculate the displacement current amount that changes about view data corresponding to each unit.

Figure 21 considers Figure 19 and 20, according to the data comparator 1000 of the scanner driver in the plasma display panel device of first embodiment of the invention and the block diagram of scanning sequency decision unit 1001.

With reference to Figure 21, consider Figure 19 and 20, connect four basic circuit pieces 4 as shown in figure 21 in the structure of data comparator 1000, just, first to the 4th electric current decision unit 2010 ', 2020 ', 2030 ' and 2040 '.The 1001 relatively outputs of four basic circuit pieces of scanning sequency decision unit, and decision produces the scanning sequency of minimum displacement current.

First electric current decision unit 2010 ' respectively the movement images data (l, qR) and view data (l, qG), view data (l, qG) and view data (l, qB), view data (l, qB) and view data (l, q-4R), view data (l-4, qR) and view data (l-4, qG), view data (l-4, qG) and view data (l-4, qB), view data (l-4, qB) and (l-4, q-1R), view data (l, qR) and view data (l-4, qR), view data (l, qG) and (l-4, qG), and view data (l, qB) and view data (l-4, qB).

L and l-4 refer to l scanning electrode wire and (l-4) scanning electrode wire respectively.QR, qG and qB refer to R, G and the B unit of q pixel respectively.Q-1R, q-1G and q-1B refer to R, G and the B unit of (q-1) pixel respectively.

Therefore, first electric current decision unit, 2010 ' movement images data, and calculating is corresponding to the displacement current amount of the scanning sequency of type 4, as mentioned above.

Second electric current decision unit, 2020 ' movement images data (l, qR) and view data (l, qG), view data (l, qG) and view data (l, qB), view data (l, qB) and view data (l, q-1R), view data (l-3, qR) and view data (l-3, qG), view data (l-3, qG) and view data (l-3, qB), view data (l-3, qB) and (l-3, q-1R), view data (l, qR) and view data (l-3, qR), view data (l, qG) and (l-3, qG), and view data (l, qB) and view data (l-3, qB).L and l-3 refer to l scanning electrode wire and (l-3) scanning electrode wire respectively.

Therefore, second electric current decision unit, 2020 ' movement images data, and calculating is corresponding to the displacement current amount of the scanning sequency of type 3, as mentioned above.

The 3rd electric current decision unit 2030 ' movement images data (l, qR) and view data (l, qG), view data (l, qG) and view data (l, qB), view data (l, qB) and view data (l, q-1R), view data (l-2, qR) and view data (l-2, qG), view data (l-2, qG) and view data (l-2, qB), view data (l-2, qB) and (l-2, q-1R), view data (l, qR) and view data (l-2, qR), view data (l, qG) and (l-2, qG), and view data (l, qB) and view data (l-2, qB).L and l-2 refer to l scanning electrode wire and (l-2) scanning electrode wire respectively.

Therefore, the 3rd electric current decision unit 2030 ' movement images data, and calculating is corresponding to the displacement current amount of the scanning sequency of type 2, as mentioned above.

The 4th electric current decision unit 2040 ' movement images data (l, qR) and view data (l, qG), view data (l, qG) and view data (l, qB), view data (l, qB) and view data (l, q-1R), view data (l-1, qR) and view data (l-1, qG), view data (l-1, qG) and view data (l-1, qB), view data (l-1, qB) and (l-1, q-1R), view data (l, qR) and view data (l-1, qR), view data (l, qG) and (l-1, qG), and view data (l, qB) and view data (l-1, qB).L and l-1 refer to l scanning electrode wire and (l-1) scanning electrode wire respectively.

Therefore, the 4th electric current decision unit 2040 ' movement images data, and calculating is corresponding to the displacement current amount of the scanning sequency of Class1, as mentioned above.

Scanning sequency decision unit 1001 receives the displacement current amount of being calculated by first to the 4th electric current decision unit 2010 ', 2020 ', 2030 ' and 2040 ', and according to the electric current decision unit decision scanning sequency of exporting minimum displacement current.

For example, if scanning sequency decision unit 1001 determines that the displacement current amount that receives from second electric current decision unit 2030 ' is minimum, scanning sequency decision unit 1001 is provided with scanning sequency, make with the identical mode of the 3rd scan type (type 3) of Figure 19, with Y1-Y4-Y7-, Y2-Y5-Y8-..., Y3-Y6-Y9-,, order carry out scanning.

In addition, if scanning sequency decision unit 1001 determines that the displacement current amount that receives from the 3rd electric current decision unit 2050 ' is minimum, scanning sequency decision unit 1001 be provided with scanning sequency make with the identical mode of second scan type (type 2) of Figure 12, with Y1-Y3-Y5-, Y2-Y4-Y6-..., order carry out scanning.

Figure 22 wherein determines the block diagram of unit application in the embodiment of each son field according to data comparator of the present invention and scanning sequency.

With reference to Figure 22, the data comparator that is used for first son (SF1) comes the displacement calculating magnitude of current to each of the data comparator that is used for the 16 son (SF16) according to the image graphics about the corresponding son field of a plurality of scan types, and the amount that will calculate is stored in the buffer 800.

The data comparator that is used for first son (SF1) is identical to the structure of block diagram of each of the data comparator that is used for the 16 son field (SF16) and as shown in figure 17 data comparator.The data comparator that is used for the first son field (SF1) comes the displacement calculating magnitude of current about a plurality of scan types at the figure of the view data of each son field to each basis of the data comparator that is used for the 16 son (SF16), and the amount that will calculate is stored in the buffer 800.

Scanning sequency decision unit 1001 bases are come comparison displacement current amount from the figure of the view data of each son field that buffer 800 receives, and know the figure of the view data with minimum displacement current, and determine the scanning sequency of each son field.

In aforesaid plasma display panel device of the present invention and driving method thereof, calculate corresponding to the displacement current between the scanning electrode wire of a plurality of scan types, and sequential scanning is corresponding to a plurality of lines of the scan type with minimum displacement current.

In other words, as shown in figure 22, calculate therein scan type by predetermined number with the displacement current between the line of predetermined distance each interval, and select to have the scan type of minimum displacement current.But, can calculate therein scan type with irregular or, and select to have the scan type of minimum displacement current according to the displacement current between the line of pre-defined rule each interval.In addition, describe to use at least one weighting (Cm2, Cm1+Cm2, or 4Cm1+Cm2) the displacement calculating electric current that comprises electric capacity (Cm1 and Cm2) above.But, not use therein in the immobilising situation of weighted sum displacement current, the displacement current amount is set to " u0 " v, and therein in the situation of displacement current flows, the displacement current amount is set to the mode of " u1 " v, by adding and be worth the displacement current amount that " u0 " v or " u1 " v can find the son field.For example, in Figure 14, can use one add with unit structure first to the 3rd add with unit 716-1 to 736-3, and electric current counter 737-1 adds with unit 738 and can be omitted to 737-3 and electric current.In this case, one add can be to the output counting number of C1, C2 and C3 with the unit, and calculates its count value as displacement current.

Simultaneously, can be in a frame arbitrary decision wherein use the son of any one scanning scan electrode Y of a plurality of scan types.This will describe with reference to Figure 23 below.

Figure 23 has illustrated according to first embodiment of the invention, the view of the exemplary system of selection of the son field of any one scanning scan electrode Y of a plurality of scan types of use in a frame.

With reference to Figure 23, in first son with minimum gray level weighting of a son that only in a frame, comprises, use first scan type (Class1) the scanning scan electrode Y of Figure 22, and in residue according to conventional method, just, sequential scanning method scanning scan electrode Y.More detailed theory, the selected one or more son fields that in a frame, comprise the displacement current of getting it right of falling into a trap in a plurality of scan types, and in each son, use the scan type scanning scan electrode Y that wherein displacement current is minimum afterwards.

But, more preferably, calculate displacement current in each the height field that in a frame, comprises about a plurality of scan types, and according to the scan type scanning scan electrode Y that wherein displacement current is minimum in each son field, as shown in figure 22.

Consider above-mentioned explanation, the figure of view data comprises in the situation of first figure and second graph therein, can see that scanning sequency in first figure of view data and the scanning sequency in the second graph in view data differ from one another.This will be described in detail with reference to Figure 24.

Figure 24 is the view of the scanning sequency that differs from one another in the figure that has illustrated in two different images data.

With reference to Figure 24, (a) show wherein the figure that is arranged alternately the view data of logic level " 1 " and logic level " 0 " in upper and lower direction and a left side and right.(b) show wherein at right and left to being arranged alternately logic level " 1 " and " 0 ", still do not change the figure of the view data of logic level " 1 " and " 0 " in upper and lower direction.

In the viewdata graphics situation of (a), the scanning sequency of scan electrode Y is Y1-Y3-Y5-Y7-Y2-Y4-Y6.In the viewdata graphics situation of (b), the scanning sequency of scan electrode Y is Y1-Y2-Y3-Y4-Y5-Y6-Y7.In other words, the scanning sequency of scan electrode Y therein view data have and have in the situation of the figure shown in figure (b) different as the figure of figure shown in (a) and view data.

Adjusting the reason of the scanning sequency of scan electrode Y as mentioned above describes in detail in the above.Omitting it for the sake of simplicity further specifies.

Simultaneously, consider therein in the situation of scanning sequency of figure gated sweep electrode Y of aforesaid view data the critical value of viewdata graphics to be set, and according to the critical value gated sweep order that is provided with.This will describe with reference to Figure 25.

Figure 25 has illustrated by critical value is set according to viewdata graphics to come the view of the example of gated sweep method in proper order.

With reference to Figure 25, (a) of Figure 25 shows wherein that view data all is a high level, just, and the situation of logic level " 1 ".It all is logic level " 1 " at Y1, Y2 and Y3 scanning electrode wire epigraph data wherein that (b) of Figure 25 shows, and all is the situation of logic level " 0 " on the Y4 scanning electrode wire.It is logic level " 1 " that (c) of Figure 25 shows first and second of wherein Y1 and Y2 scan electrode, and third and fourth of Y1 and Y2 scan electrode is logic level " 0 ", and all is the situation of logic level " 1 " at Y3 and Y4 scanning electrode wire epigraph data.(d) of Figure 25 shows the situation that wherein is arranged alternately logic level " 1 " and " 0 ".

In this case, in (a) of Figure 25, because switch data driver IC not, total switching number is 0.In (b) of Figure 25, produce four switching numbers altogether of data driver IC in upper and lower direction.In (c) of Figure 25, upper and lower direction produce data driver IC altogether two switch number and at right and left to producing two switching numbers altogether.In (d) of Figure 25, upper and lower direction produce altogether 12 switch number and at right and left to producing 12 switching numbers altogether.Situation according to figure Figure 25 (d) has high capacity as can be seen.

Described load value in detail according to datagraphic.Preferably load value be the longitudinal load value of corresponding data figure and corresponding data image the lateral load value and.

The critical load value of supposing previous setting be according to upper and lower direction altogether ten switch number and right and left to the loads of ten switching numbers altogether, only figure (a) and (b), (c) and (d) in the situation of last figure (d) surpassed the critical load value that sets in advance.

By above-mentioned explanation of the present invention as can be seen, surpass the critical load value as mentioned above and mean that the displacement current amount according to data image surpasses the previous critical current that is provided with.

In this case, in figure (d).When view data is provided, the scanning sequency of gated sweep electrode Y.Described the scanning sequency of gated sweep electrode Y in detail.For fear of repeating to omit its explanation.

Simultaneously, described the scan type that determines to have corresponding to the scanning sequency of each scan electrode Y above, and used this scan type to carry out scanning according to scanning sequency corresponding to each scan electrode Y.But, should be appreciated that a plurality of scan electrode Y can be set to scan electrode group, and decision is corresponding to the scanning sequency of scan electrode group.This will describe with reference to Figure 26.

Figure 26 has illustrated the example of decision corresponding to the method for the scanning sequency of scan electrode group, and each scan electrode group comprises a plurality of scan electrode Y.

With reference to Figure 26, Y1, Y2 and Y3 scan electrode are set to first scan electrode group, Y4, Y5 and Y6 scan electrode are set to second scan electrode group, and Y7, Y8 and Y9 scan electrode are set to the 3rd scan electrode group, and Y10, Y11 and Y12 scan electrode are set to the 4th scan electrode group.Each scan electrode group is set to comprise four scan electrodes as shown in figure 26.But, should be appreciated that each scan electrode group can be set to comprise two, three or five scan electrodes.

In addition, be provided with that one or more in a plurality of scan electrode group comprise and the scan electrode Y of the different numbers of residue scan electrode group.For example, in first scan electrode group, comprise two scan electrode Y, and in second scan electrode group, comprise four scan electrode Y.

Be provided with as mentioned above in the situation of scan electrode group therein, if second type of application drawing 7 (type 2) scans the 3rd scan electrode group after scanning first scan electrode group, and sequential scanning afterwards second and the 4th scan electrode group, as shown in figure 24.In other words, scanning sequency is Y1, Y2, Y3, Y7, Y8, Y9, Y4, Y5, Y6, Y10, Y11 and Y12.

In explanation, describe method in detail according to a plurality of scan electrode Y of one scan of the different a plurality of scan types of the order that wherein scans a plurality of scan electrode Y according to first embodiment of the invention.

In the second embodiment of the present invention, be added to scan electrode Y during the cycle of keeping after using the addressing period of first embodiment and keep the application time of keeping pulse at last of keeping pulse of electrode Z, and in the reset cycle of next height field, be added to difference between application time of reset pulse of scan electrode Y and be set to larger than difference between two application time of keeping pulse.

Figure 27 illustrated according to a second embodiment of the present invention, is controlled at the last application time of keeping pulse and is added to the method for the difference between application time of reset pulse of reset cycle of next height field.

With reference to Figure 27, (a) of Figure 27 shows the relation between the last reset pulse of keeping to apply in the cycle of keeping pulse (SUSL) and applying of any son field in the reset cycle of next height field.Figure 27 shows wherein with the last situation that pulse (SUSL) is added to scan electrode Y of keeping.But, should note last keep pulse (SUSL) and can being added to and keeping electrode Z.

(b) of Figure 27 shows in the residue except keeping pulse (SUSL) at last and keeps difference (Ws2) between application time in the pulse.

With reference to (a), the time delay of Ws1 was arranged between the application time of the reset pulse of keeping pulse (SUSL) and application time at last and applying in the reset cycle of next height field.

(a) Ws1 in is set to larger than the Ws2 in (b).

To describe the reason that Ws1 in aforesaid (a) is set to larger than the Ws2 in (b) in detail with reference to Figure 28.

Figure 28 has illustrated the view of controlling the reason of the application time of keeping pulse according to second embodiment of the invention.

In other words, Figure 28 has illustrated the application time of keeping pulse (SUSL) at last of keeping pulse that is added to scan electrode Y and keeps electrode Z, and is added to the reason that difference between application time of reset pulse of scan electrode Y is set to larger than the difference between two application time of keeping pulse in the reset cycle of next height field.

Figure 28 shows and is being arranged in a plurality of electrodes of a unit, such as scan electrode Y, keep the wall electric charge 2400 on electrode Z and the data electrode X and be arranged in the relation of space charge 2401 in the space of unit.

In this case, the environment temperature of panel rises in the situation of high relatively temperature therein, and the ratio that reconfigures in the unit between space charge 2401 and wall electric charge 2400 increases.

In this case, reduce because participate in the absolute magnitude of the wall electric charge of discharge, the discharge that makes a mistake is such as not producing discharge in the unit that must produce discharge therein.In this case, space charge 2401 is the electric charges that exist in the space of unit, and unlike wall electric charge 2400, it does not participate in discharge.

For example, if the ratio that reconfigures of space charge 2401 and wall electric charge 2400 increases at addressing period, the amount that participates in the wall electric charge 2400 of address discharge reduces, and makes the address discharge instability.In this case, when the addressing order becomes evening, fully guarantee the time that wherein space charge 2401 and wall electric charge 2400 reconfigure.This makes address discharge further unstable.Therefore, produce the high temperature erroneous discharge, in the cycle of keeping, closed such as the unit of in addressing period, opening.

In addition, therein in the situation that the environment temperature of panel is high relatively, keep discharge if produce in the cycle of keeping, the speed of space charge 2401 accelerates at interdischarge interval.This has increased the ratio that reconfigures of space charge 2401 and wall electric charge 2400.Therefore, after any one kept discharge, the amount that the wall electric charge 2400 of discharge is kept in participation reduced because of the cause that reconfigures of space charge 2401 and wall electric charge 2400.This makes discharge instability in next height field.

In this case, if being set to long enough from wherein during cycle of keeping, finish using the time point of keeping pulse (SUSL) at last to the cycle that wherein in the reset cycle of next height field, applies the time point of reset pulse, using last keeping the enough time that pulse (SUSL) has guaranteed to reduce the degree of space charge 2401 afterwards.Therefore, the space charge in the unit 2401 reduces.

Therefore, along with 2401 amounts of the space charge in the unit reduce, even can forbid that erroneous discharge takes place in the high temperature that the panel environment temperature is high relatively therein.

More specifically, as above described with reference to Figure 10 to 26, therein at least one height field of frame, in the situation of a plurality of scan electrode Y of one scan of use a plurality of scan types that wherein order of scanning scan electrode Y is different in addressing period, the scanning sequency of specific scan electrode Y frequently changes.In this case, it is unstable relatively that the wall CHARGE DISTRIBUTION in the unit that forms in addressing period is compared the situation that wherein scanning sequency is constant.

For example, in the situation of the 3rd scan electrode Y3 of Figure 12, if use first scan type (Class1) scanning scan electrode Y, the scanning sequency of the 3rd scan electrode Y is the 3rd.If use second scan type (type 2) scanning scan electrode Y, the scanning sequency of the 3rd scan electrode Y3 is second.If use the 3rd scan type (type 3) scanning scan electrode Y, the scanning sequency of the 3rd scan electrode Y3 is the 7th.If the scanning sequency of the 3rd scan electrode Y3 frequently changes as mentioned above, the wall CHARGE DISTRIBUTION that is arranged in the unit on the 3rd scan electrode Y3 line becomes unstable.

In this case, if be set to long enough from being added to scan electrode Y and keeping the cycle of the application time of keeping pulse (SUSL) at last of keeping pulse to the application time of the reset pulse that during reset cycle of next height field, is added to scan electrode Y of electrode Z, just, be set to long enough from wherein finishing during cycle of keeping to use the last time point of keeping pulse (SUSL) to the cycle that wherein in the reset cycle of next height field, applies the time point of reset pulse, can fully reduce the space charge that is arranged in the unit on above-mentioned the 3rd scan electrode Y3 line.This has stablized in the discharge that is arranged in the unit on the 3rd scan electrode Y3 line.

Afterwards will be with reference to Figure 27.

In (a), in the end keep the application time of pulse (SUSL) and in the reset cycle of next height field, be added to difference (Ws2) between application time of reset pulse of scan electrode Y to be set in (b) between two application time of keeping pulse 1 to 1000 times of difference or still less.In other words, opening relationships Ws2＜Ws1≤1000Ws2.

Simultaneously, can be arranged on application time of keeping pulse (SUSL) at last and in the reset cycle of next height field, be added to difference (Ws2) between application time of reset pulse of scan electrode Y and can be set to the in (b) difference between two application time of keeping pulse in the scope of 100 μ s to 1ms.

In this case, the pulse width of keeping pulse (SUSL) at last is d2, and the pulse width d1 that its residue that is set to make peace is greatly kept pulse is identical.

Keep the last of the same pulse width of pulsion phase and keep pulse (SUSL) afterwards using as mentioned above to have and remain, the voltage of scan electrode Y remains ground level (GND) for cycle Ws1.Therefore, in the end keep the application time of pulse (SUSL) and between the application time of the reset pulse that in the reset cycle of next height field, applies generation time postpone.

The result, in Figure 27, in application time of last scanning impulse (SUSL) with to be added to difference between application time of reset pulse of scan electrode Y in the reset cycle of next height field be wherein to keep pulse (SUSL) at last afterwards using, the voltage of scan electrode Y keeps the cycle of ground level (GND) voltage.Therefore, wherein the voltage of scan electrode Y keeps the Cycle Length of the voltage of ground level (GND) can be set at the scope of 100 μ s to 1ms.

In this case, last keep pulse (SUSL) and be set to 100 μ s or higher up to the cycle of reset cycle of next height field afterwards finish using, just, to be set to the reason of 100 μ s be the space charge that interdischarge interval produces of keeping that fully reduces at PDP to lowest critical value.Last keep pulse (SUSL) and be set to 1ms or still less up to the cycle of reset cycle of next height field afterwards finish using, just, the highest critical value reason that is set to 1ms is to guarantee the work allowance of keeping the cycle of keeping during the driving at PDP.

In addition, Figure 27 Ws1 of only showing in a son (a) is set to the Ws2 greater than (b).But the Ws1 of (a) is set to the Ws2 greater than (b) in the whole son field that can comprise in frame.

For example, a frame comprises altogether in the situation of 12 sons therein, can be set to larger than difference between two application time of keeping pulse being added to scan electrode Y or keeping the last application time of keeping pulse (SUSL) of keeping pulse of electrode Z and be added to difference between application time of reset pulse of scan electrode Y in reset cycle of next height field in whole 12 sons.

To be described the application time of keeping pulse of describing with reference to Figure 27 in further detail with reference to Figure 29.

Figure 29 is the view that describes the application time of keeping pulse in detail.

With reference to Figure 29, the last application time of keeping pulse can be the time point that approximately becomes 10% (Vmax/10) of ceiling voltage (Vmax) when the voltage of keeping pulse (SUSL) at last average voltage when minimum voltage (Vmin) rises.

In addition, though do not have shown in the drawingsly, finish to use and to keep pulse (SUSL) at last and refer to about 10% or the situation still less that the voltage of wherein keeping pulse (SUSL) at last becomes ceiling voltage.In other words, suppose that the ceiling voltage of keeping pulse (SUSL) at last is 200V, the voltage of wherein keeping pulse (SUSL) at last becomes the situation of about 20V and represents to finish to use to keep pulse (SUSL) at last.

As mentioned above, by keeping respective electrode to the application time of the reset pulse that during reset cycle of next height field, applies from wherein finish using the last time point of keeping pulse (SUSL), for example, the voltage of scan electrode Y among Figure 27 is to the voltage of ground level (GND), controls the last application time of keeping pulse (SUSL) and the difference between the application time of the reset pulse that applies in the reset cycle of next height field.

But, can be by the difference between the application time of the reset pulse adjusting the last application time of keeping pulse (SUSL) of the pulse width control of keeping pulse (SUSL) at last and in the reset cycle of next height field, apply.This will describe with reference to Figure 30 below.

Figure 30 is the other method that has illustrated according to the difference between the application time of last application time of keeping pulse of being controlled at of second embodiment of the invention and the reset pulse that applies in the reset cycle of next height field.

With reference to Figure 30, (a) show the relation of the reset pulse of keeping to apply in the cycle of keeping pulse (SUSL) at last and in the reset cycle of next height field, applying at any son.Figure 30 also shows wherein will keep the example that pulse (SUSL) is added to scan electrode Y at last in the mode identical with Figure 27.But,, keep pulse (SUSL) at last and can be added to and keep electrode Z unlike the situation of Figure 30.

In the mode identical, (b) show in the residue except keeping pulse (SUSL) at last and keep difference (Ws2) between application time between the pulse with Figure 27.

With reference to (a), exist in the time delay Ws3 between application time of application time of keeping pulse (SUSL) at last and the reset pulse that in the reset cycle of next height field, applies.

(a) Ws3 in is set to larger than the Ws2 in (b).

But, in Figure 30,, when the pulse width of keeping pulse (SUSL) at last increases, be created in the difference between application time of application time of keeping pulse (SUSL) at last and the reset pulse that in the reset cycle of next height field, applies unlike Figure 27.

In other words, the width (d3) of keeping pulse (SUSL) is at last kept the width (d1) of pulse greater than residue.

The width of keeping pulse (SUSL) at last can be set at 100 μ s in the scope of 1ms.

The pulse width of keeping pulse (SUSL) at last is set to 100 μ s or higher reason, and just, the reason that lowest critical value is set to 100 μ s is the space charge that interdischarge interval produces of keeping that fully reduces at PDP.The pulse width of keeping pulse (SUSL) at last is set to 1ms or still less, just, the reason that the highest critical value is set to 1ms be PDP keep driving during keep keeping the work allowance in cycle.

As mentioned above, Ws3 is set to reason greater than the Ws2 in (b) and is to reduce space charge in the unit in the mode identical with Figure 27.This describes in detail with reference to Figure 27 to 24, and the descriptions thereof are omitted to avoid repetition.

Figure 31 is the oscillogram that has illustrated according to the example of the driving method of the plasma display panel device of second embodiment of the invention.

The drive waveforms of Figure 31 can be applied to three electrode A C surface-discharge type PDP.

With reference to Figure 31, each son (SFn-1, SFn) comprise reset cycle (RP) of the discharge cell that is used for the whole screen of initialization, be used to select the addressing period (AP) of discharge cell, be used to keep the keeping the cycle (SP) and be used for wiping erase cycle (EP) of discharge of selected discharge cell at the wall electric charge of discharge cell.

Reset cycle (RP), addressing period (AP) and the cycle of keeping (SP) be identical with the drive waveforms of Fig. 5 basically.The descriptions thereof are omitted.

In method example, be used between 40 degrees centigrade or higher hot environment cause that the space charge damped cycle (Tdecay) of space charge decay is set at the rise time point of keeping pulse (LSTSUSP) at last of (n-1) son (SFn-1) and wherein the rise time of the positive tilt waveform (PR) of reset cycle (RP) beginning of n (SFn) puts according to the driving plasma display panel device of second embodiment of the invention.

In 40 degree or above hot environment, compare the normal temperature environment, it is longer that space charge damped cycle (Tdecay) is set.Time approximately is 300 μ s ± 50 μ s.During space charge damped cycle (Tdecay), at space charge that keeping of (n-1) son (SFn-1) produces in the discharge because in them reconfigure and and reconfiguring of wall electric charge and decaying, after the decay of this space charge, during the reset cycle (RP) of n (SFn), produce continuously and set up discharge and remove discharge.As a result, reset cycle (RP) of n (SFn) afterwards, each discharge cell is initialised to the optimum wall CHARGE DISTRIBUTION condition that is used for address discharge immediately, and does not almost have space charge, shown in Fig. 6 c.

In space charge damped cycle (Tdecay), exist during the erase cycle (EP), will be used for causing that the tilt waveform (ERR) of wiping of the erasure discharge of discharge cell is added to and keeps electrode Z.Wiping tilt waveform (ERR) is that its voltage rises to the positive tilt waveform that ends of keeping voltage (Vs) gradually from 0V.Wipe tilt waveform (ERR) and cause and keep opening the scan electrode Y in the unit and keep between the electrode Z and producing erasure discharge of discharge therein, therefore wipe the wall electric charge.

Figure 32 is the waveform that has illustrated according to another example of the driving method of the plasma display panel device of second embodiment of the invention.

Keep discharge by last in the son formerly, and the son after this child field remove discharge (set up discharge), the drive waveforms of Figure 32 can be added to the wherein PDP of initialization discharge cell, and just, wherein the homogeneity degree is high and drive the wide PDP of allowance in the discharge cell.

With reference to Figure 32, (n-1) son (SFn-1) comprises the reset cycle (RP), keeps the cycle (SP) and keeps the cycle (SP).N (SFn) comprise only have the cycle of removing and do not set up the cycle reset cycle (RP), addressing period (AP), keep the cycle (SP) and erase cycle (EP).

Addressing period (AP) and the cycle of keeping (SP), the drive waveforms with the embodiment of Fig. 5 and Figure 31 was identical basically, and omitted its explanation.

In another example according to the method for the driving plasma display panel device of second embodiment of the invention, be used for causing that space charge damped cycle (Tdecay2) at hot environment space charge decay is set at the rise time point of keeping pulse (LSTSUSP2) at last of (n-1) son (SFn-1) and wherein the rise time of the positive tilt waveform (PR) of reset cycle (RP) beginning of n (SFn) puts between.

Space charge damped cycle (Tdecay2) is identical with the pulse width of keeping pulse at last, and compares the normal temperature environment, is provided with that it is longer in 40 degree or higher hot environment.Space charge damped cycle (Tdecay2) approximately is 300 μ s ± 50 μ s at high temperature.During space charge damped cycle (Tdecay2), the pulse (LSTSUSP) of keeping at last of keeping voltage (Vs) is added to scan electrode Y, and keeps keeping voltage (Vs) therein.From will keep at last pulse (LSTSUSP) be added to scan electrode Y through the schedule time (Td) afterwards, will keep voltage (Vs) and be provided to and keep electrode Z.This voltage makes that during space charge damped cycle (Tdecay2) negative space charge is accumulated, and positive space charge is accumulated on addressing electrode X on scan electrode Y.Therefore, at space charge damped cycle (Tdecay2) afterwards, each discharge cell is initialised to the wall CHARGE DISTRIBUTION that is similar to existing foundation discharge result, just, be similar to Fig. 6 b, the wall CHARGE DISTRIBUTION of wherein wiping most of space charge at each discharge cell.

In the reset cycle (RP (SD)) of space charge damped cycle (Tdecay2) n (SFn) afterwards, negative tilt waveform (NR) is added to scan electrode Y.During the reset cycle (RP (SD)), the positive voltage (Vs) of keeping is added to and keeps electrode Z, and 0V is added to addressing electrode X.Negative tilt waveform (NR) causes that the voltage on scan electrode Y drops to negative erasing voltage (Ve) gradually from the positive voltage (Vs) of keeping.Negative tilt waveform (NR) in the whole discharge cell of screen scan electrode Y and addressing electrode X between produce dark discharge, and at scan electrode Y with keep between the electrode Z and produce dark discharge.As the result of the dark discharge in the cycle of removing (SD), the wall CHARGE DISTRIBUTION in each discharge cell is changed into optimum addressing condition, shown in Fig. 6 c.

Figure 33 is the waveform that has illustrated according to another example of the driving method of the plasma display panel device of second embodiment of the invention.Figure 34 a is to show basis drive waveforms as shown in figure 33 length by length to change the view of the wall CHARGE DISTRIBUTION in discharge cell to 34e.

The drive waveforms of Figure 33 will be described to the wall CHARGE DISTRIBUTION of 34e in conjunction with Figure 34 a.

With reference to Figure 33, under hot environment, be used for forming positive wall electric charge on the scan electrode Y and keeping the pre-reset cycle (PRERP) that forms negative wall electric charge on the electrode Z by being divided at that time, be used for the reset cycle (RP) of use at the discharge cell of the whole screen of wall CHARGE DISTRIBUTION initialization of pre-reset cycle (PRERP) formation, addressing period (AP) and being used to is kept the keeping the cycle of discharge (SP) of selected discharge cell, drive at least one height field, for example, the first son field.Can between the reset cycle of the cycle of keeping (SP) and next height field, comprise erase cycle.

In the pre-reset cycle (PRERP), with positive keep voltage (Vs) be added to whole keep electrode Z after, through the schedule time (Td2) afterwards, its voltage is added to whole scan electrode Y from the Y reverse caster waveform (NRY1) that 0V or ground voltage (GND) drop to negative-V1 voltage.In this case, (Td2) can change according to panel characteristics the schedule time.When keeping the voltage of electrode Z, the voltage of scan electrode Y descends and afterwards for schedule time maintenance-V1 voltage.During the pre-reset cycle (PRERP), 0V is added to addressing electrode X.

During the initial schedule time (Td2) of pre-reset cycle (PRERP), negative space charge in discharge cell is accumulated on scan electrode Y, and because changes into the wall electric charge being added to the difference of keeping voltage (Vs) and being added between the 0V of scan electrode Y of keeping electrode Z.Positive space charge in discharge cell is accumulated keeping on the electrode Z, and changes into the wall electric charge afterwards.After wiping space charge, be added to the Y reverse caster waveform (NRY1) keeping voltage (Vs) and be added to scan electrode Y of keeping electrode Z the scan electrode Y on the whole discharge cell and keep between the electrode Z and keeping electrode Z and addressing electrode X between produce dark discharge.As the result of discharge, just the pre-reset cycle (PRERP) afterwards, in whole discharge cell, the positive wall electric charge of accumulation on scan electrode Y, and keeping the negative wall electric charge of accumulation on the electrode Z, shown in Figure 34 a.The wall CHARGE DISTRIBUTION of Figure 34 a causes in whole discharge cell at scan electrode Y and keeps and forms sufficiently high positive gap voltage between the electrode Z and form electric field from scan electrode Y to the direction of keeping electrode Z in each discharge cell.

Setting up the cycle in (SU) of reset cycle (RP), a Y anacline waveform (PRY1) and the 2nd Y anacline waveform (PRY2) are added to whole scan electrode Y continuously, 0V is added to keeps electrode Z and addressing electrode X.The voltage of the one Y anacline waveform (PRY1) rises to the positive voltage (Vs) of keeping from 0V, and the voltage of the 2nd Y anacline waveform (PRY2) rises to and is higher than the positive positive Y resetting voltage (Vry) of keeping voltage (Vs) from the positive voltage (Vs) of keeping.The inclination of the 2nd Y anacline waveform (PRY2) is less than the inclination of a Y anacline waveform (PRY1).Simultaneously, a Y anacline waveform (PRY1) can be set to have identical inclination according to panel characteristics with the 2nd Y anacline waveform (PRY2).A Y anacline waveform (PRY1) and in being added on discharge cell at scan electrode Y with when keeping the voltage of the electric field that forms between the electrode Z, in whole discharge cell at scan electrode Y with keep electrode Z and between scan electrode Y and addressing electrode X, produce dark discharge.As the result of discharge, when negative afterwards wall electric charge of the cycle of foundation (SU) is accumulated on the scan electrode Y in whole discharge cell immediately, shown in Figure 34 b, the counter-rotating of wall charge polarity negative ground.Therefore, be accumulated on the addressing electrode X than the more positive wall electric charge of negative wall electric charge.When keeping negative wall electric charge on the electrode Z in the accumulation when scan electrode Y moves, they keep negative polarity, though the quantity of electric charge partly reduces.

Simultaneously, in the cycle of removing (SD), pass through just before pre-reset cycle (PRERP) wall CHARGE DISTRIBUTION afterwards produces dark discharge, because the positive gap voltage in whole discharge cell is enough high, Y resetting voltage (Vr) is lower than previous resetting voltage (Vr).In addition, when by the pre-reset cycle (PRERP) with set up the cycle (SU), positive wall electric charge fully is accumulated in addressing electrode X when going up, the absolute value of the voltage of the applications that address discharge needs, just, (absolute value Vy) reduces for data voltage (Va) and scanning voltage.

Removing the cycle in (SD) of reset cycle (RP) afterwards in the cycle of setting up (SU), when the 2nd Y reverse caster waveform (NRY2) is added to scan electrode Y, the 2nd Z reverse caster waveform (NRZ2) is added to keeps electrode Z.The voltage of the 2nd Y reverse caster waveform (NRY2) drops to negative voltage (V2) from the positive voltage (Vs) of keeping.The voltage of the 2nd Z reverse caster waveform (NRZ2) drops to 0V or bias voltage from the positive voltage (Vs) of keeping.Voltage (V2) can be set to and the voltage of pre-reset cycle (PRERP) (V1) identical or different.During the cycle of removing (SD), scan electrode Y descends simultaneously with the voltage of keeping electrode Z.Therefore, at scan electrode Y with keep and do not produce discharge between the electrode Z, yet between scan electrode Y and addressing electrode X, produce dark discharge.Dark discharge causes that the too much wall electric charge at the negative wall electric charge of accumulating on the scan electrode Y is wiped free of and the too much wall electric charge of the positive wall electric charge accumulated is wiped free of on addressing electrode X.As the discharge result, whole discharge cell has the even wall CHARGE DISTRIBUTION shown in Figure 34 c.In the wall CHARGE DISTRIBUTION of Figure 34 c, negative wall electric charge is fully accumulated on scan electrode Y, and the fully accumulation on addressing electrode X of positive wall electric charge.Therefore, the gap voltage between scan electrode Y and addressing electrode X rises near trigger voltage (Vf).Therefore, the cycle of removing (SD) afterwards, the wall CHARGE DISTRIBUTION of whole discharge cell is changed into immediately has last addressing condition.

In addressing period (AP), when (when SCNP) order is added to scan electrode Y, and scanning impulse (SCNP) synchronously is added to addressing electrode X with positive data pulse (DP) with negative scanning impulse.The voltage of scanning impulse (SCNP) is scanning voltage (Vsc), and it drops to negative scanning voltage (VY) from 0V or near the negative scan bias voltage (Vyb) of 0V.During addressing period (AP), will be lower than the positive positive Z bias voltage (Vzb) of keeping voltage (Vs) and be added to and keep electrode Z.Immediately the gap voltage of whole discharge cell is adjusted in the state of optimum addressing situation afterwards in the reset cycle (RP) therein, using the opening in the unit of scanning voltage (Vsc) and data voltage (Va), the gap voltage between scan electrode Y and addressing electrode X surpasses trigger voltage (Vf).Therefore, only between electrode Y and X, produce address discharge.What produce address discharge therein opens wall CHARGE DISTRIBUTION in the unit shown in Figure 34 d.After address discharge, because by address discharge, positive wall electric charge is accumulated on scan electrode Y immediately, and negative wall electric charge accumulates on addressing electrode X, opens the wall CHARGE DISTRIBUTION of unit and changes into immediately shown in Figure 34 E.

Simultaneously, wherein 0V or base voltage are added to addressing electrode X or the closing unit that 0V or scan bias voltage (Vyb) are added to scan electrode Y had gap voltage less than trigger voltage.Therefore, the closing unit that does not wherein produce address discharge has basically and identical wall CHARGE DISTRIBUTION shown in Figure 34 c.

In the cycle of keeping (SP), the positive pulse (FISRTSUSP, SUSP and LSTSUSP) of keeping of keeping voltage (Vs) alternately is added to scan electrode Y and is kept electrode Z.During the cycle of keeping (SP), 0V or base voltage are added to addressing electrode X.At first being added to each scan electrode Y is set to than normally keeping the wide of pulse, with stable maintenance discharge initialization with the pulse width of keeping pulse (FSTSUSP) of keeping electrode Z.In addition, will keep pulse (LSTSUSP) at last is added to and keeps electrode Z.In the original state of the cycle of setting up (SU), the pulse width of keeping pulse (LSTSUSP) at last is set to than normally keeping the wide of pulse (SUSP), thereby is keeping on the electrode Z the fully negative wall electric charge of accumulation.During the cycle of keeping,, open the unit at scan electrode Y with keep to produce between the electrode Z and keep discharge by what address discharge was selected because the wall CHARGE DISTRIBUTION of Figure 34 e is kept pulse (SUSP) at each.Opposite, the initial wall CHARGE DISTRIBUTION of keeping the cycle in the closing unit (SP) and Figure 34 c's is identical.Be added to closing unit though will keep pulse (FISRTSUSP, SUSP and LSTSUSP), the gap voltage of keeping pulse keeps making not produce discharge in closing unit less than trigger voltage (Vf).

For reduce the space charge amount that produces in keeping discharge, it is relative with decline cycle long that each rising cycle of keeping pulse (FISRTSUSP, SUSP and LSTSUSP) is set, from 320ns to 360ns.

The drive waveforms of Figure 33 is not limited only to the first son field, and can be applied to comprise several initial sub of first sub, and can also be applied to be included in the whole sub-field in the frame period.

Figure 35 is another example according to the method for the driving plasma display panel device of second embodiment of the invention, and shows the drive waveforms during the keeping the cycle of (n-1) son (SFn-1) and n field (SFn) (wherein n is about 2 positive integer) (SP).

Figure 36 shows the mode of the drive waveforms by as shown in figure 35, the wall CHARGE DISTRIBUTION that forms in discharge cell after the cycle of keeping.Figure 37 is drive waveforms, the wall CHARGE DISTRIBUTION that formed before the cycle of setting up and the view of the gap voltage in the discharge cell that has illustrated according to shown in Figure 33 and 35.

The drive waveforms of Figure 35 will be described in conjunction with the wall CHARGE DISTRIBUTION of Figure 36 and 37.

With reference to Figure 35, in n field (SFn), use at (n-1) son (SFn-1), for example, the wall CHARGE DISTRIBUTION that forms immediately after the cycle of keeping of the first son field, the whole unit of initialization PDP.

Each of (n-1) son (SFn-1) and n (SFn) comprises and being used for because the keeping the cycle of discharge (SP) that wherein negative wall electric charge in the reset cycle (RP) of keeping the wall CHARGE DISTRIBUTION initialization whole unit of fully accumulating on the electrode Z, is used for the addressing period (AP) of selected cell and is used to keep selected unit.

Keeping in the cycle of (n-1) son (SFn-1), keep pulse (LSTSUSP3) and be added to and keep electrode Z last.Simultaneously, 0V or base voltage are added to scan electrode Y and addressing electrode X.Be set to have wherein space charge corresponding to the space charge damped cycle (Tdecay3) of the pulse width of keeping pulse (LSTSUSP3) at last and can change into the wall electric charge, cause before in the reset cycle (RP) of n (SFn) thus and opening keeping discharge and wiping time of the degree of the space charge in discharge cell in the unit.So far, wherein at last keep pulse (LSTSUSP3) and remain on the space charge damped cycle (Tdecay3) of keeping voltage (Vs) and be set to about 300 μ s ± 50 μ s.

Because keep pulse (LSTSUSP3) at scan electrode Y with keep the discharge that produces between the electrode Z by last, positive wall electric charge is fully accumulation on scan electrode Y, and negative wall electric charge does not almost have space charge, as shown in figure 36 keeping fully accumulation on the electrode Z.

Setting up the cycle in (SU) of n (SFn), the wall CHARGE DISTRIBUTION of Figure 36 is used for producing dark discharge in whole unit, thus with the wall CHARGE DISTRIBUTION initialization whole unit shown in Figure 34 b.Set up the cycle (SU) afterwards and remove initialization, addressing with keep operation identical with the drive waveforms of Figure 33 basically.

In the example according to the another plasma display panel device of second embodiment of the invention and driving method thereof, space charge is changed into the wall electric charge under hot environment, to stablize the wall CHARGE DISTRIBUTION under the initialization hot environment.The cycle of setting up of next height field just existing son keep discharge at last after, the cycle of keeping of previous son and the reset cycle of next son field were not used in the erase cycle of wiping at the wall electric charge.Because keeping discharge is strong glow discharge (glowdischarge), it can and keep on the electrode Z the fully a large amount of wall electric charges of accumulation at scan electrode Y, and can stable maintenance at the positive wall electric charge on the scan electrode Y with keeping the polarity of the negative wall electric charge on the electrode Z.

Figure 37 shows the cell gap voltage status of keeping the unit that discharge or the discharge of pre-reset cycle (PRERP) form by last.

With reference to Figure 37, by the last mode of keeping pulse (LSTSUSP) or the waveform (NRY1, PRZ and NRZ1) of pre-reset cycle (PRERP) at scan electrode Y with keep and produce discharge between the electrode Z.Therefore, the cycle of setting up (SU) before, the unit, form primary clearance voltage (Vgini-yz) between Y-Z by point to the electric field keep electrode Z from scan electrode Y.The unit, form primary clearance voltage (Vgini-yz) between Y-Z by the electric field that points to addressing electrode X from scan electrode Y.

The cycle of setting up (SU) before, the wall CHARGE DISTRIBUTION by Figure 37 forms primary clearance voltage (Vgini-yz) between Y-Z in discharge cell.If the as many external voltage of difference between application and trigger voltage (Vf) and Y-Z between the primary clearance voltage (Vgini-yz) produces dark discharge in discharge cell during the cycle of setting up (SU).These can be with 5 expressions of following equation

[equation 5]

Vyz＝Vf-(Vgini-yz)

Wherein Vyz is the external voltage (hereinafter, mentioning as " external voltage between Y-Z ") that is added to scan electrode Y and keeps electrode Z during the cycle of setting up (SU).In the drive waveforms of Figure 33 and 35, voltage Vyz indicates the voltage of the positive tilt waveform (PRY1, PRY2) that is added to scan electrode and is added to the 0V that keeps electrode Z.

Figure 38 has illustrated setting up in the cycle at scan electrode when driving Plasmia indicating panel according to drive waveforms shown in Figure 33 and 35 and keep the view of the variation of applied external voltage and gap voltage in the electric discharge between electrodes unit.

As equation 5 and shown in Figure 38, if during the cycle of setting up (SU), external voltage between Y-Z (Vyz) fully is higher than in the difference between the primary clearance voltage (Vgini-yz) between trigger voltage (Vf) and Y-Z, produces dark discharge because wide driving allowance can be stablized in discharge cell.

In the another example according to the plasma display panel device of second embodiment of the invention, luminous quantity that each son field produced during the reset cycle is compared to existing technology little.This be because during reset cycle of each son the discharge time that in the unit, produces, more specifically, the surface-discharge number is less than prior art.

Figure 39 is the form that the example of the drive waveforms of passing through prior art as shown in Figure 5 has been described, is keeping the view of the change of the wall charge polarity on the electrode in erase cycle with during the reset cycle.

Figure 40 is the mode that has illustrated by the drive waveforms shown in Figure 33 and 35, is keeping the view of the change of the wall charge polarity on the electrode in the reset cycle.

In existing plasma display panel device, with positive polarity, wipe and negative polarity (Fig. 6 a), the positive polarity (Fig. 6 b) after keeping at last of (n-1) son (SFn-1) discharged after the dark discharge of removing the cycle (SD) of n (SFn) and the order of negative polarity (Fig. 6 c) change at the wall charge polarity of keeping on the electrode Z, as shown in figure 39.Opposite, in plasma display panel device of the present invention, after discharging, keeping at last of (n-1) son (SFn-1) after the dark discharge of removing the cycle (SD) of n (SFn), keep negative polarity at the wall charge polarity of keeping on the electrode Z, as shown in figure 40.In other words, in plasma display panel device of the present invention, addressing period (AP) beginning during the constant maintenance negative polarity of the wall charge polarity in initialization procedure on keeping electrode Z is shown in Figure 34 a, 10b and 10c.

Figure 41 shows in the drive waveforms according to the first sub-field duration in the another example of the driving method of the plasma display panel device of second embodiment of the invention.

Figure 42 shows according to the drive waveforms during the keeping the cycle of (n-1) son (SFn-1) and n field (SFn) (n is the positive integer greater than 2) in the another example of the method for the driving plasma display panel device of second embodiment of the invention (SP).

With reference to Figure 41 and 42, in another example according to the driving method of the plasma display panel device of second embodiment of the invention, in each son field, during the cycle of removing (SD), will be added to scan electrode Y, thereby make in the wall CHARGE DISTRIBUTION of the cycle of setting up (SU) initialized whole discharge cell even from the voltage of 0V or base voltage (GND) decline.

The first son field comprises pre-reset cycle (PRERP), reset cycle (RP), addressing period (AP) and keep the cycle (SP), as shown in figure 41.Remaining son (SFn) comprises reset cycle (RP), addressing period (AP) and keeps the cycle (SP), as shown in figure 42.

For space charge being changed into the wall electric charge to wipe space charge and the wall CHARGE DISTRIBUTION of formation shown in Figure 34 a in each discharge cell, during the pre-reset cycle (PRERP) of the first son field, with positive keep voltage (Vs) be added to whole keep electrode Z after, through the schedule time (Td2) afterwards, its voltage is dropped to negative voltage from 0V or ground voltage (GND), and (a Y reverse caster waveform (NRY1) V1) is added to whole scan electrode Y.

Be added to the pulse (LSTSUSP3) of keeping at last of keeping electrode Z before in reset cycle (RP) and during the space charge damped cycle (Tdecay3) of about 300 μ s ± 50 μ s, keep the positive voltage (Vs) of keeping except n of first son.During space charge damped cycle (Tdecay3), space charge is changed into the wall electric charge and is wiped free of afterwards.

(SFn-1, the removing the cycle in (SD) of reset cycle SFn) (RP) when with the 2nd Y reverse caster waveform (NRY2) when being added to scan electrode, are added to the 2nd Z reverse caster waveform (NRZ2) and keep electrode Z at each son.Unlike the foregoing description, the voltage of the 2nd Y reverse caster waveform (NRY2) drops to negative voltage (V2) from 0V or ground voltage (GND).The voltage of the 2nd Z reverse caster waveform (NRZ2) drops to 0V or ground voltage from the positive voltage (Vs) of keeping.During the cycle of removing (SD), scan electrode Y descends simultaneously with the voltage of keeping electrode Z.Therefore, not at scan electrode Y with keep between the electrode Z and to produce discharge, yet between scan electrode Y and addressing electrode X, produce dark discharge.Dark discharge makes the too much wall electric charge at the negative wall electric charge of accumulating on the scan electrode Y be wiped free of and makes the too much wall electric charge of the positive wall electric charge accumulated on addressing electrode X be wiped free of.Simultaneously, can omit the 2nd Z reverse caster waveform (NRZ2).

If the voltage of the 2nd Y reverse caster waveform (NRY2) descends from 0V or ground voltage, compare the foregoing description and remove the cycle (SD) and shorten.In addition, though the voltage of the 2nd Y reverse caster waveform (NRY2) descend from 0V or ground voltage, little at scan electrode Y and the voltage difference kept between the electrode Z.Therefore, plasma display panel device of the present invention can be stablized initialization, simultaneously effectively is suppressed at scan electrode Y and keeps discharge between the electrode Z.Therefore, remove the cycle (SD) because reduce, present embodiment can guarantee more driving time, and can stablize the cycle of removing the initialization operation of (SD).

For reduce the space charge amount that produces in keeping discharge, it is about 300 μ s ± 50 μ s that each rising cycle of keeping pulse (FIRSTSUSP, SUSP, LSTSUSP) and decline cycle are set, and it is long relatively.

Figure 43 shows the waveform of explanation according to the another example of the plasma display panel device driving method of second embodiment of the invention, and shows the drive waveforms of using in hot environment.

With reference to Figure 43, in the method for driving plasma display panel device according to the present invention, during the cycle in later stage of (n-1) son (SFn-1), will during the space charge damped cycle (Tdecay3) of about 300 μ s ± 50 μ s, keep the positive pulse (LSTSUSP) of keeping at last of keeping voltage to be added to and to keep electrode Z.Afterwards 0V or ground voltage (GND) are added to and keep electrode Z.

In addition, in the method for driving plasma display panel device according to the present invention, with positive keep voltage (Vs) be added to whole keep electrode Z after, through the schedule time (Td2) afterwards), (a Y reverse caster waveform (NRY1) V1) is added to whole scan electrode Y will to drop to negative voltage from 0V or ground voltage (GND).Therefore, the voltage of keeping electrode Z therein keeps keeping in the state of voltage (Vs), and a Y reverse caster waveform (NRY1) is added to scan electrode Y.In the method that drives plasma display panel device according to the present invention, after 0V or ground voltage (GND) are added to scan electrode Y, will be added to and keep electrode from keeping a Z reverse caster waveform (NRZ1) that voltage (Vs) drops to 0V or ground voltage (GND) gradually.

For reduce the space charge amount that produces in keeping discharge, it is about 340 μ s ± 30 μ s that each rising cycle of keeping pulse (FIRSTSUSP, SUSP, LSTSUSP) and decline cycle are set, and it is long relatively.

The space charge that is produced by a series of these drive waveforms under hot environment almost is wiped free of, and changes into the wall electric charge before at n (SFn).Each discharge cell is initialised to have the wall CHARGE DISTRIBUTION shown in Figure 34 a.

Figure 44 shows the block diagram according to the structure of plasma display panel device of the present invention.

With reference to Figure 44, plasma display panel device according to the embodiment of the invention comprises PDP900, be used to respond to the temperature sensor 906 of the temperature of PDP900, be used to provide data to the addressing electrode X1 of PDP900 data driver 902 to Xm, be used to drive the scanner driver 903 of the scan electrode Y1 of PDP900 to Yn, be used to drive PDP900 keep electrode Z keep driver 904, be used for controlling each driver 902 according to the temperature of PDP900,903 and 904 driving pulse controller 901 and be used to produce each driver 902, the driving voltage generator 905 of 903 and 904 required driving voltages.

The temperature of temperature sensor 906 induction PDP is converted to digital signal with induced voltage, and provides digital signal to arrive driving pulse controller 901 to produce induced voltage.

Provide experience to revise the circuit (not shown) to data driver 902 by reverse gamma, the reverse gamma-corrected of error diffusion circuit (not shown) etc., mistake expansion etc., and be mapped to the data of pre-stator field pattern shape afterwards by a son mapping circuit.Shown in Fig. 7,8,9,11,17,18 and 19, in pre-reset cycle (PRERP), reset cycle (RP) with during keeping the cycle (SP), data driver 902 is added to addressing electrode X1 to Xm with 0V or ground voltage.In addition, under the control of driving pulse controller 901, data driver 902 is sampling and latch data during the addressing period (AP) of each son field, and provides data voltage (Va) to arrive addressing electrode X1 to Xm afterwards.

Scanner driver 903 is added to scan electrode Y with rising edge waveform (Ramp-up) and negative edge waveform (Ramp-down) during the reset cycle.In addition, (will keep pulse (SUS) and be added to scan electrode Y to scan electrode Y with during the cycle of keeping by scanning impulse Vy) (Sp) at the negative scanning voltage of order application during the addressing period for scanner driver 903.

Under the control of driving pulse controller 901, during pre-reset cycle (PRERP) and reset cycle (RP), scanner driver 903 provides tilt waveform (NRY1, PRY1, PRY2, NRY2) to arrive scan electrode Y1 to Yn, with the whole discharge cell of initialization, and during addressing period (AP), order provides scanning impulse (SCNP) that the sweep trace of data is provided with selection to scan electrode Y1 to Yn afterwards.When PDP has high temperature, during the cycle of keeping (SP), scanner driver 903 provide its rising cycle and decline cycle be about 340ns ± 60ns keep pulse (FSTSUSP, SUSP) to scan electrode Y1 to Yn with selected open in the unit to produce keep discharge.

Keep driver 904 and scanner driver 903 blocked operations, produce therein and use the negative bias voltage (Vzb) of keeping during cycle of negative edge waveform (Ramp-down) and the addressing period to keeping electrode Z, and during the cycle of keeping applying sustain pulse (SUS) to keeping electrode Z.

Under the control of driving pulse controller 901, during pre-reset cycle (PRERP) and reset cycle (RP), keep driver 904 tilt waveform (NRZ1 is provided, NRZ2) to keeping electrode Z, with the whole discharge cell of initialization, and during addressing period (AP), provide Z bias voltage (Vzb) afterwards to keeping electrode Z.Keep driver 904 and scanner driver 903 blocked operations, keep pulse (FSTSUSP, SUSP is LSTSUSP) to keeping electrode Z during the cycle of keeping (SP), to provide.When PDP has high temperature, be set to longlyer keeping the pulse width of keeping pulse (LSTSUP) at last that driver 904 produces, 1 μ s is to 1ms.Each is kept and is set to rising cycle of pulse (FIRSTSUSP, SUSP, LSTSUSP) and decline cycle about 340ns ± 60ns.

At addressing period and keeping in the cycle, driving pulse controller 901 produces and is used for control data driver 902, scanner driver 903 or keep the work schedule of driver 904 and synchronous timing control signal, and timing control signal is added to data driver 902, scanner driver 903 or keeps driver 904, thereby control data driver 902, scanner driver 903 or keep driver 904.More specifically, the above-mentioned scanner driver 903 feasible one scan scan electrode Y of driving pulse controller 901 controls according to the different a plurality of scan types of the order that wherein scans scan electrode Y.In other words, scanner driver 903 uses the one scan scan electrode Y of a plurality of scan types in addressing period, and (scanning impulse Vy) (Sp) is to scan electrode Y to use negative scanning voltage in addressing period.

Driving pulse controller 901 receives vertical/horizontal synchronizing signals and clock signal to produce the required timing control signal (CTRX, CTRY, CTRZ) of each driver 902,903 and 904.Driving pulse controller 901 provides timing control signal (CTRX, CTRY, CTRZ) to corresponding driving device 902,903 and 904, thereby controls each driver 902,903 and 904.The timing control signal (CTRX) that is provided to data driver 902 comprises the sampling clock that is used for sampled data, latch control signal and be used for the switch controlling signal of the opening/closing time of control energy recovery circuit and driving switch element.The timing control signal (CTRY) that is provided to scanner driver 903 comprises the switch controlling signal of the opening/closing time of the energy recovering circuit that is used for gated sweep driver 903 and driving switch element.Be provided to the switch controlling signal that the timing control signal (CTRZ) of keeping driver 904 comprises the opening/closing time of the energy recovering circuit that is used for gated sweep driver 904 and driving switch element.

In addition, when PDP900 has high temperature, driving pulse controller 901 receives output voltage from temperature sensor 906, gated sweep driver 903 and keep driver 904, make that the pulse width of keeping pulse (LSTSUSP) at last is elongated, about 1 μ s is to 1ms, and gated sweep driver 903 and keep driver 904 and make each keep to be set to rising cycle of pulse (FSTSUSP, SUSP, LSTSUSP) and decline cycle about 340ns ± 60ns also.In addition, driving pulse controller 901 gated sweep drivers 903 and keep driver 904 and make at a Y reverse caster waveform (NRY1) before are added to the positive voltage (Vs) of keeping to keep electrode Z.

Driving voltage generator 905 produces the voltage (Vry, Vs ,-V1 ,-V2 ,-Vy, Va, Vyb, Vzb etc.) that is added to PDP900.These driving voltages can change according to the composition of flash-over characteristic or discharge gas, and these are according to the resolution of PDP900, changes such as model.

Described the present invention like this, clearly can carry out multiple change it.The disengaging the spirit and scope of the present invention are not thought in this change, and all thisly are intended to be included among the scope of following claim for the conspicuous modification of those of ordinary skills.

Claims

1. plasma display panel device, it comprises:

Plasmia indicating panel, it comprises a plurality of scan electrodes, a plurality ofly keeps electrode and intersects a plurality of scan electrodes and a plurality of a plurality of data electrodes of keeping electrode; With

Controller, it is used for using at addressing period the one scan scan electrode of the different a plurality of scan types of the order wherein scan a plurality of scan electrodes, data pulse is added to data electrode corresponding to a scan type, with at least one height field of frame, control between application time of last application time of keeping pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, the pulse of keeping that this is last is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

2. plasma display panel device as claimed in claim 1, wherein, when the environment temperature around the temperature of Plasmia indicating panel or the panel is 40 ℃ or when being higher than 40 ℃, this controller be provided with keep pulse at last width than wide at the width of keeping pulse at last of room temperature.

3. plasma display panel device as claimed in claim 1, it further comprises:

Pre-reset driver, it is added to scan electrode by the negative tilt waveform that its voltage is descended gradually and positive voltage is added to and keeps electrode and come the initialization discharge cell;

Reset driver, it is during the reset cycle, and the positive tilt waveform that its voltage is increased gradually is added to scan electrode, and the second negative tilt waveform that its voltage descends gradually is added to scan electrode;

The addressing driver, it selects discharge cell by data pulse is added to data electrode during addressing period;

Keep driver, it is by keeping pulse to scan electrode with keep electrode produce discharge in selected discharge cell alternately applying during the cycle of keeping.

4. plasma display panel device as claimed in claim 1, wherein, this controller calculates each the pairing displacement current corresponding to a plurality of scan types of the view data of input, and uses a scan type scanning scan electrode that has minimum displacement current in a plurality of scan types.

5. plasma display panel device as claimed in claim 1, wherein, this scan electrode comprises first and second scan electrodes, it separates according to the scan electrode of scan type by predetermined number,

Wherein, this data electrode comprises first and second data electrodes,

Wherein, first and second discharge cells are set at the point of crossing of first scan electrode and first and second data electrode, and third and fourth discharge cell is set at the point of crossing of second scan electrode and first and second data electrode, and

Wherein, this controller calculates first result that the data of the data of first discharge cell wherein and second discharge cell are compared to each other, second result that is compared to each other of the data of the data of first discharge cell and the 3rd discharge cell wherein, and the 3rd result that compares of the data of the data of the 3rd discharge cell and the 4th discharge cell wherein, determine the calculation equation of displacement current according to first to the 3rd result's combination, and the displacement current that will use the calculation equation of decision to calculate adds and to calculate the total displacement electric current of first discharge cell.

6. plasma display panel device as claimed in claim 1, wherein, this controller for a plurality of scan type displacement calculating electric currents, and makes displacement current minimized scan type in each son scan scan electrode in each son of frame.

7. plasma display panel device as claimed in claim 1, wherein, this controller calculates each the pairing displacement current corresponding to a plurality of scan types of the picture data that receives, and uses wherein displacement current less than at least one scan type scanning scan electrode of critical displacement current.

8. plasma display panel device as claimed in claim 4, wherein, this scan type comprises wherein carries out first scan types that scan by scan electrode being divided into a plurality of groups, and controller belongs to phase scan electrode on the same group by the first scan type continuous sweep when first scan type makes that displacement current minimizes.

9. plasma display panel device as claimed in claim 1, wherein, keep pulse and initializing signal at last and be applied to this scan electrode, and the erase signal of keeping the rising edge waveform during cycle between pulse and the initializing signal at last is applied to this and keeps electrode.

10. plasma display panel device as claimed in claim 9 wherein, when erase signal being added to when keeping electrode, is added to scan electrode with ground level voltage.

11. plasma display panel device as claimed in claim 1, wherein, this scan electrode or keep electrode be employed keep pulse at last after, be applied in the signal of the negative edge waveform that its voltage descends gradually.

12. plasma display panel device as claimed in claim 1, wherein, the scope of in the end keeping the concluding time point of pulse application and in the reset cycle of next height field, being added to the difference between application time of reset pulse of scan electrode from 100 μ s to 1ms.

13. plasma display panel device as claimed in claim 1, wherein, this width range of keeping pulse at last from 1 μ s to 1ms.

14. plasma display panel device as claimed in claim 1 wherein, is being kept after pulse is added to scan electrode or keeps electrode last, and scan electrode or the voltage of keeping electrode are maintained ground level (GND) voltage.

15. plasma display panel device as claimed in claim 14, wherein, wherein scan electrode or the voltage of keeping electrode maintain ground level (GND) voltage the Cycle Length scope from 100 μ s to 1ms.

16. a plasma display panel device, it comprises:

Plasmia indicating panel, it comprises a plurality of scan electrodes, is parallel to a plurality of data electrodes of keeping electrode and cross scan electrode and keeping electrode of scan electrode; With

Controller, it is in second datagraphic of first datagraphic of the data image that is different from the picture data of importing in addressing period, with the scanning sequency scanning scan electrode of a plurality of scan electrodes of being different from first datagraphic; Data pulse is added to data electrode corresponding to the scanning sequency of a plurality of scan electrodes; With at least one height field of frame, control keep between application time of application time of keeping pulse at last of pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, this pulse of keeping at last of keeping pulse is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.

17. plasma display panel device as claimed in claim 16, wherein, when the environment temperature around the temperature of Plasmia indicating panel or the panel is 40 ℃ or when being higher than 40 ℃, this controller control is kept the width of pulse at last than wide at the width of keeping pulse at last of room temperature.

18. plasma display panel device as claimed in claim 16, it further comprises:

Reset driver, it is added to scan electrode with its voltage positive tilt waveform that increases gradually and the second negative tilt waveform that its voltage descends gradually during the reset cycle;

Keep driver, it keeps pulse to scan electrode with keep electrode produce discharge in selected discharge cell by alternately applying during the cycle of keeping.

19. a method that drives plasma display panel device, this plasma display device comprises a plurality of scan electrodes, a plurality of a plurality of data electrodes of keeping electrode and a plurality of scan electrodes of intersection and keeping electrode, and this method comprises:

In addressing period, use the one scan scan electrode of the different a plurality of scan types of the order wherein scan a plurality of scan electrodes;

Application data bursts to corresponding to the data electrode of a scan type and

In at least one height field of frame, control keep at last between application time of application time of pulse and reset pulse difference greater than except keep at last the pulse two between the adjacent application time of keeping pulse difference and be except keeping 1000 times of the pulse two difference between the adjacent application time of keeping pulse or still less at last, this keeps pulse at last is that keeping after addressing period is added to scan electrode or keeps electrode in the cycle, and this reset pulse is to be added to scan electrode in the reset cycle of next height field.