CN100431287C - Speed detecting method for variable speed communication system - Google Patents
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Abstract
The present invention discloses a detection method for speed rates in a variable speed rate communication system. A decoding result is output in parallel after processed after received data is free from repeating and is decoded. The speed rate of a current frame is detected by a speed rate detecting controller according to the output of a Viterbi decoder. Detection is carried out by adopting the differential values of survival measurement, which are directly derived from the Viterbi decoder, by the present invention. Because the differences of the differential values of survival measurement are evident, a threshold value in the method of the present invention is taken easily, a result of speed rate detection is accurate and calculation is simple. In addition, parallel processing is adopted by the method in the course of detection so that the detection method for speed rates in a variable speed rate communication system has the advantage of little time delay. In addition, because a convolutional coder is not adopted in the method, an error code rate does not need to be calculated either, and precious hardware resources are saved in the aspect of hardware realization.
Description
Technical field
The present invention relates to digital communicating field, more particularly, the present invention relates to not have to receive in the variable rate communication system of speed indication the speed detection method in speed detection method, especially code division multiple access (CDMA) communication system of data.
Background technology
As everyone knows, cdma system is a self-interference system.Then is to disturb from a user's signal for other user, and the performance of whole system and intrasystem interference level have very big relation.If intrasystem user is satisfying under the situation of communication need, send lower power as far as possible, so, system just can support more user, the capacity of system reaches maximization.
Reducing the interference level in the cdma system, is to make power system capacity reach maximized important behave.Adopting the mode of variable bit rate to carry out professional transmission at transmitter terminal, is to reduce a kind of important method that cdma system disturbs.Such as, two kinds of IS-95 systems of typical C DMA system and CDMA2000 system, its agreement regulation basic service sends with four kinds of variable speed: 9600bps (full rate), 4800bps (half rate), 2400bps (1/4 speed) and 1200bps (1/8 speed) (rate set 1) or 14400 bps (full rate), 7200bps (full rate), 3600bps (full rate) and 1800bps (full rate) (rate set 2).For protocol compliant regulation, adopt a rate changeable vocoder in the system, as user during in speech, vocoder provides the speech data frame of higher rate, and when the user mourned in silence, vocoder then provided the speech data frame than low rate.In the CDMA2000 communication system, when system does not have or not have enough power delivery information for information transmitted, system also supports some channel to send with zero rate frames, as Dedicated Control Channel, complement channel and primary channel, during zero rate frames sent, transmitter did not take any power.Adopt said method, intrasystem interference level is reduced more than 50%, in other words, this voice activation characteristic according to people's speech distributes the method for different rates can make the capacity of system improve more than 2 times.
But Frame does not often attach the rate information of this frame when sending, and therefore, receiver receives behind the frame data and do not know the speed of this frame that for the information of correct this frame of acquisition, receiver need detect accurately to the speed of this frame.If receiver makes a mistake to the Frame rate detection that receives, not only can cause the increase of frame error rate, also can make receiver send " " howling, have a strong impact on the quality of conversation.Therefore, rate detection is to realize the key link of high power capacity, high-quality cdma communication system accurately.
Present speed detection method has multiple.Generally they can be classified as two classes: a class is the speed that pre-determined received frame before decoding, decodes according to the speed of determining then; Another kind of is according to four kinds of possible speed the data that receive to be decoded simultaneously, selects most probable one group of decoded result to give vocoder at last.The former great advantage is simple, and for frame data, decoder only needs work once, so its power consumption and hard-wired complexity are all lower.But data shows that the method for existing all definite speed before decoding all can not reach the desired performance of cdma system.The latter decodes according to four kinds of possible situations to frame data that receive, compare with the former, the latter's power consumption and hard-wired complexity are all than higher, but because this method traveled through all possible speed of reception data, so the accuracy of its rate detection of providing will be much better than first method.
Chinese patent 99802999, " rate detection in the direct sequence CDMA system " proposes a kind of above-mentioned two kinds of speed detection methods that thought combines: the speed of determining to receive data according to the repeat property of different rates roughly, carry out Veterbi decoding according to this speed then, then to decoded results recompile again, and the correlation of investigation coded identification and received signal, if this correlation is greater than a default thresholding, just think that the rough speed of determining is correct, otherwise, then again to receive data according to other possible speed decoding, calculate they and the correlation that receives data respectively, thereby have one to detect comparatively accurately receiving data.In order to obtain certain rate detection reliability, this method need be carried out twice detection to some frames, and this just inevitably introduces time-delay, and this speech business of having relatively high expectations for real-time is reluctant to see.
Another one Chinese patent 94107503.6, " in communication control processor, judge the method and apparatus of the speed that transmits the rate of change data ", the method that it proposes is that the data that receive are decoded simultaneously according to four kinds of possible speed, and the error that extracts every kind of decoded result is measured, these errors are measured and are comprised the Cyclic Redundancy Check result, measured and the error rate by this quality, processor is measured the speed of handling with the maximum possible of determining the reception data to these errors.But, the computational methods of the error rate that this method provides are inaccurate, the error rate in this method derives from two paths of data, one the tunnel is that the data that receive are carried out the data that Veterbi decoding is encoded again and obtained, another road is that the data that receive are carried out the data that hard decision obtains, and the different number of this two paths of data symbol is exactly the error rate.Because the decoded result of Viterbi decoder might not be accurate, adds the error that hard decision causes, the error rate of utilizing said method to calculate is not the error rate truly.Because the situation that more speed is judged by accident can take place in the inaccuracy of error rate calculation when utilizing said method to carry out rate detection.
Summary of the invention
Technical problem to be solved by this invention is the contradiction that overcomes implementation complexity, accuracy in detection in the existing speed detection method, proposes to measure the method for carrying out rate detection with a kind of new error.
For realizing goal of the invention, the method that the present invention proposes mainly may further comprise the steps:
1 separates duplicator separates repetition to the data after handling through deinterleaver;
2 Viterbi decoders are decoded to the data of handling through step 1;
3 decoded results and line output, riches all the way delivers to decoded data memory, and difference and normalized value thereof are measured in other one tunnel calculating, then result of calculation are sent to the rate detection controller;
4 rate detection controllers detect according to the output of the Viterbi decoder speed to present frame;
5 selectors select the decoded data of respective rate to give vocoder from decoded data memory according to the testing result of rate detection controller.
Method of the present invention adopts the survival be directed to Viterbi decoder to measure difference and detects, and measures the difference significant difference owing to survive, thereby it is fixed that threshold value in the inventive method is got easily, and rate detection result is accurate, calculates simple; And this method adopts parallel processing in testing process, has the little advantage of time-delay.In addition, owing to do not adopt convolution coder, also need not to calculate the error rate in this method, on hardware is realized, saved valuable hardware resource.
Description of drawings
Fig. 1 is that the forward link of the CDMA2000 system configuration one of agreement regulation sends structural representation.
Fig. 2 is the reception structural representation corresponding with Fig. 1.
Fig. 3 is the internal structure schematic diagram of rate detection shown in Fig. 2 and decoder.
Fig. 4 measures difference to produce schematic diagram in the inventive method.
Fig. 5 is the CDMA2000 system configuration a period of time of adopting the agreement regulation, and Fig. 3 middle controller carries out the embodiment that speed is differentiated.
Fig. 6 is that Fig. 3 middle controller carries out the embodiment that speed is differentiated when adopting the CDMA2000 system configuration two of agreement regulation.
Embodiment
Below in conjunction with drawings and Examples the present invention is described in detail.
Shown in Figure 1 is that the forward link of the CDMA2000 system configuration one of agreement regulation typically sends structural representation.Vocoder 102 at first produces the speech data frame of 20ms, according to the difference of voice activation degree, can contain 172,80,40 and 16 bits in the frame, and they are referred to as full-rate vocoding, half rate frame, 1/4 rate frame and 1/8 rate frame respectively.If the speed that vocoder 102 produces is full-rate vocoding and half rate frame, CRC and tail bit maker 104 add CRC bit and 8 tail bits of some in the back of this frame, if the speed that vocoder 102 produces is 1/4 rate frame and 1/8 rate frame, 8 tail bits are added in 104 back at this frame of CRC and tail bit maker.The dateout of 106 couples of CRC of convolution coder and tail bit maker 104 is carried out convolutional encoding according to 1/2 mode.
In order to guarantee that different speed has identical modulation symbol, the coded identification of 108 pairs of half rate frames of duplicator, 1/4 rate frame and 1/8 rate frame repeats respectively 1,3 and 7 time.Like this, no matter which kind of speed vocoder 102 produces, and the output of duplicator 108 all is 384 modulation symbols.In order to resist the rapid fading of wireless channel, 110 pairs of modulation symbols of interleaver have been made interleaving treatment.The output signal of 112 pairs of interleavers 110 of modulator is carried out the WALSH quadrature modulation, and the long code scrambling is sent by transmitter after short code phase shift keying (QPSK) modulation treatment.
Fig. 2 is and the corresponding reception structural representation of Fig. 1.The wireless signal that demodulator 202 receives has experienced various losses when passing through wireless channel, as path loss, and shadow fading, multipath fading etc., the processing that 202 pairs of demodulators receive data comprises that multipath merges, and the QPSK demodulation is separated the long code scrambler and conciliate processes such as Walsh (WALSH) quadrature modulation.The effect of deinterleaver 204 is the dateout deinterleavings to demodulator 202.Realize rate detection and the decoder 206 of the inventive method, determine the most probable speed of present frame and the decoded result of this speed correspondence is sent into vocoder 208 do last sound code conversion processing according to the dateout of deinterleaver 204.
If reverse link, deinterleaver 204 is also tackled data and is separated the puncture processing after data being done the deinterleaving processing, does not illustrate among the figure.
The internal structure schematic diagram of rate detection and decoder 206 comprises and separates duplicator 302 as shown in Figure 3, Viterbi decoder 304, and decoded data memory 306, rate detection controller 308 and selector 310 are formed.Separate duplicator 302 and the dateout of deinterleaver 204 is separated repetition simultaneously according to four kinds of possible data, separate data after the repetition by Viterbi decoder 304 decodings, owing to will decode simultaneously to four kinds of possible speed, so four Viterbi decoders of this process need.Its decoded result carries out parallel processing: on the one hand decoded result is kept in the decoded data memory 306; On the other hand, Viterbi decoder 304 is also measured the calculating of difference to decoded result, calculate survivor path and measure with time survivor path is measured and measure difference dm1, dm2, dm4 and dm8 and normalized value (hereinafter referred to as " difference is measured in normalization ") DM1, DM2, DM4, DM8, these eight error measurement values are all as the input of rate detection controller 308.
Viterbi decoder 304 produce measure difference dm schematic diagram as shown in Figure 4.For convenience of description, Fig. 4 corresponding codes device is that coding ratio is 1/2, and constraint length is 3, and generator polynomial is the convolution coder of (1,1,1) and (1,0,1).The input coding symbol sebolic addressing of supposing decoder under certain speed is:
X＝(x1，x2，x3，x4，x5，x6，x7，x8，x9，x10) (1)
According to the operation principle of Viterbi decoder, Viterbi decoder is relatively at t=t
i(i=1,2,3,4,5) receiving sequence and t=t constantly
iConstantly arrive all trellis paths of same state.When two paths at t=t
iConstantly enter same state, the path with relatively large degree value is with selected, and selected path is called survivor path, at t=t
5Constantly, Viterbi decoder will be determined a unique survivor path, establish the survivor path of input coding symbol sebolic addressing X correspondence:
Survi?vingPath0＝(S0，S0，S0，S0，S0，S0) (2)
Viterbi decoder is in the decoding that finishes input coding symbol sebolic addressing X, when determining survivor path, an all right unique definite other paths, this path path metric be only second to the path metric of survivor path, this path is called time survivor path, establishes the inferior survivor path of input coding symbol sebolic addressing X correspondence:
SurvivingPath1＝(S0，S2，S3，S3，S1，S0) (3)
The path metric of survivor path SurvivingPath0 correspondence then:
Metric0＝x1+x2+x3+x4+x5+x6+x7+x8+x9+x10 (4)
The path metric of inferior survivor path SurvivingPath1 correspondence:
Metric1＝-x1-x2+x3-x4-x5+x6+x7-x8-x9-x10 (5)
Measure difference and be defined as the poor of measuring of survivor path SurvivingPath0 and time survivor path SurvivingPath1, that is:
dm＝Metric0-Metric1 (6)
(1) if the information data of certain speed comprises cyclic redundancy check bits, system measures difference according to cyclic redundancy check bits and normalization and determines its speed.
(2) if the information data of certain speed does not comprise cyclic redundancy check bits, system measures difference according to normalization and relativeness is determined its speed.
(3) if system on principle (1) and principle (2) determine that present frame speed is not one of four kinds of speed (full rate, half rate, 1/4 speed and 1/8 speed), system determines that according to measuring difference present frame speed is zero rate frames or delete frame.
In another better embodiment, in order to guarantee accurate more rate detection effect, if the data message under certain speed comprises the Cyclic Redundancy Check bit, for example, the full-rate vocoding and the half rate frame of CDMA2000 system wireless configuration one all comprise the CRC bit, the output of Viterbi decoder 304 also comprises the CRC bit check results under this speed so, and this check results is also as one of parallel input of rate detection controller.CDMA2000 system wireless with the agreement regulation disposes one below, and considers that the output of full rate and half rate has the CRC bit information, is example in conjunction with Fig. 5, and the concrete decision process of rate detection controller 308 is described:
Wherein, Q1, Q2 represent the CRC check end value of full rate, half rate respectively, if 1 expression is by CRC check, if 0 expression is not passed through.FR, HR, QR, ER, RR and ZR represent full-rate vocoding, half rate frame, 1/4 rate frame, 1/8 rate frame, delete frame and zero rate frames respectively.
If full rate CRC check bit passes through, and it is that four speed are measured in the difference maximum that difference DM1 is measured in full rate normalization, detector determines that then present frame speed is full rate, if it is not that four speed are measured in the difference maximum that difference DM1 is measured in full rate normalization, but DM1 is greater than thresholding T1, and detector judges that present frame speed is full rate.If above-mentioned condition does not satisfy, rate detection controller 308 usefulness and detection full rate similar methods detect half rate: half rate CRC check bit passes through, and it is that four speed are measured in the difference maximum that difference DM2 is measured in half rate normalization, detector determines that present frame speed is half rate, if it is not that four speed normalization are measured in the difference maximum that half rate is measured difference DM2, but DM2 is greater than thresholding T2, and detector judges that present frame speed is half rate.If above-mentioned condition does not satisfy, detector detects 1/4 speed normalization again and measures difference DM4 whether greater than thresholding T3 and be that four speed are measured in the difference maximum, if satisfy, then detector judges that present frame speed is 1/4 speed, if do not satisfy, detector detects 1/8 speed normalization again and measures difference DM8 whether greater than thresholding T4 and be that four speed are measured in the difference maximum, if satisfy, detector judges that present frame speed is 1/8 speed, if do not satisfy, detector detects full rate again and measures difference dm1 and whether measure difference dm2 and correction value Δ T1 sum greater than thresholding T5 or half rate and whether measure difference dm4 and correction value Δ T2 sum greater than thresholding T5 or 1/4 speed and whether whether measure difference dm8 and correction value Δ T3 sum greater than thresholding T5 greater than thresholding T5 or 1/8 speed, if an establishment is arranged in these four, detector judges that present frame speed is delete frame, otherwise detector judges that present frame speed is zero rate frames.It is pointed out that the value of above-mentioned thresholding T1, T2, T3, T4 and T5, and correction value Δ T1, Δ T2 and Δ T3, can obtain, and Δ T1, Δ T2 and Δ T3 there are following relation by doing emulation testing:
ΔT1＜ΔT2＜ΔT3 (7)
What provide previously is that a specific embodiment illustrates and described the present invention.Those skilled in the art can make amendment under the prerequisite that does not depart from aim of the present invention and scope, the present invention can be used in the variable bit rate detection of other radio configuration of cdma system.For example, the CDMA2000 system wireless that agreement is stipulated disposes two situation, and four kinds of speed all have check bit CRC, the scheme in the foregoing description can be applied in this radio configuration easily, as shown in Figure 6, do not describe in detail one by one at this.
Claims (5)
1, the speed detection method in the variable rate communication system is characterized in that may further comprise the steps:
1) separates duplicator the data after handling through deinterleaver are separated repetition;
2) Viterbi decoder is decoded to the data of handling through step 1;
3) decoded result and line output, riches all the way delivers to decoded data memory, other one the tunnel calculate survivor path and time survivor path measure difference and normalized value thereof, then result of calculation is sent to the rate detection controller;
4) the rate detection controller detects according to the output of the Viterbi decoder speed to present frame;
5) selector selects the decoded data of respective rate to give vocoder from decoded data memory according to the testing result of rate detection controller.
2, method according to claim 1, it is characterized in that described step 3) can comprise: if the data message under certain speed comprises cyclic redundancy check bits, Viterbi decoder is also exported cyclic redundancy check bits check results under this speed to the rate detection controller so.
3, method according to claim 1 and 2 is characterized in that, the detection of described step 4) rate detection controller comprises following principle:
If the information data of certain speed comprises cyclic redundancy check bits, then measure difference and determine its speed according to cyclic redundancy check bits and normalization;
If the information data of certain speed does not comprise cyclic redundancy check bits, then measure the relativeness that difference and normalization measures between the difference and determine its speed according to normalization;
Do not determine that according to measuring difference present frame speed is zero rate frames or delete frame first if determine present frame speed for full rate, half rate, 1/4 speed or 1/8 speed according to above-mentioned two principles.
4, method according to claim 3 is characterized in that described principle specifically comprises:
If the full rate cyclic redundancy check bits is passed through, and full rate normalization to measure difference be that four speed are measured in the difference maximum or greater than thresholding T1, judged that then present frame speed is full rate;
If the half rate cyclic redundancy check bits is passed through, and half rate normalization to measure difference be that four speed are measured in the difference maximum or greater than thresholding T2, judged that then present frame speed is half rate;
If 1/4 speed normalization is measured difference greater than thresholding T3 and to be that four speed are measured in the difference maximum, judge that then present frame speed is 1/4 speed;
If 1/8 speed normalization is measured difference greater than thresholding T4 and to be that four speed are measured in the difference maximum, judge that then present frame speed is 1/8 speed;
If full rate is measured difference and is measured difference and correction value Δ T1 sum greater than thresholding T5 greater than thresholding T5 or half rate, perhaps 1/4 speed is measured difference and correction value Δ T2 sum greater than thresholding T5, perhaps 1/8 speed is measured difference and correction value Δ T3 sum greater than thresholding T5, if an establishment is arranged in these four, judge that then present frame speed is delete frame, otherwise, judge that present frame speed is zero rate frames.
5, method according to claim 4 is characterized in that: described correction value Δ T1, Δ T2 and Δ T3 satisfy following relationship: Δ T1＜Δ T2＜Δ T3.
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| US5796757A (en) * | 1995-09-15 | 1998-08-18 | Nokia Mobile Phones Ltd. | Methods and apparatus for performing rate determination with a variable rate viterbi decoder |
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| CN1206315A (en) * | 1997-04-10 | 1999-01-27 | 索尼公司 | Transmission speed predicting apparatus and transmission speed predicting method |
| CN1252656A (en) * | 1998-08-31 | 2000-05-10 | 三星电子株式会社 | Method and apparatus for determining data rate transmitted by variable rate |
| CN1266577A (en) * | 1997-08-08 | 2000-09-13 | 夸尔柯姆股份有限公司 | Method and apparatus for determining the rate of received data in a variable rate communication a debit variable |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5796757A (en) * | 1995-09-15 | 1998-08-18 | Nokia Mobile Phones Ltd. | Methods and apparatus for performing rate determination with a variable rate viterbi decoder |
| CN1185880A (en) * | 1996-03-29 | 1998-06-24 | 摩托罗拉公司 | Method and apparatus for determining coding rate in a wireless communication system |
| CN1196845A (en) * | 1996-06-27 | 1998-10-21 | 摩托罗拉公司 | Method and apparatus for rate determination in communication system |
| CN1206315A (en) * | 1997-04-10 | 1999-01-27 | 索尼公司 | Transmission speed predicting apparatus and transmission speed predicting method |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081105 Termination date: 20200429 |