CN100428175C - Method for inspecting fault code in data - Google Patents
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- CN100428175C CN100428175C CNB2005101080907A CN200510108090A CN100428175C CN 100428175 C CN100428175 C CN 100428175C CN B2005101080907 A CNB2005101080907 A CN B2005101080907A CN 200510108090 A CN200510108090 A CN 200510108090A CN 100428175 C CN100428175 C CN 100428175C
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Abstract
The present invention relates to a method for inspecting error codes in data, which is used for inspecting whether or not read data has a form code error, namely whether or not the data only has one data bit error. The method for inspecting error codes in data is characterized in that firstly, the data is read for generating an error correction and comparison code which corresponds to the data; subsequently, the values of all bits of the error correction and comparison code are added for obtaining an additive value; afterwards, the additive values are judged whether or not a carry bit exists; when the additive values do not have the carry bit, the addition of the additive values is further judged whether or not equal to 1; when the additive values have the carry bit and the addition is equal to 1, the representation is that the read data only has one data bit error. The method for inspecting error codes in data of the present invention can be used for rapidly inspecting the form code error and reducing the number of setting inspecting elements for reducing areas occupied by the inspecting elements.
Description
Technical field
The present invention relates to a kind of method of inspecting fault code in data, particularly relate to the method whether inspecting fault code in data of a data bit mistake is only arranged in a kind of detecting information.
Background technology
In the epoch of information prosperity now, the data of in the past carrying (is data, below all be called data) all be to use disk sheet to copy the data of reading, but disk sheet stores data limited, when desiring to carry big document, just must carry DISK to Image or with recordable data in CD-RW discsCD-RW, so when carrying the high capacity data be quite inconvenience.Because computing machine science and technology is fast-developing in recent years, in order to address the above problem, the computing machine dealer utilizes memory body, fast flash memory bank (Flash Memory) for example, develop storage devices such as the memory card that multiple capacity specifications and dish with oneself, and collocation is used in mobile computer, personal digital assistant (Personal Digital Assistant, PDA), portable electric product such as mobile phone and digital camera, can be with the MP3 that desires to carry, picture, important briefing file data all stores all, its quick access, carry light and handy, convenient and practical, no matter it is required on class in school making now, the market is used or is gone on business and be in harmony public, do not need to go to deal with various occasions as carrying hard disk or disk sheet in the past again, all in the past inconveniences one of are all thrown sky.
Portable electric product main frame now, card reader for example, mobile computer, personal digital assistant, mobile phone and digital camera etc., for fear of with storage device data transmission process in, because being subjected to noise disturbs and generation data mistake, influence accuracy of data, be to be provided with the bug check circuit, with at data transmission during to storage device, can produce one group of bug patch code (Error CorrectionCode, ECC), bug patch code will be stored to storage device together with the data transmission, when other main frames read the stored data of storage device, also bug patch code can be read and produce another according to the data of reading and organize bug patch code; Afterwards, main frame can compare two groups of bug patch codes, and whether the data bit mistake is arranged in the data that is read to learn, the data that is read as two groups of identical i.e. representatives of bug patch code is correct.Action will be specifically described at hypomere in detail.
Main frame is when comparing two groups of bug patch codes, to produce one group of error correction comparison code, main frame can learn whether the data that is read is correct from the error correction comparison code, as in the data that reads when wrong, also can learn and be which kind of type error, and whether immediate response can be repaired for differentiating this mistake data to state bit (Status bit).When the value of each bit of error correction comparison code is all 0, promptly represent two groups of bug patch codes identical, the data that main frame read is correct and errorless, when the error correction comparison code has the value of a bit to be 1, in the data of promptly representing main frame and being read a data bit mistake is arranged, the wrong kenel of this kind is called formula error code (Code Error), and the data of the wrong kenel of this kind can be repaired.
Following is with the example of one group of easy bugs correction comparison code with 4 bits as an illustration, its formula error code kenel has (0001), (0010), (0100), (1000) four kinds, supposed that it is (0101) that junior one main frame deposits in the bug patch code of storage device together with data, another main frame is read data and bug patch code (0101) from storage device afterwards, it produces another group bug patch code according to the data of being read and is (0001), main frame will compare two bug patch codes and obtain error correction comparison code (0100), so in the data of promptly representing main frame to read a data bit mistake is arranged, can repair.
Can read the main frame of storage device now, mostly use sample (Pattern) comparison method, whether with detecting error correction comparison code is the formula error code, so-called sample comparison method is to produce data sample earlier to compare with the error correction comparison code of desire analysis again, for instance, compare the error correction comparison code of 4 bits as desire, learn whether be the formula error code, promptly must produce all formula error code kenels (0001) earlier, (0010), (0100), (1000), the error correction comparison code of desire analysis compares with all formula error code kenels more one by one, can know whether the error correction comparison code is the formula error code.Though adopt sample comparison method directly simple, but along with the bit number of comparison data increases, the data sample number that main frame must be produced also can improve relatively, and the set comparison circuit of main frame also can increase, and then improve the complexity of comparison circuit and use number of electronic components, comparison time also can be elongated in addition, is used to compare the comparison circuit of the error correction comparison code of N bit, and N comparer and N-1 or lock (OR Gate) promptly must be arranged.
This shows that the method for above-mentioned existing inspecting fault code in data obviously still has inconvenience and defective, and demands urgently further being improved in method and use.The problem that exists for the method that solves inspecting fault code in data, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and general method for detecting does not have appropriate method to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of method of new inspecting fault code in data, just become the current industry utmost point to need improved target.
Because the defective that the method for above-mentioned existing inspecting fault code in data exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of method of new inspecting fault code in data, can improve the method for general existing inspecting fault code in data, make it have more practicality.Through constantly research, design, and after studying repeatedly and improving, create the present invention who has practical value finally.
Therefore, the problem that the present invention promptly exists at above-mentioned prior art and propose a kind of method of new inspecting fault code in data, it can reduce the detecing element quantity of the circuit board that is arranged at main frame, reduce the area that takies motherboard, and can be efficient and in the data that quick detecting is read whether a data bit mistake is only arranged, just can judge the formula error code fast, to address the above problem.
Summary of the invention
Fundamental purpose of the present invention is, overcome the existing defective of method of existing inspecting fault code in data, and provide a kind of method of new inspecting fault code in data, technical matters to be solved is to make its value by each bit of addition error correction comparison code, to obtain an additive value, judge whether additive value has carry and summation whether to equal 1, whether can detect the error correction comparison code fast is the formula error code, when having carry and summation, additive value do not equal 1, promptly representing the error correction comparison code is the formula error code, so can reduce the detecting time, improve detecting efficient.
Another object of the present invention is to, a kind of method of inspecting fault code in data is provided, technical matters to be solved is to make it use easy logical circuit, the value of each bit of addition error correction comparison code, to obtain an additive value, and judge whether additive value has carry and summation whether to equal 1, can learn whether the error correction comparison code is the formula error code, so can reduce being arranged at main frame and being used to detect the complexity of circuit of formula error code and shared area, and can reduce cost of manufacture.
The object of the invention to solve the technical problems realizes by the following technical solutions.The method of a kind of inspecting fault code in data that proposes according to the present invention, it may further comprise the steps: a data that reads a storage device with to one first bug patch code (Error CorrectionCode) that should data; Produce one second bug patch code (Error CorrectionCode) of corresponding this data that is read; Relatively this first bug patch code and this second bug patch code produce an error correction comparison code, and this error correction comparison code has plural bit; The value of each bit of this error correction comparison code of addition obtains an additive value; And judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1.
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
The method of aforesaid inspecting fault code in data, wherein when this additive value no-carry, judge whether the summation of this additive value equals 1 step, when the summation of this additive value equals 1, then this data only has a data bit mistake, is formula error code (code error).
The method of aforesaid inspecting fault code in data wherein when this additive value no-carry, judges whether the summation of this additive value equals 1 step, when the summation of this additive value is not equal to 1, and this data no data bit mistake then.
The method of aforesaid inspecting fault code in data wherein in the value of each bit of this error correction comparison code of addition, obtains in the step of an additive value, and it is to use complex adder, and the value of each bit of this error correction comparison code of addition is to obtain this additive value.
The method of aforesaid inspecting fault code in data, wherein said storage device are a fast flash memory bank.
The method of aforesaid inspecting fault code in data, wherein said fast flash memory bank can be a memory card.
Again, the object of the invention to solve the technical problems also adopts following technical scheme to realize.The method of a kind of inspecting fault code in data that proposes according to the present invention, it may further comprise the steps: read a data, produce an error correction comparison code that should data, this error correction comparison code has plural bit; The value of each bit of this error correction comparison code of addition obtains an additive value; And judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1; Wherein, when the summation of this additive value equals 1, then this data only has a data bit mistake, is formula error code (code error).
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
The method of aforesaid inspecting fault code in data wherein when this additive value no-carry, judges whether the summation of this additive value equals 1 step, when the summation of this additive value is not equal to 1, and this data no data bit mistake then.
The method of aforesaid inspecting fault code in data wherein in the value of each bit of this error correction comparison code of addition, obtains in the step of an additive value, and it is to use complex adder, and the value of each bit of this error correction comparison code of addition is to obtain this additive value.
The method of aforesaid inspecting fault code in data is wherein reading a data, produces the step to an error correction comparison code that should data, is to read this stored data of a storage device.
The method of aforesaid inspecting fault code in data, wherein said storage device are to be a fast flash memory bank.
Moreover the object of the invention to solve the technical problems realizes by the following technical solutions again.The method of a kind of inspecting fault code in data that proposes according to the present invention, it may further comprise the steps: read a data, produce an error correction comparison code that should data, this error correction comparison code has plural bit; The value of each bit of this error correction comparison code of addition obtains an additive value; And judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1.
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
The method of aforesaid inspecting fault code in data, wherein when this additive value no-carry, judge whether the summation of this additive value equals 1 step, when the summation of this additive value equals 1, then this data only has a data bit mistake, is formula error code (code error).
The method of aforesaid inspecting fault code in data wherein when this additive value no-carry, judges whether the summation of this additive value equals 1 step, when the summation of this additive value is not equal to 1, and this data no data bit mistake then.
The method of aforesaid inspecting fault code in data wherein in the value of each bit of this error correction comparison code of addition, obtains in the step of an additive value, and it is to use complex adder, and the value of each bit of this error correction comparison code of addition is to obtain this additive value.
The method of aforesaid inspecting fault code in data is wherein reading a data, produces the step to an error correction comparison code that should data, is to read this stored data of a storage device.
The method of aforesaid inspecting fault code in data, wherein said storage device are to be a fast flash memory bank.
In addition, the object of the invention to solve the technical problems also realizes by the following technical solutions.The method of a kind of inspecting fault code in data that proposes according to the present invention, this data have an error correction comparison code that comprises plural bit, and these bits have a bit value respectively, and this method may further comprise the steps: each bit value of addition is to obtain an additive value; And judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1.
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
The method of aforesaid inspecting fault code in data wherein when this additive value no-carry, judges whether the summation of this additive value equals 1 step, when the summation of this additive value is not equal to 1, and this data no data bit mistake then.
The method of aforesaid inspecting fault code in data, wherein when this additive value no-carry, judge whether the summation of this additive value equals 1 step, when the summation of this additive value equals 1, then this data only has a data bit mistake, is formula error code (code error).
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, major technique of the present invention thes contents are as follows: the method that the invention provides a kind of inspecting fault code in data, it is applied to can read a main frame of the data of a storage device, supply main frame when reading the data of storage device, can simple and easy detecting know whether a data bit mistake is only arranged in the data that is read, be formula error code (Code Error), method for detecting of the present invention is to read data, produce an error correction comparison code of corresponding data, this error correction comparison code has plural bit; Then, the value of each bit of addition error correction comparison code obtains an additive value; Afterwards, judge whether additive value has carry, when additive value does not have carry, judge whether the summation of additive value equals 1, when additive value did not have carry and summation to equal 1, it was the formula error code that the data of promptly representing main frame and being read only has a data bit mistake.
By above technical scheme, the method for inspecting fault code in data of the present invention has following advantage at least:
1, the present invention is the value by each bit of addition error correction comparison code, to obtain an additive value, judge whether additive value has carry and summation whether to equal 1, whether can detect the error correction comparison code fast is the formula error code, do not equal 1 when additive value has carry and summation, promptly representing the error correction comparison code is the formula error code, so can reduce the detecting time, improve detecting efficient, thereby be suitable for practicality more.
2, the present invention is to use easy logical circuit, the value of each bit of addition error correction comparison code, to obtain an additive value, and judge whether additive value has carry and summation whether to equal 1, can learn whether the error correction comparison code is the formula error code, so can reduce being arranged at main frame and being used to detect the complexity of circuit of formula error code and shared area, and can reduce cost of manufacture, thereby be suitable for practicality more, and have the value on the industry.
From the above, use the designed circuit for detecting of method for detecting of the present invention, only need by easy logical circuit, whether promptly can detect the error correction comparison code fast is the formula error code, whether learn in the data that main frame reads has the data bit mistake and a data bit mistake is only arranged, but with immediate reaction in the state bit, learn for main frame, to repair, be very suitable for practicality.
In sum, the method of the inspecting fault code in data that the present invention is special, be when being applied to read the stored data of storage device, whether can simple and easyly detect the data that is read fast wrong, and a data bit mistake is only arranged, this method for detecting mainly is after reading data, and the corresponding data that is read produces the error correction comparison code; Afterwards, the value of each bit of addition error correction comparison code is to obtain additive value; Then, judge whether additive value has carry, when judgement does not have carry, whether the summation of then further judging additive value equals 1, as judge that additive value does not have carry and sum total to equal at 1 o'clock, represent that promptly the error correction comparison code is the formula error code, in the data that representative is read the data bit mistake is arranged, but a data bit mistake is only arranged.The present invention is whether the data that detecting is read has the formula error code, and whether a data bit mistake is promptly only arranged in the data.By method for detecting of the present invention, can detect the formula error code fast, reduce the quantity that detecing element is set, promptly can reduce the shared area of detecing element.It has above-mentioned many advantages and practical value, and in class methods, do not see have similar design to publish or use and really genus innovation, no matter it is all having bigger improvement on method or on the function, have large improvement technically, and produced handy and practical effect, and the method for more existing inspecting fault code in data has the multinomial effect of enhancement, thus be suitable for practicality more, and have the extensive value of industry, really be a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of instructions, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Figure 1A is that the present invention writes the process flow diagram of data to storage device.
Figure 1B is the process flow diagram that the present invention detects the data that reads from storage device.
Fig. 2 is the logical circuitry of preferred embodiment of the present invention.
Fig. 3 is the logical circuitry of another preferred embodiment of the present invention.
11: anti-lock 13: anti-lock
15: anti-or lock 17: and not b gate
21: or lock 23: and lock
25: anti-or lock 31: anti-or lock
33: the anti-or lock 35 of mutual exclusion: mutual exclusion or lock
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, its embodiment of method, method, step, feature and the effect thereof of the inspecting fault code in data that foundation the present invention is proposed, describe in detail as after.
The present invention is by the value of each bit of addition error correction comparison code, to obtain an additive value, and judge whether additive value has the summation of carry and additive value whether to equal 1, can learn whether a data bit mistake is only arranged the data that reads from storage device.
Seeing also shown in Figure 1A, is that the present invention writes the process flow diagram of data to storage device.The method of the inspecting fault code in data of preferred embodiment of the present invention, shown in step S1 among the figure, when main frame produces a data and desires to write to storage device, will carry out rapid S2, according to this data produce one first corresponding bug patch code (Error Correction Code, ECC); Afterwards, promptly shown in step S3, store data with first bug patch code to storage device.Afterwards, when another main frame reads the stored data of storage device, will shown in the step S11 of Figure 1B, also can read first bug patch code of corresponding data; Then, main frame according to the data that is read, produces one second corresponding bug patch code shown in step S12; Then, shown in step S13, relatively first bug patch code and second bug patch code produce an error correction comparison code, and it is to have plural bit.
The present invention mainly is the characteristic by the formula error code, its characteristic is that the value of one bit is only arranged is 1 to the value of all bits of formula error code, the value of all the other bits is all 0, event is carried out addition with the value of each bit of formula error code, an obtained additive value, the summation that does not have carry and additive value can equal 1, event can learn easily by this judgment principle whether the error correction comparison code is the formula error code, knows whether the data that main frame reads only has a data bit mistake or be plural data bit mistake.
As shown in the above description, after main frame finishes step S13, when in the data that the desire detecting is read whether a data bit mistake only being arranged, main frame will be shown in step S14, the value of each bit of addition error correction comparison code, to obtain an additive value, for example the error correction comparison code is (0001), is promptly obtained additive value to 0,0,0,1 mutually in regular turn.Calculate 0+0+0+1 according to binary addition, this routine additive value is not have carry, and the sum total bit equals 1.When being (1001), calculating the obtained additive value of 1+0+0+1 according to binary addition and have carry, and the sum total bit equals 0 as the error correction comparison code.Then, shown in step S15, judge whether additive value has carry, as judgement carry being arranged, shown in step S16, is to have plural data bit mistake in the expression data that main frame read promptly, as above-mentioned error correction comparison code is the example of (1001), when judging that additive value does not have carry, then further execution in step S17 judges whether the sum total of additive value equals 1, as judge that summation is not equal to 1, promptly shown in step S18, in the data that expression is read, there is not the data bit mistake, and as judging that summation equals 1, promptly shown in step S19, be only to have a data bit wrong in the data that representative is read, and be the formula error code.
See also shown in Fig. 2 and the table one, Fig. 2 is the logical circuitry of preferred embodiment of the present invention, and table one is the truth table of the logical circuitry of Fig. 2 preferred embodiment of the present invention.
Table one
Present embodiment has the example of the error correction comparison code of 4 bits for detecting.As shown in the figure, this error correction comparison code, include one first bit [0], one second bit [1], one the 3rd bit [2] and a nibble [3], first bit [0] of error correction comparison code respectively is two anti-locks (Not Gate) 11 with the value of second bit [1], 13 input value, first bit [0], the value of second bit [1] is respectively through anti-lock 11,13 anti-phase after, export two input ends of an anti-or lock (NOR Gate) 15 to, output valve C1 anti-or lock 15 is the carry value of first bit [0] and the value institute addition of second bit [1], and (0 is no-carry, 1 for there being carry), anti-lock 11,13 are one and lock (ANDGate) with the combination of anti-or lock 15.
The 3rd bit [2] of error correction comparison code and the value of nibble [3] are one or lock (OR Gate) 21 and one and the input value of lock 23, the output valve C2 that reaches lock 23 is the carry value of the value institute addition of the 3rd bit [2] and the 3rd bit [3], and (0 is no-carry, 1 for there being carry), the output valve C1 of anti-or lock 15 with and the output valve C2 of lock 23 all export the input end of an anti-or lock 31 to, whether the output valve of anti-or lock 31 is formula error code (1 for be that 0 for denying) in order to expression error correction comparison code then.When the value of first bit [0] of error correction comparison code and second bit [1] has carry during in addition, output valve C1 just anti-or lock 15 is 1 o'clock, perhaps the 3rd bit [2] of error correction comparison code has carry with the value of nibble [3] when addition, the output valve C2 that just reaches lock 23 is 1 o'clock, output valve Y anti-or lock 31 is 0, and expression error correction comparison code is not the formula error code.
In addition, except whether the value of each bit of detecting error correction comparison code has the carry when the addition, also must be more whether the summation of addition be equaled 1 and detect.The summation of the value institute addition of first bit [0] and second bit [1] is the output valve S1 for an and not b gate (NAND Gate) 17, the input value of and not b gate 17 be first bit [0] with the value of second bit [1] through anti-lock 11,13 output valves after anti-phase, anti-lock 11,13 are one or lock with the combination of and not b gate 17, so the value when first bit [0] and second bit [1] is all 1, the summation S1 of addition gained is 1, but when calculating 1+1 according to correct binary addition, the summation S1 of gained should be 0, and carry value output valve C1 just anti-or lock 15 is 1, value when first bit [0] and second bit [1] is all 1 from the above, the summation S1 of addition gained will be not equal to right value 0, but because additive value has carry is that C1 is 1, so the output valve Y of anti-or lock 31 is 0, the result of expression detecting error correction comparison code is not the formula error code.Shown in truth table, when the value of first bit [0] and second bit [1] was all 1, C1 equaled 1, Y equals 0, be all 1 so work as first bit [0] with second bit [1], the correctness of the summation S1 of gained when addition does not influence the result who detects the error correction comparison code.
The summation of the value institute addition of the 3rd bit [2] and nibble [3] be for or the output valve S2 of lock 21, learn as above-mentioned, when the value of the 3rd bit [2] and nibble [3] is all 1 addition, though or the output valve S2 of lock 21 is 1, and be not equal to the right value 0 of binary addition gained, but whether expression has output valve C2 carry and lock 23 to be 1, the value of representing the 3rd bit [2] and nibble [3] is that carry is arranged when being all 1 addition, output valve Y so anti-or lock 31 will be 0, the result of representative detecting error correction comparison code is not the formula error code, so the 3rd bit [2] and nibble [3] are all 1 the correctness of summation when addition, can not influence the result of detecting error correction comparison code.Shown in truth table, when the value of the 3rd bit [2] and nibble [3] is all 1, C2 equals 1, and Y equals 0.
Summation S1 and S2 export the input end of the anti-or lock (EXCLUSIVE NOR Gate) 33 of a mutual exclusion to, mutual exclusion output valve S3 anti-or lock 33 exports anti-or lock 31 to, so when summation S1 and S2 are different value, represent that promptly it is that summation S1 and S2 only have a value at 1 o'clock, mutual exclusion output valve S3 anti-or lock 33 is 0, shown in truth table, S1=1, S2=0 or S1=0, during S2=1, S3 equals 0, whether expression this moment has the C1 of carry and C2 also is 0 o'clock, 3 input value C1 of anti-or lock 31, S3, C2 promptly is all 0, and the output valve Y after anti-or lock 31 is anti-phase will be 1, and so promptly representing the error correction comparison code is the formula error code, but immediate response is in the state bit, know the data of being read in for main frame, a data bit mistake is only arranged, can repair.This is for example shown in the truth table, when S3=0, C1=0, C2=0, and Y=0, representing the error correction comparison code is the formula error code.
See also Fig. 3 and table two, Fig. 3 is the logical circuitry of another preferred embodiment of the present invention, and table two is truth tables of the logical circuitry of another preferred embodiment of Fig. 3 the present invention.
Table two
The value that present embodiment is different from the 3rd bit [2] that an embodiment is the error correction comparison code and nibble [3] is two input ends that input to an anti-or lock 25, output valve S1 anti-or lock 25 is the summation of the 3rd bit [2] with nibble [3] addition, and the output valve S2 of the output valve S1 of and not b gate 17 and anti-or lock 25 is the input ends that export a mutual exclusion or lock 35 to, and the output valve S3 of mutual exclusion or lock 35 exports anti-or lock 31 to.Shown in truth table, the output valve S3 output valve of mutual exclusion or lock 35 is the output valves that are same as the anti-or lock 33 of the mutual exclusion of an embodiment.
This embodiment uses value anti-or lock 25 additions the 3rd bits [2] and nibble [3], the summation of gained is can be opposite with the right value of binary addition gained, be all 1 situation except the value of the 3rd bit [2] and nibble [3], as shown in truth table, when the 3rd bit [2]=0, nibble [3]=0 o'clock, output valve S2 anti-or lock 25 equals 1, and in contrast to the right value 0 of binary addition gained, again when the 3rd bit [2]=0, nibble [3]=1 or three bits [2]=1, nibble [3]=0 o'clock, output valve S2 anti-or lock 25 equals 0, and in contrast to the right value 1 of binary addition gained.
But, because the output valve S1 of and not b gate 17 and the output valve S2 of anti-or lock 25 are the input ends that export mutual exclusion or lock 35 to, because the logic behavior of mutual exclusion or lock 35 is anti-in contrast to the mutual exclusion of a last embodiment or the logic behavior of lock 33, promptly when summation S1 and S2 be during with value, the output valve S3 of mutual exclusion or lock 35 is 0.Because, the value of S2 is opposite with right value, so when summation S1 and S2 are during with value, the output valve S3 of mutual exclusion or lock 35 is 0, when coming down to represent that S1 and S2 are different value, output valve S3 is 0, so shown in the truth table of present embodiment, the output valve S3 of the mutual exclusion of present embodiment or lock 35 is same as the output valve of the anti-or lock 33 of the mutual exclusion of an embodiment.Shown in truth table, as 3 input value C1, S3 transferring to anti-or lock 31, when C2 is all 0, output valve Y anti-or lock 31 is 1, first bit [0] of promptly representing the error correction comparison code to nibble [3] when the addition, carry and sum total do not equal 1, are the formula error code so represent the error correction comparison code.
By two above-mentioned embodiment as can be known, use the designed circuit for detecting of method for detecting of the present invention, only need by easy logical circuit, whether promptly can detect the error correction comparison code fast is the formula error code, whether learn in the data that main frame reads has the data bit mistake and a data bit mistake is only arranged, but in the state bit, learn for main frame, to repair with immediate reaction.
In sum, the method of inspecting fault code in data of the present invention, be when being applied to read the stored data of storage device, whether can simple and easyly detect the data that is read fast wrong, and a data bit mistake is only arranged, this method for detecting mainly is after reading data, and the corresponding data that is read produces the error correction comparison code; Afterwards, the value of each bit of addition error correction comparison code is to obtain additive value; Then, judge whether additive value has carry, when judgement does not have carry, whether the summation of then further judging additive value equals 1, as judge that additive value does not have carry and sum total to equal at 1 o'clock, represent that promptly the error correction comparison code is the formula error code, in the data that representative is read the data bit mistake is arranged, but a data bit mistake is only arranged, by method for detecting of the present invention, fast inspecting fault code in data uses method of the present invention can reduce the quantity that detecing element is set in addition, reduces shared area.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, foundation technical spirit of the present invention is to the described shape of above embodiment, structure, any simple modification that feature and spirit are done, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (13)
1, a kind of method of inspecting fault code in data is characterized in that it may further comprise the steps:
A data that reads a storage device with to one first bug patch code that should data;
Produce one second bug patch code of corresponding this data that is read;
Relatively this first bug patch code and this second bug patch code produce an error correction comparison code, and this error correction comparison code has plural bit;
The value of each bit of this error correction comparison code of addition obtains an additive value;
Judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1;
When the summation of this additive value equals 1, then this data only has a data bit mistake, is the formula error code; And
When the summation of this additive value is not equal to 1, this data no data bit mistake then.
2, the method for inspecting fault code in data according to claim 1, it is characterized in that wherein value at each bit of this error correction comparison code of addition, obtain in the step of an additive value, it is to use complex adder, the value of each bit of this error correction comparison code of addition is to obtain this additive value.
3, the method for inspecting fault code in data according to claim 1 is characterized in that wherein said storage device is a fast flash memory bank.
4, the method for inspecting fault code in data according to claim 3 is characterized in that wherein said fast flash memory bank can be a memory card.
5, a kind of method of inspecting fault code in data is characterized in that it may further comprise the steps:
Read a data, produce an error correction comparison code that should data, this error correction comparison code has plural bit;
The value of each bit of this error correction comparison code of addition obtains an additive value;
Judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1;
When the summation of this additive value equals 1, then this data only has a data bit mistake, is the formula error code; And
When the summation of this additive value is not equal to 1, this data no data bit mistake then.
6, the method for inspecting fault code in data according to claim 5, it is characterized in that wherein value at each bit of this error correction comparison code of addition, obtain in the step of an additive value, it is to use complex adder, the value of each bit of this error correction comparison code of addition is to obtain this additive value.
7, the method for inspecting fault code in data according to claim 5 is characterized in that wherein reading a data, produces the step to an error correction comparison code that should data, is to read this stored data of a storage device.
8, the method for inspecting fault code in data according to claim 7 is characterized in that wherein said storage device is a fast flash memory bank.
9, a kind of method of inspecting fault code in data is characterized in that it may further comprise the steps:
Read a data, produce an error correction comparison code that should data, this error correction comparison code has plural bit;
The value of each bit of this error correction comparison code of addition obtains an additive value; And
Judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1;
When the summation of this additive value equals 1, then this data only has a data bit mistake, is the formula error code;
When the summation of this additive value is not equal to 1, this data no data bit mistake then.
10, the method for inspecting fault code in data according to claim 9, it is characterized in that wherein value at each bit of this error correction comparison code of addition, obtain in the step of an additive value, it is to use complex adder, the value of each bit of this error correction comparison code of addition is to obtain this additive value.
11, the method for inspecting fault code in data according to claim 9 is characterized in that wherein reading a data, produces the step to an error correction comparison code that should data, is to read this stored data of a storage device.
12, the method for inspecting fault code in data according to claim 11 is characterized in that wherein said storage device is to be a fast flash memory bank.
13, a kind of method of inspecting fault code in data, this data have an error correction comparison code that comprises plural bit, and these bits have a bit value respectively, it is characterized in that this method may further comprise the steps:
Each bit value of addition is to obtain an additive value;
Judge whether carry of this additive value, when this additive value no-carry, judge whether the summation of this additive value equals 1;
When the summation of this additive value is not equal to 1, this data no data bit mistake then; And
When the summation of this additive value equals 1, then this data only has a data bit mistake, is the formula error code.
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| CNB2005101080907A CN100428175C (en) | 2005-09-29 | 2005-09-29 | Method for inspecting fault code in data |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4523314A (en) * | 1983-02-07 | 1985-06-11 | Sperry Corporation | Read error occurrence detector for error checking and correcting system |
| US4740968A (en) * | 1986-10-27 | 1988-04-26 | International Business Machines Corporation | ECC circuit failure detector/quick word verifier |
| CN1228855A (en) * | 1996-08-30 | 1999-09-15 | 西门子公司 | Error recognition in storage system |
-
2005
- 2005-09-29 CN CNB2005101080907A patent/CN100428175C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4523314A (en) * | 1983-02-07 | 1985-06-11 | Sperry Corporation | Read error occurrence detector for error checking and correcting system |
| US4740968A (en) * | 1986-10-27 | 1988-04-26 | International Business Machines Corporation | ECC circuit failure detector/quick word verifier |
| CN1228855A (en) * | 1996-08-30 | 1999-09-15 | 西门子公司 | Error recognition in storage system |
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| CN1779648A (en) | 2006-05-31 |
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