CN100426343C - Display device, shift register array and method of driving picture element array - Google Patents
Display device, shift register array and method of driving picture element array Download PDFInfo
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- CN100426343C CN100426343C CNB2006101267373A CN200610126737A CN100426343C CN 100426343 C CN100426343 C CN 100426343C CN B2006101267373 A CNB2006101267373 A CN B2006101267373A CN 200610126737 A CN200610126737 A CN 200610126737A CN 100426343 C CN100426343 C CN 100426343C
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Abstract
A shift register array includes multiple first shift registers, a second shift registers, a first connecting line, a second connection line and a third connection line, in which, a signal output end of each first shift register is crossed with the first and the third connection lines but not electro-connected, the first connection line is connected with a signal input end of the second shift register, the second line is connected with a signal output end of the second register and sets up many electro-connected paths with the third line, when a first register is shattered, related connection points and cross points are cut or connected, so that the second register replaces the worn out one.
Description
Technical field
The present invention is about a kind of display device, shift register array and drive the method for pel array, in more detail, and about display device, shift register array and the method for the shift register of replaceable damage.
Background technology
In recent years, the development of flat-panel screens is more and more rapider, has replaced traditional cathode-ray tube display gradually.Flat-panel screens now mainly contains following several: organic light emitting diode display (Organic Light-Emitting Diodes Display; OLED), plasma display (PlasmaDisplay Panel; PDP), LCD (Liquid Crystal Display; LCD) and Field Emission Display (Field Emission Display; FED) etc.No matter be above-mentioned which kind of flat-panel screens, all must offer the required square-wave signal of sweep trace of pel array with a shift register array, make the flat-panel screens normal operation.
Fig. 1 is the synoptic diagram of known flat-panel screens.This flat-panel screens 1 comprises a pel array 11, a peripheral circuit 13 and a shift register array 15.Pel array 11 comprised the multi-strip scanning line (for convenience of explanation, among the figure only with 111,112 ..., 116 expressions) and data line (for convenience of explanation, among the figure only with 131,132 ..., 136 expressions).Shift register array 15 comprised a plurality of shift registers (for convenience of explanation, among the figure only with 151,152 ..., 156 expressions), in more detail, each shift register is in order to sweep trace of activation.Peripheral circuit 13 be used for driving these data lines 131,132 ..., 136.These shift registers 151,152, ..., 156 all comprise a thin film transistor (TFT) 1511 respectively, 1521, ..., 1561, and link together with series system, except the signal input part 1513 of first order shift register 151 is directly to receive an initial signal 10 and being activated, all the other each grade shift registers 152, ..., 156 signal input part 1523,1533,1543,1553,1563 all receive the signal output part 1515 of previous stage shift register respectively, 1525,1535,1545,1555 square-wave signals of being exported are as enabling signal, these signal output parts 1515,1525,1535,1545,1555,1565 also are connected to sweep trace 111 respectively, 112, ..., 116 in order to drive.Shift register 151,152 ..., 156 receive positive phase clock CK, inversion clock XCK, DC reference voltage V simultaneously
SSBeing used as running uses, and the clock that thin film transistor (TFT) received of the shift register of front and back level must be anti-phase, for example the thin film transistor (TFT) the 1511,1531, the 1551st of the shift register 151,153,155 of odd level receives positive phase clock CK, then the thin film transistor (TFT) 1521,1541,1561 of the shift register 152,154,156 of even level promptly receives inversion clock XCK, what so start signal 10 could the one-level one-levels hands on, sweep trace 111,112 ..., 116 also could be driven in order.
Yet if wherein the one-level shift register damage (shift register 153 as shown in Figure 1) in manufacture process, the sweep trace 113 that it connected just can't be driven, and moreover, even the circuit that can have influence on the shift register after this grade operates.When big or sharpness is higher when panel size, the situation of this damage to yield rate to influence meeting even more serious.Therefore will how to improve the yield rate of making flat-panel screens, and still have remedial measures to overcome the problem of yield rate after certain one-level shift register damage, be the target of the required effort of flat-panel screens manufacturer.
Summary of the invention
A purpose of the present invention is to provide a kind of display device, comprises a pel array and a shift register array.This pel array comprises a plurality of sweep traces.This shift register array comprises a plurality of first shift registers, a positive clock signal connecting line, an inversion clock signal connecting line, one second shift register, one the 3rd shift register, one first connecting line, one second connecting line and one the 3rd connecting line.Each first shift register all comprises a signal input part and a signal output part, and one of them is preset as electric connection this signal output part this a plurality of sweep traces corresponding with it.This positive clock signal connecting line is in order to supply with the positive phase clock of these a plurality of first shift registers, and this inversion clock signal connecting line is in order to supply with these a plurality of first shift register inversion clocks.This second shift register comprises a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, and this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line.The 3rd shift register also comprises a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of the 3rd shift register is electrically connected this inversion clock signal connecting line, and this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line.This first connecting line connects this signal input part of this second shift register and the 3rd shift register, and intersects but default not electric connection with this signal output part of each first shift register.This second connecting line intersects but default not electric connection with this signal output part of this second shift register and the 3rd shift register.The 3rd connecting line and this second connecting line are set up a plurality of paths that are electrically connected of the number that is same as these first shift registers, and intersect with this signal output part of each first shift register but preset not electric connection.
When some first shift registers damage, according to the clock connected mode of first shift register of this damage to determine that this second shift register or the 3rd shift register are one to replace shift register, this signal output part of the previous stage of first shift register of this damage and the point of crossing of this first connecting line change electric connection into, this signal output part of first shift register of this damage and the point of crossing of the 3rd connecting line change electric connection into, one of them changes not electric connection into this signal output part of first shift register of this damage this a plurality of sweep traces corresponding with this, and this signal output part of this replacement shift register and the point of crossing of this second connecting line change electric connection into.
Another object of the present invention is to provide a kind of shift register array that is used to drive a pel array, this pel array comprises a plurality of sweep traces.This shift register array comprises a plurality of first shift registers, a positive clock signal connecting line, an inversion clock signal connecting line, one second shift register, one the 3rd shift register, one first connecting line, one second connecting line and one the 3rd connecting line.Each first shift register all comprises a signal input part and a signal output part, and one of them is preset as electric connection this signal output part this a plurality of sweep traces corresponding with it.This positive clock signal connecting line is in order to supply with the positive phase clock of these a plurality of first shift registers.This inversion clock signal connecting line is in order to supply with these a plurality of first shift register inversion clocks.This second shift register comprises a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, and this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line.The 3rd shift register comprises a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of the 3rd shift register is electrically connected this inversion clock signal connecting line, and this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line.This first connecting line connects this signal input part of this second shift register and the 3rd shift register, and intersects with this signal output part of each first shift register but defaultly electrically be not communicated with.This second connecting line intersects but default not electric connection with this signal output part of this second shift register and the 3rd shift register.The 3rd connecting line and this second connecting line are set up a plurality of paths that are electrically connected of the number that is same as these a plurality of first shift registers, and intersect with this signal output part of each first shift register but preset not electric connection.
When some first shift registers damage, according to the clock connected mode of first shift register of this damage to determine that this second shift register or the 3rd shift register are one to replace shift register, this signal output part of the previous stage of first shift register of this damage and the point of crossing of this first connecting line change electric connection into, this signal output part of first shift register of this damage changes into electrically with the point of crossing of the 3rd connecting line and communicating, one of them changes not electric connection into this signal output part of first shift register of this damage this a plurality of sweep traces corresponding with this, and this signal output part of this replacement shift register and the point of crossing of this second connecting line change electric connection into.
Another object of the present invention is to provide a kind of use one shift register array to drive the method for a pel array, this pel array comprises a plurality of sweep traces, this shift register array comprises a plurality of first shift registers, one second shift register, one the 3rd shift register, an one positive clock signal connecting line and an inversion clock signal connecting line, each first shift register comprises a signal input part and a signal output part, this second shift register and the 3rd shift register comprise a signal input part respectively, one signal output part, one first input end of clock and a second clock input end, one of them is preset as electric connection corresponding with it respectively these a plurality of sweep traces of this signal output part of these a plurality of first shift registers, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line, this first input end of clock of the 3rd shift register is electrically connected this inversion clock signal connecting line, and this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line.
This method comprises the following step: intersect this signal input part of this second shift register and the 3rd shift register to this signal output part of each first shift register, this intersection is preset as not electric connection; Foundation is same as a plurality of electrical connections path of the number of these a plurality of first shift registers, each this signal output part that is electrically connected this second shift register of paths intersect and the 3rd shift register is to one of them this signal output part of these a plurality of first shift registers, and this intersection is preset as not electric connection; And whether one of them damages to judge these a plurality of first shift registers.If then continue to carry out the following step: determine that according to the clock connected mode of first shift register of this damage this second shift register or the 3rd shift register are one to replace shift register; The point of crossing of adjusting this signal input part of this signal output part of previous stage of first shift register of this damage and this replacement shift register is an electric connection; The point of crossing of adjusting this signal output part of this signal output part of first shift register of this damage and this replacement shift register is an electric connection; And this signal output part of first shift register of adjusting this damage this a plurality of sweep traces corresponding with this one of them be electric connection not.
The present invention replaces at the shift register of damaging in the manufacture process via the mode that shift register is replaced in preparation.When making display device, if in shift register array, find to have the shift register of damage, suitable point of crossing and connecting line in the wiring can be adjusted accordingly, make the shift register of replacement can replace the shift register of damage, to reach the target of display device normal operation.
Behind the embodiment of consulting accompanying drawing and describing subsequently, this technical field has knows that usually the knowledgeable just can understand other purposes of the present invention, and technological means of the present invention and embodiment.
Description of drawings
Fig. 1 is the synoptic diagram of known flat-panel screens;
Fig. 2 is the synoptic diagram of the first embodiment of the present invention;
Fig. 3 is the synoptic diagram of the second embodiment of the present invention;
Fig. 4 is the process flow diagram of the third embodiment of the present invention; And
Fig. 5 is the process flow diagram of the fourth embodiment of the present invention.
The main element symbol description
1: flat-panel screens 10: start signal
11: pel array 111,112 ..., 116: sweep trace
13: peripheral circuit 131,132 ..., 136: data line
15: shift register array 151,152 ..., 156: shift register
1511,1521 ..., 1561: the thin film transistor (TFT) of shift register
1513,1523 ..., 1563: the signal input part of shift register
1515,1525 ..., 1565: the signal output part of shift register
2: flat display apparatus 20: start signal
21: pel array 211,212 ..., 216: sweep trace
23: peripheral circuit 231,232 ..., 236: data line
25: shift register array 251,252 ..., 256: shift register
2511,2521 ..., 2561: the thin film transistor (TFT) of shift register
2513,2523 ..., 2563: the signal input part of shift register
2515,2525 ..., 2565: the signal output part of shift register
27: the second shift registers
The thin film transistor (TFT) of 271: the second shift registers
The signal input part of 273: the second shift registers
The signal output part of 275: the second shift registers
First input end of clock of 277: the second shift registers
The second clock input end of 279: the second shift registers
29: be electrically connected path 29a: first connecting line
29b: the second connecting line 29c: the 3rd connecting line
29d: positive phase clock connecting line 29e: inversion clock connecting line
3: 31: the second shift registers of flat display apparatus
The thin film transistor (TFT) of 311: the second shift registers
The signal input part of 313: the second shift registers
The signal output part of 315: the second shift registers
First input end of clock of 317: the second shift registers
The second clock input end of 319: the second shift registers
33: the three shift registers
The thin film transistor (TFT) of 331: the three shift registers
The signal input part of 333: the three shift registers
The signal output part of 335: the three shift registers
First input end of clock of 337: the three shift registers
The second clock input end of 339: the three shift registers
V
SS: DC reference voltage CK: positive phase clock
XCK: inversion clock C1, C2, C3, C4: cut-out point
F1, F2 ..., F7: the welding point
Embodiment
Herein " intersect (cross) but not electric connection " of indication be defined as two electric wires or two-end-point " though contact " but electric current can't by or can't the common-battery pressure, and " contact " is not limited to direct overlapping the touching of two electric wires or two-end-point, anyly make it also touch the scope that belongs to " contact " indirectly with intermediary, for example touch two electric wires respectively with the two ends of another electric wire, this two electric wire also meets " contact " of indication herein.
The first embodiment of the present invention as shown in Figure 2, be a kind of flat display apparatus 2, it comprises a pel array 21, a peripheral circuit 23, a shift register array 25, one second shift register 27, one first connecting line 29a, one second connecting line 29b, one the 3rd connecting line 29c, a positive phase clock connecting line 29d, an inversion clock connecting line 29e and a power supply supply lines in order to V to be provided
SS Voltage.Pel array 21 comprised the multi-strip scanning line (for convenience of explanation, herein only with 211,212 ..., 216 expressions) and data line (for convenience of explanation, among the figure only with 231,232 ..., 236 expressions).Shift register array 25 comprised a plurality of first shift registers (for convenience of explanation, among the figure only with 251,252 ..., 256 expressions).Peripheral circuit 23 be used for driving these data lines 231,232 ..., 236.These first shift registers 251,252 ..., 256 be the sweep trace 211,212 that is used for driving its corresponding connection ..., 216, and comprise respectively a thin film transistor (TFT) 2511,2521 ..., 2561.These first shift registers 251,252 ..., 256 link together with series system, except the signal input part 2513 of first order shift register 251 is to receive an initial pulse 20 and being activated, all the other each grade shift registers 252,253 ..., 256 signal input part 2523,2533 ..., 2563 signal output parts 2515,2525 that all receive the previous stage shift register ..., 2555 square-wave signals of being exported are as enabling signal.First shift register 251,252 ..., 256 also receive the usefulness that positive phase clock CK and inversion clock XCK are used as operating via positive phase clock connecting line 29d and inversion clock connecting line 29e.And the positive phase clock CK that thin film transistor (TFT) received and the inversion clock XCK of the shift register of front and back level must be anti-phase.In the present embodiment, the thin film transistor (TFT) the 2511,2531, the 2551st of first shift register 251,253,255 of odd level receives positive phase clock CK, and the thin film transistor (TFT) 2521,2541,2561 of first shift register 252,254,256 of even level receives inversion clock XCK.
In this embodiment, second shift register 27 and first shift register 251,252 ..., 256 structure is identical, so do not give unnecessary details.The signal input part 273 of second shift register 27 is connected with the first connecting line 29a, and each first shift register 251,252 ..., 256 signal output part 2515,2525 ..., 2565 be to intersect with the first connecting line 29a but electric connection not.The signal output part 275 of second shift register 27 is connected with the second connecting line 29b.The 3rd connecting line 29c then sets up a plurality of paths 29 that are electrically connected with the second connecting line 29b, in more detail, each first shift register 251,252 ..., 256 corresponding at least one be electrically connected paths 29, and each first shift register 251,252 ..., 256 signal output part 2515,2525 ..., 2565 be electrically connected that path 29 intersects but electric connection not with corresponding.Second shift register 27 comprises one first input end of clock 277 and a second clock input end 279, second clock input end 279 is in order to control TFT 271, and first input end of clock 277 is in order to control the running of second shift register, 27 other parts, generally speaking, the clock signal accepted of first input end of clock 277 and second clock input end 279 is anti-phase.Positive phase clock connecting line 29d and inversion clock connecting line 29e intersect with first input end of clock 277 and second clock input end 279 respectively but electric connection not.
When some first shift registers damage (being assumed to be shift register 254), the signal input part 2543 of shift register 254 cuts off with laser beam with the binding of the signal output part 2535 of previous stage shift register 253, shown in " C1 " among the figure, and the binding of signal output part 2545 sweep traces 214 corresponding with it of shift register 254 cut off with laser beam, shown in " C2 " among the figure, then the 3rd connecting line 29c is electrically connected or is welded together with the point of crossing of the signal output part 2545 of shift register 254, shown in " F1 " among the figure, again the first connecting line 29a is electrically connected or is welded together with the point of crossing of the signal output part 2535 of previous stage shift register 253, shown in " F2 " among the figure, last then be the clock connecting line that clock signal that the thin film transistor (TFT) 2541 in response to shift register 254 is received decides the thin film transistor (TFT) 271 of second shift register 27 to connect.In more detail, because thin film transistor (TFT) 2541 receives inversion clock XCK, therefore the point of crossing of second clock input end 279 with inversion clock connecting line 29e is electrically connected or is welded together, shown in " F3 " among the figure, and the point of crossing of first input end of clock 277 with positive phase clock connecting line 29d be electrically connected or be welded together, shown in " F4 " among the figure.So the shift register 254 of damage can be substituted with second shift register 27.
In the present embodiment, be to cooperate a plurality of first shift registers, to avoid the waste in space with one second shift register.Usually cooperate one second shift register with 50 to 100 first shift registers, common 50,60,70,80,90 or 100 first shift registers that have cooperate one second shift register.Yet, be familiar with first shift register that this operator can use any number and cooperate one second shift register to reach purpose of the present invention.
The second embodiment of the present invention also is a kind of flat display apparatus 3 as shown in Figure 3, and its structure is similar with first embodiment haply.Different is that second embodiment comprises two standby shift registers: second shift register 31 and the 3rd shift register 33.Second shift register 31 is in order to first shift register 251,253,255 of replacement odd level, and the 3rd shift register 33 is in order to replace first shift register 252,254,256 of even level.
The signal input part 313,333 of second and third shift register 31,33 is connected with the first connecting line 29a, the signal output part 315,335 of second and third shift register 31,33 intersects with the second connecting line 29b but electric connection not, inversion clock connecting line 29e is connected with first input end of clock 317 of second shift register 31 and the second clock input end 339 of the 3rd shift register 33, and positive phase clock connecting line 29d is connected with the second clock input end 319 of second shift register 31 and first input end of clock 337 of the 3rd shift register 33.It is identical with first embodiment that all the other connect the pass, so do not give unnecessary details.
When first shift register 251,252 ..., 256 one of them when damaging, second embodiment according to the clock connected mode of first shift register of this damage to determine second shift register 31 or the 3rd shift register 33 shift register as an alternative.For example, when shift register 253 damaged, because shift register 253 be the odd level shift register, its clock connected mode was identical with second shift register 31, so just by second shift register 31 shift register as an alternative.Signal input part 2533 with shift register 253 cuts off with laser beam with the binding of the signal output part 2525 of previous stage shift register 252 earlier, shown in " C3 " among the figure, and the binding of signal output part 2535 sweep traces 213 corresponding with it of shift register 253 cut off with laser beam, shown in " C4 " among the figure, then the 3rd connecting line 29c is electrically connected or is welded together with the point of crossing of the signal output part 2535 of shift register 253, shown in " F5 " among the figure, again the first connecting line 29a is electrically connected or is welded together with the point of crossing of the signal output part 2525 of previous stage shift register 252, shown in " F6 " among the figure, at last the second connecting line 29b is electrically connected or is welded together with the point of crossing of the signal output part 315 of second shift register 31, shown in " F7 " among the figure.So the shift register 253 of damage can be replaced with second shift register 31 and operate.
If the even level shift register damages, for example shift register 252, then by the 3rd shift register 33 shift register as an alternative.
In a second embodiment, be to cooperate a plurality of first shift registers, to avoid the waste in space with one second shift register and one the 3rd shift register.Usually cooperate one second shift register and one the 3rd shift register with 50 to 100 first shift registers, common 50,60,70,80,90 or 100 first shift registers that have cooperate one second shift register and one the 3rd shift register.Yet, be familiar with first shift register that this operator can use any number and cooperate one second shift register and one the 3rd shift register to reach purpose of the present invention.
The third embodiment of the present invention as shown in Figure 4, for a kind of shift register array that in display device, uses to drive the method for a pel array, this display device can be the display device 2 among first embodiment.This method is described as follows.
During execution in step 401, intersect the signal input part of second shift register and the signal output part of each first shift register, this intersection is preset as not electric connection.Follow execution in step 403, foundation is same as a plurality of electrical connections path of the number of first shift register, each is electrically connected one of them signal output part of the signal output part of paths intersect second shift register and first shift register, and this intersection also is preset as not electric connection.Then execution in step 405 is intersected first input end of clock and the second clock input end of positive clock signal connecting line and inversion clock signal connecting line to the second shift register respectively, and this clock intersection is preset as not electric connection.Follow execution in step 407, whether one of them damages to judge first shift register.If then execution in step 409, the point of crossing of the signal output part of the previous stage of first shift register that adjustment damages and the signal input part of second shift register is an electric connection.Follow execution in step 411, the point of crossing of the signal output part of first shift register that adjustment damages and the signal output part of second shift register is an electric connection.Then execution in step 413 is adjusted the signal output part of first shift register that damages and corresponding sweep trace and is electric connection not.At last, execution in step 415, adjusting aforesaid clock point of crossing according to the clock connected mode of first shift register that damages is electric connection.Damage if judge no any first shift register when step 407, then execution in step 417, jump out this flow process.
Except the shown step of Fig. 4, the 3rd embodiment also can carry out all starts of first embodiment, and this technical field has knows that usually the knowledgeable can understand the corresponding step of the 3rd embodiment, so repeat no more via the explanation of first embodiment.
The fourth embodiment of the present invention as shown in Figure 5, for another kind uses a shift register array to drive the method for a pel array in display device, this display device can be the display device 3 among second embodiment.This method is described as follows.
When execution in step 501, intersect the signal input part of second shift register and the 3rd shift register to the signal output part of each first shift register, this intersection is preset as not electric connection.Follow execution in step 503, foundation is same as a plurality of electrical connections path of the number of first shift register, each is electrically connected one of them the signal output part of signal output part to the first shift register of paths intersect second shift register and the 3rd shift register, and this intersection is preset as not electric connection.Follow execution in step 505, whether one of them damages to judge first shift register.If then execution in step 507, determine that according to the clock connected mode of first shift register that damages second shift register or the 3rd shift register are one to replace shift register.Execution in step 509 afterwards, and the signal output part of the previous stage of first shift register that adjustment damages is an electric connection with the point of crossing of the signal input part of replacing shift register.Follow execution in step 511, the signal output part of first shift register that adjustment damages is an electric connection with the point of crossing of the signal output part of replacing shift register.Last execution in step 513 is adjusted the signal output part of first shift register that damages and corresponding sweep trace and is electric connection not.Damage if judge no any first shift register when step 505, then execution in step 515, jump out this flow process.
Except the shown step of Fig. 5, the 4th embodiment also can carry out all starts of second embodiment, and this technical field has knows that usually the knowledgeable can understand the corresponding step of the 4th embodiment, so repeat no more via the explanation of second embodiment.
The present invention does not limit the kind of pel array, and the pel array of aforementioned each embodiment can be the light emitting array of organic LED array, liquid crystal array or other types.
From the above, the present invention is via utilizing standby shift register to replace at the shift register of damaging in the flat display apparatus manufacture process, standby shift register is when making flat display apparatus, can set in advance by the normal shift register that uses, and be routed to the shift register and the pel array of normal use, when finding the shift register damage is arranged, can make its electric connection or be not communicated with at suitable point of crossing and connecting line, and then reach and allow the target of display device normal operation.
Though the present invention with preferred embodiment openly as above; right its is not that any those skilled in the art are under the situation that does not break away from the spirit and scope of the present invention in order to qualification the present invention; can change and modification, so protection scope of the present invention is as the criterion with the claim institute restricted portion that is proposed.
Claims (5)
1. display device comprises:
One pel array comprises a plurality of sweep traces; And
One shift register array comprises:
A plurality of first shift registers, each first shift register comprises a signal input part and a signal output part, and one of them is preset as electric connection this signal output part this a plurality of sweep traces corresponding with it;
One positive clock signal connecting line is in order to supply with the positive phase clock of these a plurality of first shift registers;
One inversion clock signal connecting line is in order to supply with these a plurality of first shift register inversion clocks;
One second shift register, comprise a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, and this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line;
One the 3rd shift register, comprise a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of the 3rd shift register is electrically connected this inversion clock signal connecting line, and this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line;
One first connecting line connects this signal input part of this second shift register and the 3rd shift register, and intersects but default not electric connection with this signal output part of each first shift register;
One second connecting line intersects but default not electric connection with this signal output part of this second shift register and the 3rd shift register; And
One the 3rd connecting line is set up a plurality of paths that are electrically connected of the number that is same as these a plurality of first shift registers with this second connecting line, and intersects with this signal output part of each first shift register but preset not electric connection;
Wherein, when one of them damages when these a plurality of first shift registers, according to the clock connected mode of first shift register of this damage to determine that this second shift register or the 3rd shift register are one to replace shift register, this signal output part of the previous stage of first shift register of this damage and the point of crossing of this first connecting line change electric connection into, this signal output part of first shift register of this damage and the point of crossing of the 3rd connecting line change electric connection into, one of them changes not electric connection into this signal output part of first shift register of this damage this a plurality of sweep traces corresponding with this, and this signal output part of this replacement shift register and the point of crossing of this second connecting line change electric connection into.
2. display device as claimed in claim 1, wherein this pel array is organic LED array or liquid crystal array.
3. shift register array that is used to drive a pel array, this pel array comprises a plurality of sweep traces, and this shift register array comprises:
A plurality of first shift registers, each first shift register comprises a signal input part and a signal output part, and one of them is preset as electric connection this signal output part this a plurality of sweep traces corresponding with it;
One positive clock signal connecting line is in order to supply with the positive phase clock of these a plurality of first shift registers;
One inversion clock signal connecting line is in order to supply with these a plurality of first shift register inversion clocks;
One second shift register, comprise a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, and this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line;
One the 3rd shift register, comprise a signal input part, a signal output part, one first input end of clock and a second clock input end, this first input end of clock of the 3rd shift register electrically connects this inversion clock signal connecting line, and this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line;
One first connecting line connects this signal input part of this second shift register and the 3rd shift register, and intersects but default not electric connection with this signal output part of each first shift register;
One second connecting line intersects but default not electric connection with this signal output part of this second shift register and the 3rd shift register; And
One the 3rd connecting line is set up a plurality of paths that are electrically connected of the number that is same as these a plurality of first shift registers with this second connecting line, and intersects with this signal output part of each first shift register but preset not electric connection;
Wherein, when one of them damages when these a plurality of first shift registers, according to the clock connected mode of first shift register of this damage to determine that this second shift register or the 3rd shift register are one to replace shift register, this signal output part of the previous stage of first shift register of this damage and the point of crossing of this first connecting line change electric connection into, this signal output part of first shift register of this damage and the point of crossing of the 3rd connecting line change electric connection into, one of them changes not electric connection into this signal output part of first shift register of this damage this a plurality of sweep traces corresponding with this, and this signal output part of this replacement shift register and the point of crossing of this second connecting line change electric connection into.
4. shift register array as claimed in claim 3, wherein this pel array is organic LED array or liquid crystal array.
5. one kind is used a shift register array to drive the method for a pel array, this pel array comprises a plurality of sweep traces, this shift register array comprises a plurality of first shift registers, one second shift register, one the 3rd shift register, an one positive clock signal connecting line and an inversion clock signal connecting line, each first shift register comprises a signal input part and a signal output part, this second shift register and the 3rd shift register comprise a signal input part respectively, one signal output part, one first input end of clock and a second clock input end, one of them is preset as electric connection corresponding with it respectively these a plurality of sweep traces of this signal output part of these a plurality of first shift registers, this first input end of clock of this second shift register is electrically connected this positive clock signal connecting line, this second clock input end of this second shift register is electrically connected this inversion clock signal connecting line, this first input end of clock of the 3rd shift register is electrically connected this inversion clock signal connecting line, this second clock input end of the 3rd shift register is electrically connected this positive clock signal connecting line, and this method comprises the following step:
Intersect this signal input part of this second shift register and the 3rd shift register to this signal output part of each first shift register, and this intersection is preset as not electric connection;
Foundation is same as a plurality of electrical connections path of the number of these a plurality of first shift registers, each this signal output part that is electrically connected this second shift register of paths intersect and the 3rd shift register is to one of them this signal output part of these a plurality of first shift registers, and this intersection is preset as not electric connection; And
Whether one of them damages to judge these a plurality of first shift registers, if then carry out the following step:
Determine that according to the clock connected mode of first shift register of this damage this second shift register or the 3rd shift register are one to replace shift register;
The point of crossing of adjusting this signal input part of this signal output part of previous stage of first shift register of this damage and this replacement shift register is an electric connection;
The point of crossing of adjusting this signal output part of this signal output part of first shift register of this damage and this replacement shift register is an electric connection; And
One of them is electric connection not to adjust this signal output part of first shift register of this damage these a plurality of sweep traces corresponding with this.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006101267373A CN100426343C (en) | 2006-09-06 | 2006-09-06 | Display device, shift register array and method of driving picture element array |
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| CNB2006101267373A CN100426343C (en) | 2006-09-06 | 2006-09-06 | Display device, shift register array and method of driving picture element array |
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| CN1912966A CN1912966A (en) | 2007-02-14 |
| CN100426343C true CN100426343C (en) | 2008-10-15 |
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| CNB2006101267373A Active CN100426343C (en) | 2006-09-06 | 2006-09-06 | Display device, shift register array and method of driving picture element array |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI400514B (en) | 2009-01-08 | 2013-07-01 | Au Optronics Corp | Display panel |
| CN108877683A (en) * | 2018-07-25 | 2018-11-23 | 京东方科技集团股份有限公司 | Gate driving circuit and driving method, display device, manufacturing method of array base plate |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01125951A (en) * | 1987-11-11 | 1989-05-18 | Hitachi Ltd | Transistor circuit device |
| US5111060A (en) * | 1989-09-13 | 1992-05-05 | Nec Corporation | Electronic circuit equipped with redundant or spare circuit elements for every circuit element |
| EP0601650A1 (en) * | 1992-12-10 | 1994-06-15 | Koninklijke Philips Electronics N.V. | Repairable matrix display |
-
2006
- 2006-09-06 CN CNB2006101267373A patent/CN100426343C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01125951A (en) * | 1987-11-11 | 1989-05-18 | Hitachi Ltd | Transistor circuit device |
| US5111060A (en) * | 1989-09-13 | 1992-05-05 | Nec Corporation | Electronic circuit equipped with redundant or spare circuit elements for every circuit element |
| EP0601650A1 (en) * | 1992-12-10 | 1994-06-15 | Koninklijke Philips Electronics N.V. | Repairable matrix display |
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| CN1912966A (en) | 2007-02-14 |
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