CN100397869C - TV set EEPROM on-line write method - Google Patents
TV set EEPROM on-line write method Download PDFInfo
- Publication number
- CN100397869C CN100397869C CNB2005101045123A CN200510104512A CN100397869C CN 100397869 C CN100397869 C CN 100397869C CN B2005101045123 A CNB2005101045123 A CN B2005101045123A CN 200510104512 A CN200510104512 A CN 200510104512A CN 100397869 C CN100397869 C CN 100397869C
- Authority
- CN
- China
- Prior art keywords
- write
- eeprom
- present
- mov
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 claims abstract description 21
- 238000001514 detection method Methods 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 7
- 238000012856 packing Methods 0.000 description 5
- 230000004044 response Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 101150044561 SEND1 gene Proteins 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- PBGKNXWGYQPUJK-UHFFFAOYSA-N 4-chloro-2-nitroaniline Chemical compound NC1=CC=C(Cl)C=C1[N+]([O-])=O PBGKNXWGYQPUJK-UHFFFAOYSA-N 0.000 description 1
- 241001269238 Data Species 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Images
Landscapes
- Read Only Memory (AREA)
Abstract
The present invention relates to an on-line writing method for a TV EEPROM, which comprises the following procedures: (1) an on-line writing circuit is built; (2) EEPROM chips carry out prewriting operation successively by an HDMI, a DVI and a special port; whether the chips required to write exist is judged according to that whether the operation succeeds; if the chips exist, the present invention enters the procedure (5); if the chips do not exist, the present invention enters a next port for prewriting operation or returns to the procedure (2); (5) the present invention uses different address spaces to judge the volumetric capacity ranges of the chips; the specific volumetric capacities of the chips are judged by a prewriting method; if the volumetric capacities are enough, the present invention invokes the writing chips of the relevant procedure; if the volumetric capacities are not enough, the present invention is displayed. The present invention can carry out on-line writing for the EEPROM by an I2C, has no need of opening a package in advance for writing the procedures, and is packed again. The present invention simultaneously writes the procedures when used for detection, has the advantages of simple production process, high production efficiency and low production cost, and can be widely applied to writing the EEPROMs of various plate TV sets.
Description
Technical field
The invention belongs to technical field of television sets, more particularly relate to the design of the online wiring method of TV set EEPROM.
Background technology
Development along with TV tech, display device develops to the plane Display Technique from original C RT, television set has been a comprehensive display device from the single functional shift that televiews also, and the interface of corresponding TV also develops into the satisfied different interfaces that require such as VGA, DVI, HDMI from original only video interface.Different interfaces just has different requirements, all requires to provide an identifying information to main frame such as interfaces such as VGA, DVI, HDMI, is convenient to main frame identification, selects a kind of display mode of the best then.Simultaneously, various copyright protection technologies have also proposed new requirement to TV.Such as up-to-date HDCP agreement, different identifying informations is arranged with regard to requiring different television sets.Therefore, in the production of television set, must increase writing of identifying information.Traditional mode of production all is before the TV production, writes data by the write device unification, and the identifying information of same like this batch TV is identical, can not satisfy I
2C bus EEPROM writes requirement.
Along with the progressively popularization of panel TV, the software of television set also becomes increasingly complex.Many I are arranged in the production
2The EEPROM of C needs write-in program.Traditional technical process all is to write before paster.This will open packing chip earlier, behind the write-in program, repack and just can carry out paster.This technological process has increased operation, has reduced production efficiency, has improved production cost simultaneously inevitably.
Summary of the invention
Purpose of the present invention just is to overcome above-mentioned shortcoming and defect, and a kind of online wiring method of TV set EEPROM is provided.It utilizes the original DVI of television set, HDMI or special interface, can pass through I to the eeprom chip on the circuit board
2The C agreement is online to be write.Simultaneously, do not need to open in advance to repack again after the packing, write-in program of eeprom chip, but directly paster, online writing then earlier.That is when detecting write-in program simultaneously, simplified production technology, improved production efficiency, reduced production cost.
In order to achieve the above object, the present invention includes following steps:
(1) on production line, make up the control write-in program the MCU master controller, with the HDMI of MCU master controller interconnection and DVI and special purpose interface and RS232 interface, with the internal storage space of MCU master controller interconnection, and power to the MCU master controller with power supply;
(2) by MCU control, the eeprom chip on the line is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port HDMI;
(3) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port DVI by MCU control;
(4) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write according to operation by special purpose interface by MCU control, if exist then enter following step (5), if there is no then return step (2);
(5) adopt different address spaces to judge the range of capacity of eeprom chip;
(6) pass through the particular capacity that pre-wiring method is judged eeprom chip again;
(7) if particular capacity enough then call corresponding write-in program and write eeprom chip, if particular capacity is inadequately then the capacity of display is not enough.
Internal storage space can be divided into one to four part.
Main technical points is when judging whether a certain port exists chip in the software of the present invention, by writing technology in advance chip is carried out pre-write operation, whether successfully judges whether there is the chip that need write by decision operation.In the judgement of chip capacity, also adopted corresponding techniques, at first judged the range of capacity of chip, and then judged the particular capacity of chip by the way that writes in advance by the way that adopts different address spaces.
The control operation that the MCU master controller is used to write.Utilize the data channel of HDMI, DVI, DVI interface and other special purpose interface, can operate the display interior data according to the mode of main frame, and the conversion between the realization various interface.Internal storage space is used for the storage of pre-write-in program and data.Dispose different internal storage spaces, just can the EEPROM of different capabilities and kind be write.
If the data that write in producing all are identical, need reading in correct data before the work for the first time, that is these data are being kept in the internal storage space.When writing eeprom chip in advance,, just can write the data of reading in the internal storage space among the EEPROM of TV set circuit plate by the simple operations of MCU master controller.
The RS232 interface and the microcomputer of standard carry out communication, can carry out without any the writing of the data of rule, as long as write fashionable by the microcomputer reading of data at every turn.Also can off line use, data are calculated, write then, can guarantee that each machine has unique data according to certain requirement.The present invention is integrated on television set interface commonly used: VGA, DVI, HDMI, make full use of the inner all data channel of these interfaces, according to the mode of main frame the display interior data are operated, and can be implemented between the various interface and change.The present invention simultaneously supports the data of different capabilities to write: 1K, 2K, 4K, 8K, 16K, 32K etc.
Task of the present invention comes to this and finishes.
Write device of the present invention can solve the work that writes of all online datas substantially.And do not need to open in advance packing chip and then packing, and can directly use new chip to produce, in test, data are carried out online writing then.It had both solved the identical problem of same batch products data, had simplified production technology again, had improved production efficiency, had reduced production cost.It can be widely used in the online of various panel TV set EEPROM and write.The main characteristic of the present invention is to utilize to write technology and address space way of combining in advance, has improved intelligent level to greatest extent.
Description of drawings
Fig. 1 is a hardware configuration theory diagram of the present invention.
Fig. 2 is a program flow diagram of the present invention.
Embodiment
Embodiment 1.A kind of online wiring method of TV set EEPROM is as Fig. 1~shown in Figure 2.It may further comprise the steps:
(1) on production line, make up the control write-in program the MCU master controller, with the HDMI of MCU master controller interconnection and DVI and special purpose interface and RS232 interface, with the internal storage space of MCU master controller interconnection, and power to the MCU master controller with power supply;
(2) by MCU control, the eeprom chip on the line is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port HDMI;
(3) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port DVI by MCU control;
(4) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write according to operation by special purpose interface by MCU control, if exist then enter following step (5), if there is no then return step (2);
(5) adopt different address spaces to judge the range of capacity of eeprom chip;
(6) pass through the particular capacity that pre-wiring method is judged eeprom chip again;
(7) if particular capacity enough then call corresponding write-in program and write eeprom chip, if particular capacity is inadequately then the capacity of display is not enough.
Internal storage space is divided into one to four part.
The initialized source code of present embodiment is as follows:
ORG 0000H
LJMP INIT_SYS
ORG 0003H
LJMP INT0_INT ;INT0?DISABLE
NOP
NOP
LJMP SOFT_TRAP
ORG 000BH
RETI
ORG 0013H
LJMP INT1_INT ;INT0?DISABLE
NOP
NOP
LJMP SOFT_TRAP
ORG 001BH
RETI
ORG 0023H
RETI
NOP
ORG 002BH
RETI
NOP
ORG 0030H
LJMP INIT_SYS
MOV IE,#00
MOV PSW,#00
MOV SP,#SP_ADDR ;0D8H
ANL PCON,#00
CLR LED_RED
CLR LED_GRN
SETB BEL_ON
MOV IE,#0B5H
CALL RED
MOV R7,#50
CALL DLY_MS
Carrying out pre-write operation by port HDMI judges whether to exist the source code that need write chip as follows:
CALL CHECK4C02HDMI; The HDMI interface chip reads in advance
JB F0,MAIN_LOOP
SETB HDMI
Carrying out pre-write operation by port DVI judges whether to exist the source code that need write chip as follows:
CALL CHECK4C21DVI; The DVI interface chip reads in advance
JB F0,MAIN_LOOP
SETB DVI
Carrying out pre-write operation by private port judges whether to exist the source code that need write chip as follows:
CALL CHECK4C64; The special purpose interface chip reads in advance
JB F0,MAIN_LOOP
SETB MOTH
The source code that writes chip is as follows:
SNDDAT02HDMI:
CALL START; Send the iic bus initial conditions
MOV A, SLVADR02HDMI; Get controlled device bus address
CALL SENDBYTE; Send controlled device address
JB F0, SENDRETURN; Make mistakes and return
MOV A, SUBADR02HDMI; Get the element address
CALL SENDBYTE; The transmitting element address
JB F0, SENDRETURN; Make mistakes and return
MOV R0, #PXMTDAT; Get the first location of transmission buffer
SEND_NEXT:
MOV A , @R0; Get the first location of transmission buffer content
CALL SENDBYTE; Send first location content (byte)
JB F0, SENDRETURN; Make mistakes and return
INC R0; Point to next byte
DJNZ BYTECNT, SEND_NEXT; Judge whether to send and finish, as
Fruit does not continue to send
CALL STOP; Send the iic bus initial conditions
DALAY10:; Delay procedure 10ms
MOV R7,#30H
D1:
MOV R6,#34H
D2:
DJNZ R6,D2
DJNZ R7,D1
SENDRETURN:; Return main program
RET
;***********************************************************
Send the byte program module
;************************************************************
SENDBYTE:
MOV BITCNT, #08H; The data length that transmits is 8
SENDBIT: ;
RLC A; The data that send move to left, and send the position and send C
JC SEND1; Sending the position is that data bit 1 is sent in 1 forwarding
CLR SDA; Send data bit 0
SJMP SEND ;
SEND1: ;
SETB SDA; Send data bit 1
NOP ;
SEND: ;
NOP ;
SETB SCL; Put clock line for high, notify controlled device to begin
Receive and send data bit
NOP; Guarantee that the clock cycle is greater than 4us
NOP ;
NOP
NOP
NOP ;
CLR SCL; Vise bus and prepare to receive next data
DJNZ BITCNT, SENDBIT; Judge a byte data everybody whether
Transmission finishes, and does not continue to send
NOP ;
NOP ;
SETB SDA; 8 bit data send and finish, and discharge data wire,
Prepare to receive response bits
NOP ;
NOP ;
SETB SCL; Begin to receive response bits
NOP ;
NOP ;
CLR F0; Send the data error flag in advance clearly
JNB SDA, ACKEND; Judge whether to receive response bits, normal
Change ACKEND
SETB F0; Do not receive and reply, putting the error flag position is 1
ACKEND:
NOP
CLR SCL; Send and finish to vise bus, prepare next step
Send or receive data or carry out other processing
RET
;***********************************************************
Receive the data program module
;*********************************************************
RCVDATA02HDMI:
CALL START; Start iic bus
MOV A, SLVADR02HDMI; Get controlled device address
CALL SENDBYTE; Send controlled device address
JB F0, RCVRETURN; Make mistakes and return
MOV A, SUBADR02HDMI; Get the element address
CALL SENDBYTE; The transmitting element address
JB F0, RCVRETURN; Make mistakes and return
CALL START; Send out the repeated priming signal
MOV A, SLVADR02HDMI; Get controlled device address
SETB ACC.0; Putting controlled device is reading mode
CALL SENDBYTE; Send controlled device address
JB F0, RCVRETURN; Make mistakes and return
CLR ACKIC; The non-answer logo of clear reception,
Prepare to receive data
MOV R0, #PRCV02HDMI; Get the first location of reception buffer
DJNZ BYTECNT, RCVNEXT; If also do not receive
Data then change receive before BYTECNT-1 data
SJMP RCVLAST; Receive last data
RCVNEXT:
CALL RCVBYTE; Receive a byte data
MOV @R0, A; With the data that receive
Be stored in the reception buffer
INC R0; Point to and receive the buffering area next address
DJNZ BYTECNT, RCVNEXT; Do not receive and continue to receive
RCVLAST:
SETB ACKIC; Set receives non-replying
Sign, the answer logo of preparing after receiving last byte, to send out non-
CALL RCVBYTE; Receive last byte
MOV @R0,A
CALL STOP; Stop iic bus
RCVRETURN:
RET; Subprogram is returned
;********************************************************
Receive the byte program module
;************************************************************
RCVBYTE:
SETB SDA; Put data wire and be input side
Formula promptly discharges bus
MOV BITCNT, #08H; The data bit length that transmits is 8
RCV:
NOP
CLR SCL; Putting clock line is the low level standard
Receive data fully
NOP
NOP
NOP
NOP
NOP
SETB SCL; Putting clock line is that high level makes
Data on the data wire are effective
NOP
NOP
CLR C; Clear in advance CY=0, preparing will
The data that receive are put into ACC
JNB SDA, RCV0; Read data bit is if 0 is put
C=0 also changes the RCV0 data with clock information
SETB C; If 1 is put C=1
RCV0:
RLC A; The data bit that receives is put into ACC
NOP
NOP
DJNZ BITCNT, RCV; Do not receive for 8 and continue to receive
CLR SCL; Receive for 8 and put clock and number
Reply or non-answer signal for low being ready for sending according to line
NOP
NOP
NOP
CLR SDA
JNB ACKIC, SENDACKB; Need to judge whether to continue
Receive data, send acknowledgement number if need then change SENDACKB
SETB SDA; Send non-answer signal
SENDACKB:
NOP
NOP
SETB SCL; Putting clock line is that height is that response bits is effective
NOP
NOP
NOP
NOP
NOP
CLR SCL; Clear clock line vises iic bus
So that continue to receive data or send stop condition
CLR ACKIC; The non-answer logo of clear reception
RET
;============READ?ALL?DATA?FROM?24C21=================
ALL4C21HDMI:
MOV R10,#40H
MOV R8,#0H ;ADDRESS?OF?THE
DATA?TO?READ
RDAHDMI: ;NUMBER?OF?ONE?TIME
BY?READED
MOV BYTECNT,#2H
MOV A,#C21ADR
MOV SLVADR21,A
MOV A,R8
MOV SUBADR21,A ;SEND?THE?ADDRESS?OF?BYTE
CALL RCVDATA02HDMI
MOV A,@R0
MOV R3,A
DEC R0
MOV A,@R0
MOV R2,A
MOV A,#2H
ADD A,R8
MOV R8,A ;READ?NEXT?4?BYTE
DJNZ R10,RDAHDMI ;READ?TOTAL?OF?THE?DATA
NOP
RET
;SJMP RBYTE
;=============END?OF?READ?ALL?DATA?FROM?24C02
CHECK4C02HDMI:
MOV R12,#20H
MOV R8,#0H ;ADDRESS?OF?THE
DATA?TO?READ
MOV BYTECNT,#8H
MOV A,#C02ADR
MOV SLVADR02HDMI,A
MOV A,R8
MOV SUBADR02HDMI,A ;SEND?THE
ADDRESS?OF?BYTE
CALL RCVDATA02HDMI
RET
;=============READ?ALL?DATA?FROM?24C02===================
RD4C02HDMI:
MOV R12,#20H
MOV R8,#0H ;ADDRESS?OF?THE
DATA?TO?READ
RDALL: ;NUMBER?OF
ONE?TIME?BY?READED
MOV BYTECNT,#8H
MOV A,#C02ADR
MOV SLVADR02HDMI,A
MOV A,R8
MOV SUBADR02HDMI,A ;SEND?THE
ADDRESS?OF?BYTE
CALL RCVDATA02HDMI
MOV A,#8H
ADD A,R8
MOV R8,A ;READ?NEXT?4?BYTE
DJNZ R12,RDALL ;READ?TOTAL?OF?THE?DATA
RET
;SJMP RBYTE
;===END?OF?READ?ALL?DATA?FROM?24C21===========================
;====WRITE?THE?DATA?TO?24C02==============================
WR4C02HDMI:
MOV R10,#0FFH
;MOV R5,#0H ;ADDRESS?OF?THE
DATA?TO?READ
MOV SUBADR02,#0H
WDA: ;NUMBER?OF?ONE?TIME?BY?READED
MOV R0,#30H
MOV @R0,subadr02
MOV A,#C02ADR
MOV SLVADR02HDMI,A
MOV BYTECNT,#1H
RTY: ;CALL RCVDATA21
CALL SNDDAT02HDMI
JB F0,RTY
MOV A,#1H
ADD A,SUBADR02HDMI
MOV SUBADR02HDMI,A
DJNZ R10,WDA ;READ?TOTAL?OF?THE?DATA
NOP
RET
;==== =END OF THE WRITE
================================================
START:
;SEND?START,DEFINED?AS?HIGH-TO-LOW?SDA?WITH?SCL?HIGH.
;RETURN?WITH?SCL,SDA?LOW.
;RETURNS?CY?SET?IF?BUS?IS?NOT?AVAILABLE.
SETB?SDA
SETB?SCL
;VERIFY?BUS?AVAILABLE.
JNB SDA,X40;JUMP?IF?NOT?HIGH
JNB SCL,X40;JUMP?IF?NOT?HIGH
NOP ;ENFORCE?SETUP?DELAY?AND?CYCLE?DELAY
CLR SDA
NOP ;ENFORCE?HOLD?DELAY
NOP ;
NOP ;
NOP ;
NOP ;
CLR SCL
CLR C ;CLEAR?ERROR?FLAG
JMP X41
X40:
SETB?C ;SET?ERROR?FLAG
X41:
RET
STOP:
;SEND?STOP,DEFINED?AS?LOW-TO-HIGH?SDA?WITH?SCL?HIGH.
;SCL?EXPECTED?LOW?ON?ENTRY.RETURN?WITH?SCL,SDAHIGH.
CLR SDA
NOP ;ENFORCE?SCL?LOW?AND?DATA?SETUP
NOP
SETB?SCL
NOP ;ENFORCE?SETUP?DELAY
NOP ;
NOP ;
NOP ;
NOP ;
SETB?SDA
RET
Embodiment 1 utilizes the original DVI of television set, HDMI or special interface, can pass through I to the eeprom chip on the circuit board
2The C agreement is online to be write.Do not need to open in advance to repack again after the packing, write-in program of eeprom chip, but directly paster, online writing then earlier.That is when detecting write-in program simultaneously, simplified production technology, improved production efficiency, reduced production cost.During operate as normal, the write time of the EEPROM of a slice 1K position can not influence normal testing process less than 1 second, can cancel the operation that originally writes in advance again.It can be widely used in the online of various panel TV set EEPROM and write.
Claims (2)
1. the online wiring method of a TV set EEPROM is characterized in that it may further comprise the steps:
(1) on production line, make up the control write-in program the MCU master controller, with the HDMI of MCU master controller interconnection and DVI and special purpose interface and RS232 interface, with the internal storage space of MCU master controller interconnection, and power to the MCU master controller with power supply;
(2) by MCU control, the eeprom chip on the line is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port HDMI;
(3) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write, if exist then enter following step (5) according to operation by port DVI by MCU control;
(4) if there is no, then, eeprom chip is carried out pre-write operation, whether successfully judge whether the eeprom chip that exists needs to write according to operation by special purpose interface by MCU control, if exist then enter following step (5), if there is no then return step (2);
(5) adopt different address spaces to judge the range of capacity of eeprom chip;
(6) pass through the particular capacity that pre-wiring method is judged eeprom chip again;
(7) if particular capacity enough then call corresponding write-in program and write eeprom chip, if particular capacity is inadequately then the capacity of display is not enough.
2. according to the online wiring method of the described TV set EEPROM of claim 1, it is characterized in that said internal storage space is divided into one to four part.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005101045123A CN100397869C (en) | 2005-11-16 | 2005-11-16 | TV set EEPROM on-line write method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005101045123A CN100397869C (en) | 2005-11-16 | 2005-11-16 | TV set EEPROM on-line write method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1764235A CN1764235A (en) | 2006-04-26 |
CN100397869C true CN100397869C (en) | 2008-06-25 |
Family
ID=36748158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005101045123A Active CN100397869C (en) | 2005-11-16 | 2005-11-16 | TV set EEPROM on-line write method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN100397869C (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5761702A (en) * | 1993-06-30 | 1998-06-02 | Sharp Kabushiki Kaisha | Recording apparatus including a plurality of EEPROMS where parallel accessing is used |
CN1293515A (en) * | 1999-10-19 | 2001-05-02 | Tcl王牌电子(深圳)有限公司 | In-line upgrade method and device for TV set |
CN2702553Y (en) * | 2004-06-26 | 2005-05-25 | 海信集团有限公司 | Television circuit for implementing data upgrade through DVI or VGA terminal multiplexing |
-
2005
- 2005-11-16 CN CNB2005101045123A patent/CN100397869C/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5761702A (en) * | 1993-06-30 | 1998-06-02 | Sharp Kabushiki Kaisha | Recording apparatus including a plurality of EEPROMS where parallel accessing is used |
CN1293515A (en) * | 1999-10-19 | 2001-05-02 | Tcl王牌电子(深圳)有限公司 | In-line upgrade method and device for TV set |
CN2702553Y (en) * | 2004-06-26 | 2005-05-25 | 海信集团有限公司 | Television circuit for implementing data upgrade through DVI or VGA terminal multiplexing |
Also Published As
Publication number | Publication date |
---|---|
CN1764235A (en) | 2006-04-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101604301B (en) | Use of bond option to alternate between pci configuration space | |
US7233541B2 (en) | Storage device | |
CN101324875B (en) | Method and apparatus for expanding I<2>C bus | |
US8010710B2 (en) | Apparatus and method for identifying device type of serially interconnected devices | |
JP2003006003A (en) | Dma controller and semiconductor integrated circuit | |
CN103544122B (en) | The cooperative system and its Synergistic method of a kind of interface adaptive matching | |
KR960705283A (en) | IMAGE COMPRESSION COPROCESSOR WITH DATA FLOW CONTROL AND MULTIPLE PROCESSING UNITS | |
US5655142A (en) | High performance derived local bus and computer system employing the same | |
CN104217768B (en) | A kind of detection method and device of eMMC embedded memories | |
US11704023B2 (en) | Extensible storage system and method | |
CN110865909A (en) | FPGA-based EMMC interface test device and method | |
CN107710179B (en) | Multiple access single SDIO interface with multiple SDIO units | |
CN104572375A (en) | Method and device for diagnosing computer through display interface | |
US8184110B2 (en) | Method and apparatus for indirect interface with enhanced programmable direct port | |
CN106851183B (en) | Multi-channel video processing system and method based on FPGA | |
US20160371214A1 (en) | Single SDIO Interface with Multiple SDIO Units | |
US20080021695A1 (en) | ROM emulator and ROM testing method using the same | |
CN100397869C (en) | TV set EEPROM on-line write method | |
CN105573947B (en) | A kind of SD/MMC card control methods based on APB buses | |
CN107771328B (en) | Single-relay SDIO interface with multiple SDIO units | |
CN105068962A (en) | I2C controller access method and I2C controller access system | |
CN101206613A (en) | High speed basic input/output system debug card | |
CN104850872A (en) | Method of transferring data, computer program product and tag | |
CN107608927A (en) | A kind of design method for supporting Full Featured lpc bus host port | |
CN110362526B (en) | SPI slave device, storage and adaptation method and computer storage medium |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder |
Address after: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee after: HISENSE Co.,Ltd. Patentee after: Hisense Visual Technology Co., Ltd. Address before: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee before: HISENSE Co.,Ltd. Patentee before: QINGDAO HISENSE ELECTRONICS Co.,Ltd. |
|
CP01 | Change in the name or title of a patent holder |