CN100395891C - Capacitor of high-performance metal/insulator/metal structure and preparing method - Google Patents

Abstract

The present invention relates to a high performance metal/insulator/metal (MIM) capacitor suitable for a radio frequency signal integrated circuit, an analog signal integrated circuit and a composite signal integrated circuit and the preparation method for the MIM capacitor, which belongs to the technical field of semiconductor integrated circuit manufacture. The capacitor uses an Al2O3/HfO2 nanometer laminated structure prepared by an atomic layer depositing method as an insulating medium, and uses TaN as an upper and a lower metal electrodes. The prepared capacitor can satisfy the basic requirements of a radio frequency by-pass condenser and an analog capacitor respectively, and has the main manifestation: the stable high capacitance density of the prepared capacitor is 12.8fF/ mu m<2> in the range of 10k to 20G hertz, and the electrical leakage of the prepared capacitor is 3.2*10<-8>A/cm<2> under the voltage of 3.3V and at room temperature; the voltage linear coefficient of the capacitor at 1MHz is 240 ppm/V; as for a capacitor of which the capacitance density is 3.13fF/ mu m<2>, the electrical leakage of the capacitor is 1*10<-9>A/cm<2> under the voltage of 3.3V and at the temperature of 125 DEG C, and the voltage coefficient of the capacitor at 100kHz is 100 ppm/V<2>.

Description

The preparation method of the capacitor of high-performance metal/insulator/metal structure

Technical field

The invention belongs to semiconductor integrated circuit manufacturing technology field, be specifically related to a kind of preparation method of high performance capacitors.

Technical background

Capacitor element is introduced in the fields such as decoupling zero, filtering signals and vibration generation to be used for circuit in radio frequency integrated circuit and the composite signal integrated circuits.These capacitor elements of past all are to adopt polycrystalline silicon-on-insulator-polysilicon (PIP) structure or metal-oxide layer-silicon substrate (MOS) structure ^[1,2]Yet the substrate among polysilicon and the MOS all is confined to depletion effect, can produce parasitic capacitance, thereby causes the unnecessary capacitance variation and the disturbance of bias voltage.Nonmetal electrode all can produce big dead resistance simultaneously, has a strong impact on the effect of electric capacity under the high-frequency work environment.For radio circuit and analog to digital hybrid circuit, because the needs of accuracy, this problem becomes even more serious, makes traditional structure electric capacity can't satisfy application need under the gigahertz frequencies.Metal-insulator-metal type (MIM) structure capacitive device has adopted metal as two electrodes, not only can effectively reduce parasitic capacitance, and can also reduce the contact resistance at electric capacity the two poles of the earth.Therefore strong, the loss-free high capacitance density MIM of conductivity becomes the novel capacitor device that substitutes traditional integrated-circuit capacitor spare.

Along with the fast development of wireless telecommunications and nano-device, the system level chip integrated level increases greatly, and radio frequency and analog also are integrated in the middle of the chip.In movable equipment was used, system level chip (SoC) was a development trend, reduces the area that the electric capacity area occupied can increase logical gate especially.Simultaneously, in order to reduce the parasitic factor affecting under the high-frequency operation, capacitor element also becomes rear end (copper interconnection layer) from front end (based on silicon substrate) manufacturing gradually and makes.Above-mentioned two aspects all require single capacitor area occupied as much as possible little.Under the constant prerequisite of overall capacitance, dwindle capacitor area, must improve capacitance density.Therefore, how to obtain the big problem that high capacitance density has become industry.We know that capacitance density is the function of insulating dielectric layer dielectric constant and thickness:

$C=\frac{\mathrm{\&kappa;}\&CenterDot;{\mathrm{\&epsiv;}}_0}{t}---\left(1\right)$

Wherein C is a capacitance density, and κ is the dielectric constant of dielectric, ε ₀Be permittivity of vacuum, t is a thickness of insulating layer.By (1) formula as can be known, use the purpose that thin insulating barrier or high κ material can reach increases capacitance density.Yet, to commercial traditional dielectric SiO ₂(κ=～4) and Si ₃N ₄(κ=7), the attenuate of thickness can cause very big leakage current, even tunnelling current, causes inferior reliability.Therefore, use high κ material to become to obtain one of the feasible program of high capacitance density.

In radio frequency and analog integrated circuit, requirement to passive device is very harsh, be that MIM capacitor is when having high capacitance density, also must keep low electric leakage, good reliability, low voltage coefficient of capacitance (VCC) phase capacitance temperature factor (TCC), and with standard technology compatibility etc. ^[3-6]

List of references

[1]I.Iida，M.Nakahara，S.Gotoh，and H.Akiba，“Precise capacitor structure suitable forsubmicron mixed analog/digital ASICs”，Proc.IEEE Custom Intrgration Circuits Conf.，1990，pp.18.5.1-18.5.4.

[2]A.S.St Onge，S.G. Franz，A.F. Puttlitz，A.Kalinoski，B.E.Johnson，and B.E1-Kareh，“Design of precision capacitors for analog applications”，IEEE Trans.Compon.，Hybirds，Manufact.Tcchnol.，vol.15，no.4，pp.1064-1071，Dec.1992.

[3]S.J.Kim，B.J.Cho，L.M.Fu，C.X.Zhu，A.Chin，and D.L.Kwong，“HfO ₂ andLanthanide doped HfO ₂ MIM capacitors for RF/Mixed IC applications，”in Symp.VLSITech.Dig.，2003，pp.77-78.

[4]X.Yu，C.Zhu，H.Hu，A.Chin，M.F. Li，B.J.Cho，D.-L.Kwong，P.D.Foo，and M.B.Yu，“A high-density MIM capacitor(13-fF/μm2)using ALD HfO2 dielectrics，”IEEE ElectronDevice Lett.，vol.24，pp.63-65，Feb.2003.

[5]T. Ishikawa，D.Kodama，Y. Matsui，M.Hiratani，T.Furusawa，and D. Hisamoto，“High-capacitance Cu/Ta ₂O ₅/Cu MIM structure for SoC applications featuring asingle-mask add-on process，”in IEDM Tech.Dig.，2002，pp.940-942.

[6]The international Technology Roadmap for semiconductors，Semiconductor IndustryAssociation，2005.

Summary of the invention

The preparation method of the MIM capacitor that the purpose of this invention is to provide that a kind of capacitance density height, little, the good reliability of electric leakage, parasitic parameter are low, voltage coefficient of capacitance and capacitance temperature factor is low.

The MIM capacitor that the present invention proposes adopts TaN to do upper and lower metal electrode, uses the Al of the method growth of atomic layer deposition ₂O ₃/ HfO ₂Nano-stack (nano-laminated) film is as insulating medium layer, Al ₂O ₃The thickness of individual layer is 0.5-1.5nm, HfO ₂The thickness of individual layer is 5-15nm, and the dielectric layer that links to each other with upper and lower metal electrode is Al ₂O ₃Individual layer.Insulating medium layer is by Al ₂O ₃And HfO ₂Layer alternating growth forms, and whole thickness of dielectric layers changes as required, each Al ₂O ₃And HfO ₂The thickness of individual layer is controlled by the reaction cycle number of times of atomic layer deposition.The preparation method of the MIM capacitor that the present invention proposes is as follows:

1, chemical vapor deposition layer of silicon dioxide insulation film on silicon substrate; General thickness is 400～1000nm, is used for reducing ghost effect.

2, adopt the TaN film of method deposit one deck 100～300nm of reactive sputtering to be used as bottom electrode.General Ta target, the N of adopting ₂With Ar be reacting gas.

3, adopt the method for atomic layer deposition (ALD) Al that successively grows ₂O ₃And HfO ₂Nano-stack dielectric film, deposition temperature are controlled at 300～350 ℃.Wherein, Al ₂O ₃Reaction source can select trimethyl aluminium Al (CH for use ₃) ₃And water vapour; HfO ₂Reaction source can select hafnium tetrachloride HfCl for use ₄And water vapour.

4, adopt the identical condition deposit top electrode of same step (2).

5, form figure after the steps such as gluing, exposure, development.

6, reactive ion beam etching (RIBE) is removed upper strata metal and insulating medium layer, forms top electrode, exposes the bottom electrode metal level simultaneously.

7, remove photoresist after, at N ₂/ H ₂Anneal in the atmosphere, temperature is 400～450 ℃, and the time is 30～60 minutes.

The present invention has the following advantages:

1, makes Al ₂O ₃Directly link to each other, improved the interfacial characteristics of electrode/insulator, improved the emission potential barrier of electronics, help reducing the electric leakage of MIM electric capacity with electrode;

2, in dielectric, introduce the Al of amorphous ₂O ₃Layer makes HfO ₂Film is isolated into a plurality of thin individual layers, so suppressed HfO effectively ₂Crystallization, reduced the grain boundary or the defective that produce electric leakage, improved the breakdown strength of medium greatly;

3, adopt the method for atomic layer deposition, can realize that the dielectric among the present invention is being lower than 350 ℃ of growths down, therefore with the heat budget compatibility of integrated circuit postchannel process.In addition, can reach accurate THICKNESS CONTROL during the very thin film of this method growth.

Description of drawings

Fig. 1 capacitance density is with the variation diagram (thickness of dielectric is respectively 13nm and 43nm) of frequency.

Fig. 2 is under the condition of 25 ℃ and 125 ℃, and leakage current is with the variation diagram of voltage.

Fig. 3 is corresponding to the cross section transmission electron microscopy mirror photo of the dielectric MIM electric capacity of 56nm in the example 2.

Embodiment

Embodiment 1

Capacitor element is requisite device in the radio frequency bypass circuit, and its effect is to filter the interference that enters from the sensitizing range.Low-frequency noise for filtering harm radio frequency generally requires shunt capacitance that bigger capacitance will be arranged.On mobile communication equipment, wish that the capacitor plate area is the smaller the better, thereby improve integration density, therefore need the capacitor element of high capacitance density, can keep low leakage current, as far as possible little capacitance voltage and temperature coefficient etc. simultaneously.

Adopt TaN to do upper and lower metal electrode, use the Al of the method growth of atomic layer deposition ₂O ₃/ HfO ₂The nano-stack film is as insulating medium layer, Al ₂O ₃The thickness of individual layer is 0.5-1.5nm, HfO ₂The thickness of individual layer is 5-15nm, and the dielectric layer that links to each other with metal electrode up and down is Al ₂O ₃Individual layer.Insulating medium layer is by Al ₂O ₃And HfO ₂Layer alternating growth forms.Preparation condition is: the thickness of deposit TaN is 100nm, 200nm and 300nm; 300 ℃, 330 ℃, 350 ℃ respectively of deposit insulating medium layer temperature.The Al of alternating growth ₂O ₃Layer and HfO ₂Layer thickness in monolayer is respectively 1nm and 5nm, and the gross thickness of final insulating medium layer comprises two kinds: 13nm and 43nm.

The capacitance density that Fig. 1 records for this example is with the variation of frequency.In the 20GHz scope, show stable capacitance density characteristic at 10kHz, illustrate that this structure is fit to the application of radio frequency shunt capacitance.The Al of 13nm ₂O ₃/ HfO ₂The nano-stack medium has the m up to 12.8fF/ μ ²Capacitance density.Fig. 2 be the leakage current of this example with change in voltage figure, show that leakage current density is 3.2 * 10 under the voltage of 3.3V at room temperature ^-8A/cm ², the disruptive field intensity under the room temperature is 6MV/cm.Table 1 has been listed the electrical parameter of this MIM electric capacity, and and other dielectric compare, mix terbium HfO as reactive sputtering (PVD) ₂, atomic layer deposition (ALD) HfO ₂, PVDTa ₂O ₅From table, can see that this example has minimum leakage current and lower voltage coefficient under higher capacitance density, show this example and had the applications well prospect.

Embodiment 2

In the analog circuit, capacitor element is general as keeping electric capacity that sampling and signal have been reduced voltage maintenance effect.Increase the decay that electric capacity can sustaining voltage, but can cause the increase in sampling time, thus the electric capacity of low electric leakage will be selected for use, and have good environmental stability.Therefore, capacitor must have low leakage current, low voltage and temperature coefficient, and possesses higher capacitance density.

Adopt TaN to do upper and lower metal electrode, use the Al of the method growth of atomic layer deposition ₂O ₃/ HfO ₂The nano-stack film is as insulating medium layer, Al ₂O ₃The thickness of individual layer is 0.5-1.5nm, HfO ₂The thickness of individual layer is 5-15nm, and the dielectric layer that links to each other with metal electrode up and down is Al ₂O ₃Individual layer.Insulating medium layer is by Al ₂O ₃And HfO ₂Layer alternating growth forms.Preparation condition is: the thickness of deposit TaN is 200nm, 150nm and 300nm; 300 ℃, 340 ℃, 350 ℃ respectively of deposit insulating medium layer temperature.The Al of alternating growth ₂O ₃Layer and HfO ₂The thickness in monolayer of layer is for being respectively 1nm and 10nm, and total thickness of insulating layer is 56nm.The capacitance density that records is 3.13fF/ μ m ², voltage coefficient is respectively 100ppm/V ²(quadratic term) reaches-80ppm/V (once item).Leakage current density only is 1 * 10 under the condition of 3.3V and 125 ℃ ^-9A/cm ², and breakdown electric field is 3.3MV/cm under this temperature.The transmission electron microscope photo of its section is seen Fig. 3, has clearly shown Al ₂O ₃And HfO ₂The structure of alternating growth.To HfO ₂The individual layer microphoto amplifies the back to be observed, and finds only to occur in this individual layer the phenomenon of partially crystallizable.

Other result of the parameter of MIM capacitor and bibliographical information relatively in table 1 example 1

Document	[3]	[4]	[5]	This example
					Used medium	Mix terbium HfO 2 (PVD)	HfO 2(ALD)	Ta 2O 5(PVD)	Al 2O 3/HfO 2Nano-stack (ALD)
Capacitance density (fF/ μ m 2)	13.3	13	9.2	12.8
					Leakage current (A/cm 2)	1×10 -7(when 2V)	5.7×10 -7(when 2V)	2×10 -8(when 1.5V)	7.45×10 -9(when 2V)
Voltage coefficient of capacitance (ppm/V 2) (ppm/V)	2667 332	853 607	3580 2060	1830 240

Claims (1)

1. the preparation method of the capacitor of high-performance metal/insulator/metal structure, this capacitor adopts TaN to do upper and lower metal electrode, adopts Al ₂O ₃/ HfO ₂The nano-stack film is as insulating medium layer, and the dielectric layer that links to each other with upper and lower metal electrode is Al ₂O ₃Individual layer; It is characterized in that concrete steps are as follows:

(1) chemical vapor deposition layer of silicon dioxide insulation film on silicon substrate;

(2) adopt the TaN film of method deposit one deck 100～300nm of reactive sputtering to be used as bottom electrode;

(3) adopt the method for the atomic layer deposition Al that successively grows ₂O ₃And HfO ₂Nano-stack dielectric film, deposition temperature are controlled at 300～350 ℃; Control Al ₂O ₃The thickness of individual layer is 0.5-1.5nm, HfO ₂The thickness of individual layer is 5-15nm;

(4) adopt the identical condition deposit top electrode of same step (2);

(5) form figure after the steps such as gluing, exposure, development;

(6) reactive ion beam etching (RIBE) is removed upper strata metal and insulating medium layer, forms top electrode, exposes the bottom electrode metal level simultaneously;

(7) remove photoresist after, at N ₂/ H ₂Anneal in the atmosphere, temperature is 400～450 ℃, and the time is 30～60 minutes.

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