CN100392838C - Crystal circle grade seamless link for memory semiconductor circuit - Google Patents

Crystal circle grade seamless link for memory semiconductor circuit Download PDF

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Publication number
CN100392838C
CN100392838C CNB031530206A CN03153020A CN100392838C CN 100392838 C CN100392838 C CN 100392838C CN B031530206 A CNB031530206 A CN B031530206A CN 03153020 A CN03153020 A CN 03153020A CN 100392838 C CN100392838 C CN 100392838C
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burning
memory
array
memory component
test block
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CN1581456A (en
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施正宗
戎博斗
刘士晖
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Etron Technology Inc
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Etron Technology Inc
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Abstract

The present invention discloses a memory element with a burn-in function, which comprises a memory cell array and a burn-in test block, wherein the burn-in test block comprises a memory address generator, a data pattern generator and a command pattern generator; the burn-in test block can write data into the memory cell, can start word lines in the array to an ON state, and can restrain the array in a static mode. The present invention also discloses a method for burning-in wafer grades by using the element.

Description

Be used for the crystal circle grade burning of memory integrated circuit
Technical field
The present invention is the burning that is relevant to a kind of integrated circuit component, especially is relevant to an a kind of circuit and method that is used for the crystal circle grade burning of a memory component.
Background technology
In the manufacturing technology of integrated circuit, burning (Burn-in) is a technology that often is used, and the execution of product burning is the reliability that is used for improving product.Typical burning technology is containing utilizes the circuit that extends voltage range and temperature exert pressure (circuit stressing).By the mode that circuit is exerted pressure, can exposure before product does not dispatch from the factory such as bad oxide layer quality (oxide quality) or critical heat charge carrier ability flaws such as (borderline hot carrier capability).Burning failure can reduce " product yield " (product yield) in the factory.Yet by the lifting of product turnout reliability, the customer satisfaction meeting is improved.
Typical burning is back but performed before the packaging and testing in the end in the product encapsulation, the burning performance an of the best so can be provided, and detect any problem relevant with canned program.Yet, have a lot of manufacturers that the production marketing of crystal circle grade is gone out now, and client has the requirement of rigorous reliability for the product of these crystal circle grades.For example, a memory circuitry have that a good chip (KGD, known good die) requires can not be after encapsulation greater than 200 flaw/1,000,000 (defects/million).Because the influence of " sampling flaw effect arbitrarily " (random defect effects), circuit not being exerted pressure is to guarantee having such quality grade.Therefore, meet such quality demand on crystal circle grade, the circuit pressure method (wafer levelcircuit stressing method) of crystal circle grade must be installed and enable in circuit manufacturer.
The crystal circle grade method for burn-recording that manufacturer installs and enables has quite a lot problem.At first, in prior art, typical crystal circle grade burning must be gone up all weld pads (pads) with probe detection circuit chip (circuit die), and this practice can derive two problems.At first, utilize the weld pad on the probe test circuit to produce negative influence to bonding wire (wire bonding) operation that will carry out backward.Burn job means carries out extra probe test to each weld pad, therefore can cause the decline of zygosity (bondability) on the whole.Secondly, the number of the input of burning testing system and output channel (I/O channels) has its restriction.If weld pads whole on the chip must be done test with probe, will cause only has some elements can carry out burning simultaneously.These will limit the productivity ratio of processing procedure or need a large amount of equipment investments.
Problem of another relevant prior art is that method for burn-recording lacks the complete circuit framework of exerting pressure.For example in static (static) RAM Element Technology, when carrying out burning, there is the reliability problems point of two kinds of kenels must put forward to discuss: gate circuit oxide layer reliability (gate oxide reliability) and hot carrier reliability (hot carrierreliability).Find that after deliberation use static burning technology can make the flaw of gate circuit oxide layer obtain best detecting effect, the static burning technology of this kind is in an effective time, stride across gate circuit oxide layer structure and apply a big voltage.Research is found again, uses the dynamic burning method can make the hot carrier flaw obtain best detecting effect, and this dynamic method for burn-recording is that the jitty element often is switched when big supply voltage occurring.In prior art, method for burn-recording is not fully exerted pressure to reach complete element in conjunction with these methods on crystal circle grade.
There are several to be method and the circuit that is used for the element burning in the invention of prior art, United States Patent (USP) 6,233,184, Barth et al discloses a wafer method for burn-recording and an element.The method is on the circuit chip and under the burning executing state, uses a BIST circuit to carry out an array memory.Another United States Patent (USP) 6,255,836, Schwarz et al are described a memory component with a BIST unit.This BIST unit can be repeated to be changed to a test pattern, to be used for the array memory of exerting pressure.
Summary of the invention
Main purpose of the present invention is that an effective and easily manufactured circuit is being provided, to reach at crystal circle grade burning one circuit.
Another object of the present invention is providing one to use minimum reservation I/O weld pad and crystal circle grade burning circuit.
Another purpose of the present invention is providing a crystal circle grade burning circuit, exerts pressure to a memory circuitry with static burning to provide dynamically.
A further object of the present invention is in the method that a crystal circle grade burning one circuit is provided.
The present invention and more a purpose providing one in conjunction with dynamically exerting pressure to a memory circuitry and method with static burning.
According to aforesaid purpose, the present invention discloses a memory component with burning ability.This element comprises the memory cell (memory cell) and a burning test block (burn-in test block) of an array.This burning test block comprises a memory address generator (memory address generator), a data pattern generator (datapattern generator) and an instruction figure pattern generator (command pattern generator) again.And this burning test block data can be write in this memory cell, can start word line in the array to the state of ON, and this array can be remained in the static schema.
Again, according to aforesaid purpose, the present invention also discloses the method that a memory component by this carries out the crystal circle grade burning.The method comprises, at first, one memory component is provided in a wafer, this memory component comprise an array memory cell with a burning test block, this burning test block comprises a memory address generator, a data pattern generator and an instruction figure pattern generator.The burning test block can be write data in the memory cell, can start all word lines in the array, and can maintain array in static schema.Secondly, survey the input of the burning test block on memory component with probe.The 3rd, by using burning test block write memory unit and being burnt to memory component in a dynamic way.At last, use the burning test block,, be burnt to memory component in the mode of static state by in the write memory unit, by all word lines being started to the state of ON and by array is remained in the static schema.The method may extend on a wafer the burning simultaneously of a plurality of this kind memory components.
Description of drawings
Fig. 1 is in the explanation preferred embodiment of the present invention, the block schematic diagram of tool burning functional memory element.
Fig. 2 is the block schematic diagram that explanation array memory of the present invention comprises a regular section (normal section) and redundant section (redundant sections).
Fig. 3 is in the explanation preferred embodiment of the present invention, with the exert pressure schematic flow diagram of method of a writable memory component of dynamical fashion.
Fig. 4 is the schematic diagram of dynamically exerting pressure of explanation an array memory of the present invention.
Fig. 5 is in the explanation preferred embodiment of the present invention, with the exert pressure schematic flow diagram of method of a writable memory component of static mode.
The static state schematic diagram of exerting pressure of explanation an array memory of the present invention among Fig. 6.
Fig. 7 is in the explanation preferred embodiment method of the present invention, the crystal circle grade burning is bonded to the schematic flow diagram of product wafer flow process.
Embodiment
Preferred embodiment of the present invention discloses a memory circuitry, and it has a burning block of being convenient to the crystal circle grade burning.This burning block uses a small amount of limited weld pad, can make the burning simultaneously of a large amount of circuit chips.This burning block comprise be used for array memory in addition dynamically with static function of exerting pressure.The present invention also discloses the method for a crystal circle grade burning.The skill personage who is familiar with this field works as can understand application of the present invention and extension, and can not depart from the scope of the present invention.
See also the memory component preferred embodiment that Figure 1 shows that tool burning function of the present invention.In can being presented at, several key properties of the present invention also further are described below in the icon.The present invention discloses a memory circuitry element with crystal circle grade burning.This element allows a plurality of circuit to exert pressure simultaneously to reduce the circulation timei of product.
This element comprises the memory cell 20 and a burning test block 10 of an array.Array memory unit 20 preferably comprises a random-access memory (ram), as SRAM or DRAM.This array 20 preferably comprises a Circuits System that includes (self-contained) chip functions, does not rely on burning test block 10 when making it to carry out regular function.For example: this array comprises and is used in regular function and the necessary whole I/O weld pads of outside interface.This array 20 can comprise regular (normal) and redundant (redundant) memory cell again, and in the normal region of array, this redundancy unit is optionally replaced the unit defective that lost efficacy.
See also and Figure 2 shows that an array 60 comprises regular section 70 and redundant section 75.If when test, detect a memory cell defective arranged in the regular section 70, then can forever change array memory by blowout or by writing a non-volatile unit (non-volatile cell), this for example writes non-volatile unit: the unit of a redundancy unit or one group of replacement unit false failure or one group of unit.Include redundant array location 75 and replace to fall part defective, to increase the production of product by allowing to repair memory circuitry.
Please consult shown in Figure 1ly as most important characteristic again, this burning test block 10 comprises a memory address generator 30, a data pattern generator 35 and an instruction figure pattern generator 40.Burning test block 10 can write data to memory cell in the array 20, can start all word lines in the array 20, and maintains array 20 in static schema.These performances allow burning test block 10 intactly to apply pressure to array memory 20.
This burning block 10 needs minimum input.In preferred embodiment, this burning block 10 uses five input: VCC_BI, VSS_BI, BIEN, BIMWLB and BICK.The finishing functions of this five input is in following table 1.Exert pressure in burning and allow burning power supply supply level and which couple when carrying out in VCC_BI and VSS_BI pin position.VCC_BI and VSS_BI signal preferably comprise weld pad, and these a little weld pads are to distinguish to some extent with VCC that is used for array memory 20 and VSS weld pad.Therefore, when carrying out, burning do not need to reduce connecing and property of these weld pads with probe detecting VCC and VSS weld pad.
Weld pad Describe
VCC_BI Burning power supply (BURN-IN POWER)
VSS_BI Burning ground connection (BURN-IN GROUND)
BIEN Burning activation (BURN-IN ENABLE)
BIMWLB The a plurality of WL of burning during startup (BURN-IN MULTIPLE WL ON ENABLE)
BICK The burning clock pulse (BURN-IN CLOCK TO COUNT ADDRESS) of counting address
Table one burning test block input
The BIEN signal is to be used for starting (enable) and to stop (disable) burning test block 10.In preferred embodiment, BIEN is driven by the outside, represents to start when signal is high voltage (High), then represents to stop when signal is low-voltage (low) or suspension joint (floating).When the BIEN signal terminating, burning block 10 will not influence the functional operation of array memory 20.Otherwise, if BIEN signal enabling, burning block 10 is the writable control storage block, this control mode be see through address signal (address signals) (XADD), the execution of data bus signals (data bus signals) and instruction signal (command signals) writes array memory 20 with data.
The BIMWLB signal is to be used for starting and the ON state that stops a plurality of word lines (multiple word line).The BIMWLB signal is to be driven by the outside, then represents to start when signal is low-voltage or suspension joint, and represents to stop when signal is high voltage (High).Also only have a word line to start under the situation that writes of regular running executive mode, if the BIMWLB signal terminating, then burning test block 10 writes to data in the memory cell.Otherwise when the BIMWLB signal enabling, burning test block 10 can be enabled in a plurality of word lines in the array 20.By starting these a plurality of word lines, burning test block 10 can utilize burning supply voltage (VCC_BI) to apply pressure to whole array with static mode.
The BICK signal is the clock signal that is used for burning test block 10.In preferred embodiment, address mode generator 30 all comprises ripple counter (ripple counters) with data pattern generator 35.And this ripple counter is a pattern (pattern) and a data bit element pattern that is used to produce a memory cell address, to be used for writing so far a little memory address.This ripple counter is that the BICK signal drives its clock pulse.Again, instruction figure pattern generator 40 utilizes the BICK signal to be sent to the command signal sequential (timing) of array memory 20 with control.This BICK signal can (static stress mode) switch to state of termination (turn OFF) to maintain array 20 in static state is exerted pressure pattern.
In addition, burning test block 10 can comprise a regular/redundancy selector block (normal/redundantselector block) 45.If array 20 has redundancy unit (redundant cells), when then this regular/redundancy selector block 45 is tested in burning, allow the burning test block 10 temporary transient redundancy units that start.
See also and Figure 3 shows that the present invention is with the exert pressure method 100 of preferred embodiment of tool burning functional memory element of dynamical fashion.Many key properties of the method 100 are described in the flow chart.The data pin position of one, burning test block is all with probe test, supply voltage willfully on VCC_BI and VSS_BI pin position with burning, and the burning test block is set in the BIEN pattern of step 110.The array memory and the VCC_BI voltage quasi position is exerted pressure.
One exerts pressure dynamically is to be applied to array memory to find out the problem of hot carrier.Take down a confession or testimony during an interrogation in the high fever of exerting pressure and to answer under the situation of voltage (VCC_BI), the dynamic test of utilizing transistor to remove switching state continually is to find out the hot carrier problem shortcoming best approach defective.This dynamic pressure method preferably comprises and writes data in the array memory.Better situation is in step 120 and 130, one data " 0 " write each bit in the array, and in step 140 and 150, data " 1 " write each bit in the array.Attention: the method is that hypothesis has had the redundancy unit that can additionally select in array earlier.Execution sequence in the icon, step 160 can repeat for several times, exert pressure complete up to the dynamic mode burning of step 170.
See also the explanation that Figure 4 shows that array memory is dynamically exerted pressure.In step 202, a data bit element writes the primary importance of array, and an other data bit tuple can write the first bit group position.And in step 204, data bit element or bit that this is identical write the second place.Then being docile and obedient preface in step 206,208,218 and 220 writes the next position, writes last position in the array up to step 222.As shown in Figure 3, one " 0 " bit or whole " 0 " the bit group writes during test execution in the first time, then write one again " 1 " bit or whole " 1 " the bit group is in array, these tests that write preferably repeat repeatedly, go to do repeatedly to switch to force each unit by using burning supply voltage quasi position.And the transistor in the memory is when dynamic mode burning is carried out, and can't can resist the hot carrier problem fully and cause failure.
Another selectable mode, this dynamic mode burning are tested to comprise and are write an inspection version pattern (checkerboard pattern) in array memory.This burning test block will be inserted " 0 " with " 1 " bit is in array, this inserted mode at first writes one " 0 " bit is in a unit, then write one " 1 " bit in next unit, write one again " 0 " bit in next unit, continue to finish the insertion program by last execution sequence.Maybe another executive mode, one can be arranged " 01010101 " the bit group can write each tuple in the array.Write by when test at next, writing the bit group will carry out with the complement kenel " 10101010 " of last bit group, so can make each unit can carry out switchings " 0 " and " 1 " and state.
For reaching dynamic writing mode, burning test block of the present invention is used unique above-mentioned signal of carrying.Please consult shown in Figure 1ly again, as previously mentioned, this VCC_BI and VSS_BI signal apply pressure to a burning magnitude of voltage, and this burning magnitude of voltage surpasses the power supply supply voltage quasi position value of typical array memory.The startup of BIEN signal is to allow burning test block 10 to remove instruction, data and the address wire of array of controls, and the BIEN signal termination is to make word line be in a normalized mode (normal mode).BICK provides clock signal, makes the address generator 30 and the ripple counter of data pattern generator 35 carry out counting.This address generator 30 from " 00 ... 0 " beginning, is counted each address in the array memory in regular turn.One data " 0 " are written in each address.If array memory 20 comprises a redundant array, then mat address generator carries out addressing with these redundant blocks, and is controlled by regular/redundancy selector block 45.When the address rolling counters forward was back to " 00 ... 0 ", then the counter of this data pattern generator increased count value (up counting) to write data " 1 " in each unit.This moment, the address counter increased count value, and data " 1 " can be write in each bit in the array.When finishing this and carry out, then address counter and data counter counting is back to initial value (roll over) and these programs are restarted execution once more.
See also now and Figure 5 shows that the exert pressure memory component preferred embodiment explanation of a tool burning function of static state of the present invention.Many key properties of the method 300 are described in the flow chart.The data pin position of one, burning test block is all with probe test, and in better embodiment, and then the execution of static test is carried out for dynamic test, so these pin positions have connected probe test.Supply voltage willfully on VCC_BI and VSS_BI pin position with burning, and burning test block 10 is set in the BIEN pattern of step 310.This VCC_BI voltage quasi position applies pressure to array memory.
Then, applying a static state on array memory exerts pressure to find out the problem place of gate circuit oxide layer.Find that after deliberation it is best to use static burning technology to find out its effect of flaw of gate circuit oxide layer.But the static burning technology of this kind must continue to exert pressure time to an elongated segment on transistorized gate circuit oxide layer with big burning supply voltage (VCC_BI).The method that this static state is exerted pressure preferably comprises and writes data into whole array memory, is included in the redundant array in the step 3320.Better mode is, data " 0 " are written to each bit in the array.In addition, in step 320, the word line that starts in all arrays is important feature.Secondly, in step 330, this array is held the time of an elongated segment under this state.Preferably stop this burning clock pulse BICK.Under this situation, use word line that burning supply voltage VCC_BI removes to maintain whole arrays to maintain starting state, for example: this static state can be exerted pressure and carry out about 10 seconds.Secondly, in step 340, with data " 1 " write each bit in the array.Same, in step 340, all word lines are started state to ON.Then in step 350, array is remained in the static schema to apply pressure to the transistor gate oxide layer with VCC_BI.Identical with the situation of data " 0 ", about 10 a seconds static state exerted pressure is used in data " 1 " situation.
Seeing also Fig. 3 now, is the icon of exerting pressure for array memory static state.Especially start the word line of each row (row) in the array about the burning test block.In 372, start first row, when address ripple rolling counters forward increases, then at 374 and 376 word lines of the row counted of startup respectively.The word line of aforementioned row remains on the state that starts ON.Starting whole word lines at last in 378 is the ON state, carries out static burning 390 at the moment.
Finish the method that static state is exerted pressure, burning test block of the present invention is used aforesaid signal with unique mode.Please consult shown in Figure 1ly again, force VCC_BI and VSS_BI signal as the aforementioned and reach a burning magnitude of voltage, this burning magnitude of voltage surpasses the typical power supply supply voltage level value of array memory 20 usually.At first, this BIEN signal be can be started with allow burning test block 10 go in the array of controls instruction, data, with the address lead.At first, this BIMWLB signal is terminated and makes these word lines be in the regular pattern.Then, this BICK signal is adjusted clock pulse and makes and count at the memory address generator 30 and the ripple counter of data pattern generator 35.This address generator 30 begins counting from the position of " 00 ... 0 ", and is several in regular turn all over each address in the array memory, and with data " 0 " write in each address.If this array memory 20 comprises a redundant array, then under the control of regular/redundancy selector block 45, these redundant blocks also can carry out addressing by the address generator.
As an important feature, when address rolling counters forward during to " 00 ... 0 ", the BIEN signal is terminated, and BICK still continues to provide clock pulse.About dynamic test, data counter will write data " 1 " at this moment as above-mentioned.Yet, when the BIEN signal terminating, will not have data and be written in the array memory, this array will be possessed data " 0 " in each unit.
As another important feature, when the address counter counted up to " 00 ... 0 " again, the BIEN signal was activated once more.Yet this moment, the BIMWLB signal was activated.As previously discussed, this BIMWLB signal will cause that a plurality of word lines in the array are locked in the state of ON temporarily.And the address counter will be counted the array address again, and when the rolling counters forward value increased to a new row address, this word line was to lock in the state that starts ON temporarily, and this state is as being in regular running executing state.Yet because of the BIMWLB signal enabling, previous word line still is in the state that temporary lock starts.Count once more when being back to initial value when this address counter, whole word lines will lock in the state that starts ON temporarily.
At this moment, the BICK signal is terminated the state in OFF.This can further stop the counting of address and data ripple counter, and array memory will remain on static state exert pressure (static stress mode) in the pattern.In last test, under a supply voltage that promotes, via exerting pressure of extending, gate circuit oxide layer faint or defective will lose efficacy and be detected out.
After the static press cycle of data " 0 " stops, then will carry out the situation of data " 1 " once more in regular turn.It is the OFF state that the BIMWLB signal will stop whole word lines.The BICK signal is restarted the state for ON.And data counter will be the state of " 1 ", and data " 1 " can be write in each unit of array.After these a little steps were complete, the BIEN signal was incited somebody to action temporary termination again to avoid writing " 0 " data to array.Then, the BIEN signal is restarted, and the BIMWLB signal enabling is the state of ON so that whole word lines locks in to start temporarily.Lock in the state of startup ON temporarily at whole word lines after, the BICK signal then terminates as the OFF state.Then, this array 20 will be carried out static pressure schedule again.
Seeing also explanation one preferable implementation method 400 shown in Figure 7 is that the crystal circle grade burning is incorporated in the flow process of product wafer.The memory component of tool burning novelty of the present invention will be convenient to carry out a crystal circle grade burning program.This burning is preferably incorporated in as shown in the figure the production routine.Wafer-process is to finish in the step 405, secondly, is to carry out in step 410 in the crystal circle grade burning test that the present invention narrated.This burning handling procedure uses dynamically and static state is exerted pressure both, with the memory component optimization, and causes structural failure faint or defective.Secondly, the crystal circle grade functional test is to carry out in step 420.This testing procedure 420 will detect flaw element or the structure in circuit, and particularly those burning handling procedures 410 are formerly carried out and lost efficacy.In step 430, the wafer after this test gets final product shipment at last.
Incorporate in the manufacturing program by the crystal circle grade method for burn-recording is integrated, the method is the level that can promote the good wafer (KGD) of encapsulation.Can make circuit manufactory under the potted element grade, meet strict good chip level like this, and test and product turnout meet the level of crystal circle grade.
Advantage of the present invention can be done a summary now.The present invention can reach an effective and circuit that produce easily.Crystal circle grade burning circuit uses few reservation I/O weld pad.And this crystal circle grade burning circuit provides dynamically and exerts pressure to a memory circuitry with static burning.The present invention can reach again one in crystal circle grade the method for burning one circuit.The method combines in a memory circuitry dynamically and exerts pressure with static burning.
Shown in preferred embodiment, the circuit of this tool novelty and method provide often knows another effective choice scheme of field.
The present invention specifically presents in this preferred embodiment explanation and describes, and the personage who is familiar with this skill will be recognized, will not break away from the spirit and scope of the present invention for the various changes of formal and details.
Symbol description
10 burning test block, 20 array memory unit
30 memory address generators, 35 data pattern generators
40 instruction figure pattern generators
45 regular/redundancy selector blocks
60 arrays
70 regular sections
75 redundant sections
100 methods
110,120,130,140,150,160,170,202,204,206,208,218,220,222 steps
300 methods
310,320,330,340,350,372,374,376,378,390 steps
400 methods
405,410,420,430 steps.

Claims (25)

1. the memory component with burning function comprises: the memory cell of an array; And a burning test block, it has several inputs, is to be connected with the memory cell of this array, includes: a memory address generator is the memory cell that the pattern that produces a memory cell address is connected to this array; One data pattern generator is to produce the memory cell that a data bit pattern is connected to this array; And an instruction figure pattern generator, be the command signal sequential that control is sent to the memory array of this array; It is characterized in that: wherein this burning test block can write to data this memory cell, word lines whole in this array can be started and be ON state and this array can being remained in the static schema.
2. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this array memory unit and this burning test block are to be formed in the single wafer, and wherein a wafer comprises a plurality of wafers.
3. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this memory address generator comprises a ripple counter.
4. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this data pattern generator comprises a ripple counter.
5. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this memory cell is one of to be selected from the group that is made up of SRAM and DRAM.
6. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this array comprises regular unit and redundancy unit, and wherein this burning test block comprises one again in order to start or to stop the device of this redundancy unit.
7. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this burning test block can read this memory cell again.
8. the memory component with burning function as claimed in claim 1 is characterized in that: wherein this data pattern generator can produce one and check the version pattern.
9. method of carrying out a memory component crystal circle grade burning, it is characterized in that: a memory component is set on a wafer, wherein this memory component comprises: the memory cell of an array; And a burning test block, have several inputs, be to be connected with the memory cell of this array, wherein this burning test block comprises: a memory address generator is that the pattern of generation one memory cell address is connected to the memory cell of this array; One data pattern generator is to produce the memory cell that a data bit pattern is connected to this array; An and instruction figure pattern generator, be the command signal sequential that control is sent to the memory array of this array, wherein this burning test block can write to data this memory cell, can start word lines whole in this array, also this array can be remained in the static schema; Survey the input of this burning test block on this memory component; Utilize this burning test block and mat to write to this memory cell, and this memory component of burning in a dynamic way; And utilize this burning test block and mat to write to this memory cell and mat to start all these word lines for the ON state, again by this array is remained in this static schema, and with this memory component of mode burning of static state.
10. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein this in a dynamic way the step of this memory component of burning comprise all this memory cells write to " 0 " and all these memory cells are write to " 1 ".
11. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein this in a dynamic way the step of this memory component of burning comprise all this memory cells are write to and comprise one of a series of " 0 " and " 1 " value and check an edition pattern.
12. the method for execution one memory component crystal circle grade burning as claimed in claim 9, it is characterized in that: wherein should be with the step of this memory component of mode burning of static state, comprise write " 0 " to all these memory cells with write " 1 " to all these memory cells.
13. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein should comprise all this memory cells are write to comprising a series of " 0 " and checking an edition pattern with one of " 1 " value with step of this memory component of mode burning of static state.
14. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: be included in again on a plurality of these memory components of this wafer survey simultaneously, burning in a dynamic way, and with the mode burning of static state.
15. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein on this memory component, repeat repeatedly in a dynamic way and with the step of the mode burning of static state.
16. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein this memory cell is one of to be selected from the group that is made up of SRAM and DRAM.
17. the method for execution one memory component crystal circle grade burning as claimed in claim 9 is characterized in that: wherein this burning test block can further read this memory cell.
18. the method for execution one memory component crystal circle grade burning as claimed in claim 9, it is characterized in that: wherein this array comprises regular unit and redundancy unit, and wherein this burning test block comprises the device of this redundancy unit of startup/termination again.
19. the method for memory component crystal circle grade as claimed in claim 9 burning is characterized in that: a plurality of memory components are set on a wafer, wherein this memory component comprises: the memory cell of an array; And a burning test block, have several inputs, be to be connected with the memory cell of this array, wherein this burning test block comprises: a memory address generator is that the pattern of generation one memory cell address is connected to the memory cell of this array; One data pattern generator is to produce the memory cell that a data bit pattern is connected to this array; An and instruction figure pattern generator; Wherein this burning test block can write to data this memory cell, can start word lines whole in this array, also this array can be remained in the static schema; Survey these inputs of this burning test block on this memory component simultaneously; Utilize this burning test block and mat to write to this memory cell, and these memory components of burning simultaneously in a dynamic way; And utilize this burning test block and mat to write to this memory cell and mat to start all these word lines for the ON state, again this array is remained in this static schema, and with these memory components of mode burning simultaneously of static state.
20. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning is characterized in that: wherein on this memory component, repeat repeatedly in a dynamic way and with the step of the mode burning of static state.
21. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning is characterized in that: wherein this memory cell is one of to be selected from the group that is made up of SRAM and DRAM.
22. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning is characterized in that: wherein this burning test block can further read this memory cell.
23. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning, it is characterized in that: wherein this array comprises regular unit and redundancy unit, and wherein this burning test block comprises the device of this redundancy unit of startup/termination again.
24. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning is characterized in that: wherein this in a dynamic way the step of these memory components of burning comprise all this memory cells write to " 0 " and all these memory cells are write to " 1 ".
25. the method for a plurality of memory component crystal circle grade of execution as claimed in claim 19 burning is characterized in that: wherein this in a dynamic way the step of these memory components of burning comprise all this memory cells are write to and comprise one of a series of " 0 " and " 1 " value and check an edition pattern.
CNB031530206A 2003-07-30 2003-07-30 Crystal circle grade seamless link for memory semiconductor circuit Expired - Lifetime CN100392838C (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6233184B1 (en) * 1998-11-13 2001-05-15 International Business Machines Corporation Structures for wafer level test and burn-in
US6255836B1 (en) * 2000-01-12 2001-07-03 Lsi Logic Corporation Built-in self-test unit having a reconfigurable data retention test
US6259266B1 (en) * 1998-10-27 2001-07-10 Apack Technologies Inc. Testing device and method for known good chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6259266B1 (en) * 1998-10-27 2001-07-10 Apack Technologies Inc. Testing device and method for known good chip
US6233184B1 (en) * 1998-11-13 2001-05-15 International Business Machines Corporation Structures for wafer level test and burn-in
US6255836B1 (en) * 2000-01-12 2001-07-03 Lsi Logic Corporation Built-in self-test unit having a reconfigurable data retention test

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