CN100378735C - Method, system for specifying and using dials having phased default values to configure a simulated or physical digital system - Google Patents
Method, system for specifying and using dials having phased default values to configure a simulated or physical digital system Download PDFInfo
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Abstract
In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a configuration latch having a plurality of different possible configuration values that each corresponds to a different configuration of the functional portion of the digital system. With a statement in the HDL file(s), a Dial entity is associated with the at least one design entity. The Dial has a Dial input, a Dial output, a mapping table indicating a mapping between each of a plurality of possible input values that can be received at the Dial input and a respective corresponding output value for the Dial output, a phase ID and a default input value among the plurality of possible input values. The output value of the Dial entity controls which of the different possible configuration values is loaded in the configuration latch and the phase ID indicates a phase during which the default input value is to be applied.
Description
Technical field
The present invention relates generally to design, simulation and configuration digital device, module and system, particularly be used to adopt the method and system of computer-aided design (CAD), simulation and configuration of digital device, module and the system of hardware description language (HDL) model description.
Background technology
In the Typical Digital design process, the logical correctness of checking digital Design and (in case of necessity) debugged in design is important step in exploitation performed design process before the circuit layout.Though might test digital Design by the actual implementation digital Design really, but digital Design particularly adopts those digital Design that integrated circuit realizes typically to verify and debug that by analog digital design on computers this is that part is because integrated circuit is made required time and spending.
In the automatic design process of typical case, the hardware description language of circuit designers utilization such as VHDL (HDL) is described the high level of analog digital design and is entered robot calculator Aided Design (ECAD) system, thereby produces the numeral of various circuit blocks and interconnection thereof.In this numeral, overall circuit design often is divided into the smaller portions of design separately by different designs person continually, below it is called design entity, with layered mode it is made up to create overall model then.This hierarchical design technology be useful on very much the management overall design bulky complex and help to simulate during error-detecting.
The ECAD system is compiled into the analogy model with the form that is suitable for simulating most with the numeral of design.Then, simulator is carried out this analogy model to detect the logic error in the digital Design.
Simulator works in Software tool on the analogy model by the input stimulus that applies the input of a series of representative digital display circuits typically.Simulator produces the numeric representation to the circuit response of input stimulus, and then, this response can be used as a series of values and checks on display screen, perhaps often is further explained by different software procedures and is presented on the display screen with graphic form.Simulator can run on other electronic equipments that multi-purpose computer or specialized designs become to be used to simulate.On multi-purpose computer, adopt the simulator of running software to be called fully " software simulator ", and the simulator that moves under the help of custom-designed electronic equipment is called " hardware simulator ".
Along with digital Design becomes complicated day by day, for example function, logic and circuit level patrix are intended digital Design at some abstraction hierarchies usually.On functional hierarchy, system operation is to describe according to the transaction sequence between register, totalizer, storer and other functional units.Simulation on the functional hierarchy is used for verifying the high level design of digital display circuit.On logical level, digital display circuit is described according to logic element such as logic gate and trigger.Simulation on the logical level is used for the correctness of verifying logic design.On the circuit level, each logic gate is to describe as transistor, impedance, electric capacity and the device other according to its circuit elements device.Simulation on the circuit level provides the details of relevant voltage level and switching speed.
In order to verify the result of any given dry run, the program of the customized development that employing higher level lanquage such as C or C++ write is write, and to handle input stimulus (being also referred to as test vector) to produce the expected results of dry run, wherein this program is called reference model.Then, by simulator contrast Simulation execution model running test vector.Then, with the dry run result with compare by the reference model prediction result, be flagged as wrong difference with detection.This mock survey is called " end-to-end " and checks in the verification technique field.
In modern data processing system especially large server class computer system, must be loaded the latch number of operating (or simulation) with configuration-system significantly increases.The reason that configuration latch increases is that a lot of chips are designed to support a plurality of different configurations and operator scheme, so that improve manufacturer's rate of profit and simplified system design.For example, Memory Controller needs a large amount of configuration informations usually, with the storage card of dissimilar, size and operating frequency interface correctly.
Second reason that configuration latch increases is the transistor budget (budget) that increases day by day in processor and other integrated circuit (IC) chip.Frequently, available extra transistor is exclusively used in the reproduction replica of existing capability unit so that improve fault-tolerance and concurrency in the chip of future generation.Yet, owing to do not reduce with being directly proportional, therefore concentrate the configuration latch of all similar functions unit to be considered usually and do not expect with the raising of the operating frequency of function logic via the transmission delay of chip intraconnections.Therefore, even all examples of copy function are carried out identical configuration continually, each example often still adopts its oneself configuration latch copy to design.Like this, configuration only has the operating parameter (for example, the ratio between Bus Clock Rate and the processor clock frequency) of some effective values can relate to hundreds of configuration latch in the set handling device chip.
Traditionally, configuration latch and permissible range value thereof are by creating and safeguarding that loaded down with trivial details and error-prone paper spare document comes appointment.The combine fact that causes of the difficulty effort required with configuration latch is set of safeguarding accurate configuration documentation is that different departments (for example, functional simulation group, experimental debugging group and one or more client's firmware group) in a company often develop configuration software separately according to configuration documentation.Because configuration software is by the separately exploitation of each department, so each group may introduce its oneself mistake, and adopts its oneself term and naming convention.Therefore, by the configuration software of exploitation is not incompatible on the same group, and can not be easily do not sharing between on the same group.
The aforesaid drawbacks in exploitation configuration code process, the coding of conventional arrangement software also is extremely loaded down with trivial details.Specifically, being used for to the vocabulary that each configuration bit is filed often is suitable trouble.For example, at least some were realized, configuration code was necessary for each configuration latch bit and specifies complete latch title, and it can comprise 50 or more ascii characters.In addition, must specify effective pattern of binary bits of each configuration latch group separately.
In view of this, the present invention recognizes provides a kind of improvement type method that disposes the digital display circuit that adopts the HDL model description, particularly allows with logical course specified configuration information with fair amount input, will be useful and desired relating to the improvement type method of sharing this configuration information between the design of digital display circuit, simulation and commercial each organization department that realizes then.
Summary of the invention
Improvement type method, the system and program product of the configuration of the set that is used to specify digital display circuit such as integrated circuit or interconnecting integrated circuit are disclosed.According to a kind of method, decide at least one at least one hardware definition language (HDL) document and comprise the design entity of the funtion part of digital display circuit.Design entity logically comprises the configuration latch with a plurality of different possible configuration values, and wherein each different possible configuration value is separately corresponding to the difference configuration of the funtion part of digital display circuit.Adopt the statement in the hdl file, Dial (dial) entity is associated with at least one design entity.Dial has Dial input, Dial output, mapping table, Phase I D and a plurality of default input value in may input value, wherein mapping table represent can receive in the Dial input a plurality of may input values each with each corresponding output valve of Dial output between mapping.In the different possible configuration values which be the output valve of Dial entity control and be loaded in the configuration latch, and Phase I D indicates to apply the stage of default input value.
All purposes of the present invention, characteristic and advantage will become clear in the detailed written description below.
Description of drawings
To the detailed description of illustrative embodiment, the present invention and preferred use-pattern will obtain best understanding when reading below in conjunction with accompanying drawing by reference, wherein:
Fig. 1 is the high-level block diagram that can be used to realize data handling system of the present invention;
Fig. 2 is the diagram that adopts the design entity of HDL code description;
Fig. 3 illustrates the exemplary digital design of the design entity that comprises a plurality of hierarchical arrangements;
Fig. 4 A illustrates according to embedding the exemplary hdl file that statement is specified in configuration of the present invention comprising;
Fig. 4 B illustrates according to the exemplary hdl file that embeds the configuration file reference statement that comprises of the present invention, wherein embeds the configuration file reference statement and quotes the exterior arrangement file that comprises configuration appointment statement;
Fig. 5 A is the diagram according to LDial primitive of the present invention (primitive);
Fig. 5 B illustrates the exemplary digital design that comprises the design entity of a plurality of hierarchical arrangements according to of the present invention, and wherein LDial is by instantiation;
Fig. 5 C illustrates the exemplary digital design of the design entity that comprises a plurality of hierarchical arrangements, and wherein LDial is used for configuration signal state on a plurality of different levels of design hierarchy;
Fig. 5 D is the diagram according to switch of the present invention;
Fig. 6 A is the diagram according to IDial of the present invention;
Fig. 6 B is the diagram that has the IDial of division (split) output according to the present invention;
Fig. 7 A is the diagram that is used for controlling the CDial of other Dial according to the present invention;
Fig. 7 B illustrates the exemplary digital design of the design entity that comprises a plurality of hierarchical arrangements, wherein adopts CDial to control to be used for the low layer Dial of configuration signal state;
But Fig. 8 is the high-level flow that is used for producing the simulation execution model and the model construction process of related analog configuration database according to the present invention;
Fig. 9 A illustrates the part of digital Design, and it illustrates by what the configuration compiler was realized recalls the mode that (traceback) process detects the phase inverter in the signal path between configuration signal and the associated configuration latch;
Fig. 9 B is according to the preferred embodiment of the present invention, by the high-level flow of the exemplary trace-back process that disposes the compiler realization;
Figure 10 is according to the preferred embodiment of the present invention, and the configuration compiler is resolved the logic high level process flow diagram that the illustrative methods of each interior signal of statement or Dial sign is specified in configuration;
Figure 11 A illustrates the diagram of Dial group;
Figure 11 B illustrates the exemplary simulated model that comprises the Dial that organizes into groups with the Dial group of a plurality of hierarchical arrangements;
Figure 12 illustrates the exemplary embodiment according to analog configuration database of the present invention;
Figure 13 is the logic high level process flow diagram that launches the illustrative method of (expand) configuration database according to the present invention in the volatile memory of data handling system;
Figure 14 is the block scheme that illustrates according to the content of volatibility system storage during the dry run of analogy model of the present invention;
The logic high level process flow diagram of the illustrative methods of the one or more Dial instance data structures in location (DIDS) in example qualifier that Figure 15 is in API Calls to be provided and Dial title (dialname) configuration database that qualifier identified;
Figure 16 A is the logic high level process flow diagram that reads the illustrative method of Dial example according to the present invention during the digital Design simulation in interactive mode;
Figure 16 B is the logic high level process flow diagram that reads the illustrative methods of Dial group example according to the present invention during the digital Design simulation in interactive mode;
Figure 17 A is the logic high level process flow diagram that the illustrative method of Dial example is set in interactive mode during the digital Design simulation according to the present invention;
Figure 17 B is the logic high level process flow diagram that the illustrative methods of Dial group example is set in interactive mode during the digital Design simulation according to the present invention;
Figure 18 A is the logic high level process flow diagram that the illustrative method of Dial example or Dial group example is set in batch mode during the digital Design simulation according to the present invention;
Figure 18 B is the more detail flowchart of the end phase API that calls in the process shown in Figure 18 A;
Figure 18 C is the block scheme of data handling system environment, wherein can utilize program to visit and revise configuration database, so that specify the stage that applies default value;
Figure 19 is the block scheme that illustrates according to exemplary experiment test macro of the present invention;
Figure 20 is the more more detailed block diagram that forms the integrated circuit (IC) chip in the data handling system of a part of experiment test system of Figure 19;
Figure 21 is used for the converting analogue configuration database is applicable to the illustrative process of the hard-wired chip hardware database that disposes digital Design with acquisition high-level flow;
Figure 22 A be according to the present invention the conversion configurations database with the logic high level process flow diagram of the illustrative methods that obtains the chip hardware database;
Figure 22 B illustrates after the transfer process shown in Figure 22 A, the illustrative embodiment of the latch data structure in the chip hardware database;
Figure 23 A is loaded into the logic high level process flow diagram of the illustrative methods the volatile memory with hardware configuration database from Nonvolatile memory devices, and this method support is used hardware configuration database with the digital display circuit of any size or configuration;
Figure 23 B illustrates the exemplary embodiment of the hardware configuration database of digital display circuit according to an embodiment of the invention;
Figure 24 is a logic high level process flow diagram of discerning the illustrative methods of one or more Dial examples in the digital display circuit relevant with API Calls or Dial group example by the reference hardware configuration database;
Figure 25 can be compressed to carry out the logic high level process flow diagram of the commercial example process of implementing at the hardware configuration database that the experimental development of system firmware and test period are developed;
Figure 26 A-26C forms the logic high level process flow diagram that utilizes the illustrative method of software tool of compression compression hardware configuration database according to the present invention together;
Figure 27 is the diagram according to the content of the exemplary configuration database that the present invention includes Dial and read-only Dial;
Figure 28 A-28B illustrates respectively according to one embodiment of the invention and comprises read-only father (parent) field so that support read-only Dial and read-only Dial group in the Dial of configuration database instance data structure and latch data structure;
Figure 29 be will comprise the configuration database of RDial and/or RDial group be deployed into the logic high level process flow diagram of the illustrative methods in the volatile memory;
Figure 30 is the selected state high-level flow of the example process of the malfunction of hardware system particularly that is used to analyze hardware system according to the present invention; And
Figure 31 generates according to the chip analyzer instrument of Figure 30 of the present invention to be used for analyzing the chip configuration report of hardware fault and the logic high level process flow diagram that simulation is provided with the illustrative methods of file.
Embodiment
The present invention has introduced a kind of configuration appointed language that is used for the configuration and the setting of control figure system (for example, one or more integrated circuit or its analogy model) and correlating method, system and program product.In at least one embodiment, adopt the configuration specification of signal in the HDL code establishing digital display circuit by the deviser who is responsible for related design entity.Therefore, can best specification signal title be responsible for creating configuration specification with pass combination method deviser value, that be in the design process front end.Configuration specification is compiled with the HDL that describes digital display circuit in the time of model construction, and to obtain configuration database, this configuration database downstream that can be related to design, simulation and hardware implementation procedure organizes group to utilize then.
Referring now to accompanying drawing accompanying drawing 1 particularly, show exemplary embodiment according to data handling system of the present invention.Illustrated embodiment can be implemented as for example workstation, server or mainframe computer.
As shown in the figure, data handling system 6 comprises one or more processing node 8a-8n, if realized that then these nodes interconnect by node interconnection 22 more than a processing node 8.Each of processing node 8a-8n all can comprise one or more processors 10, local interlinkage 16 and the system storage 18 of visiting by Memory Controller 17.Processor 10a-10m best (but not necessarily) is identical, and can comprise can be from NewYork, the PowerPC that the IBM of Armonk (IBM) company obtains
TMProcessor in the processor products line.Except the register, the instruction stream logical circuit that are expressed as processor core 12 on the whole and the performance element that is used for execution of program instructions, among the processor 10a-10m each also comprises cache memory hierarchy in the chip, and it is used for data from system storage 18 classifications (stage) to association processor core 12.
Among the processing node 8a-8n each also comprises Node Controller 20 separately, and it is coupled between local interlinkage 16 and the node interconnection 22.Each Node Controller 20 is by carrying out the local agent that at least two functions are used as teleprocessing node 8.The first, each Node Controller 20 detecting (snoop) related local interlinkage 16 and help send to teleprocessing node 8 with local communications transaction.The second, the communications transaction on each Node Controller 20 detecting node interconnections 22, and control related communication affairs on the related local interlinkage 16.Communication on each local interlinkage 16 is controlled by moderator 24.The bus request signal that moderator 24 bases are produced by processor 10 is managed the visit to local interlinkage 16, and compiles the coherency response to the communications transaction of being detected on the local interlinkage 16.
Local interlinkage 16 is coupled in mezzanine bus 30 by interlayer (mezzanine) bus bridge 26.Mezzanine bus bridge 26 provides low delay path and high bandwidth path, wherein directly access map is to the memory storage 34 in bus driver and/or I/O address space and the device in the I/O device 32 by this low delay path for processor 10, and I/O device 32 and memory storage 34 is by the addressable system storage 18 of this high bandwidth path.I/O device 32 can comprise for example display device, keyboard, graphical indicators and be used to be connected to external network or connect the serial and the parallel port of device.Memory storage 34 can comprise CD or the disk that non-volatile memories for example is provided for operating system, middleware and application software.In the present embodiment, this application software comprises ECAD system 35, and it can be used to develop, verify and simulate the Design of Digital Circuit according to the inventive method and system.
The analog and digital circuit of utilizing ECAD system 35 to create designs a model and comprises at least one and normally a plurality of subelements, and these subelements will be known as design entity below.Referring now to Fig. 2, show the block scheme of the exemplary design entity 200 that can utilize 35 establishments of ECAD system.Design entity 200 is by following a plurality of component definitions: the expression of entity title, entity port and the function carried out by design entity 200.Each design entity in the given model has sole entity title (not explicit illustrating among Fig. 2), states during its HDL at design entity describes.And each design entity typically comprises the signal interconnection of the signal outside a plurality of and the design entity, and it is called port.These external signals can be the primary input/output (I/O) of overall design or the signal that is connected to other design entities in the overall design.
Typically, port be classified as belong to following three kinds one of dissimilar: input port, output port and bidirectional port.Design entity 200 is shown as has a plurality of input ports 202 that signal imported into design entity 200.Input port 202 is connected to input signal 204.In addition, design entity 200 comprises a plurality of output ports 206 that signal spread out of design entity 200.Output port 206 is connected to one group of output signal 208.Bidirectional port 210 is used for signal being imported into and spreading out of design entity 200.Bidirectional port 210 is connected to one group of two-way signaling 212 successively.Design entity such as design entity 200 need not to comprise all ports of three types, and do not comprise port under the situation of degenerating.In order to realize being connected of entity port and external signal, utilize the mapping techniques that is called " port mapping ".Port mapping (not explicit illustrating among Fig. 2) comprises the appointment corresponding relation between entity port title and the external signal that this entity is connected.When making up analogy model, utilize ECAD system 35 external signal to be connected to the proper port of entity according to the port mapping standard.
Shown in Fig. 2 was further, design entity 200 comprised the main part 214 of description by one or more functions of design entity 200 execution.Under the situation of digital Design, main part 214 comprises the interconnection of logic gate, memory element etc. and the example body (instantiation) of other entities.By instantiation entity in another entity, realize the hierarchical description of overall design.For example, microprocessor can comprise a plurality of examples of same functional unit.Like this, microprocessor itself often will be modeled as single entity.In the microprocessor entity, a plurality of example bodies of any repeat function entity will be had.
Each design entity is specified by comprising one or more hdl files of describing the required information of design entity.Though the present invention does not do requirement, for the purpose of understanding, will suppose that below each design entity is by separately hdl file appointment.
Referring now to Fig. 3, show in the preferred embodiment of the present invention diagram that can be used for representing the exemplary simulated model 300 of digital Design (for example, integrated circuit (IC) chip or computer system) by ECAD system 35.In order to look simple and clear, not explicit port and the signal that design entity in the interconnect simulation model 300 is shown.
Each example body of design entity has the related description that comprises entity title and example body title, and this is described among all offsprings of direct ancestors' entity must be unique.For example, top layer entity 302 has and comprises entity title 322 (be colon before " TOP "), and comprises the description 320 of example body title 324 (that is " TOP " after the colon).In entity description, when only example of special entity in ancestors' entity during by instantiation, allow the entity name-matches example body title be common.For example, the single instance of the entity B 310 of instantiation and entity C 312 has the entity and the example body title of coupling in each of the example body 304a of FXU entity and 304b.Yet the present invention does not require this naming convention, shown in FPU entity 314 (that is, example body name is called FPU0, and physical name is called FPU).
If it is unique mutually that all entities of single-instancing or multiple example type have the example body title of all the offspring's entities in sole entity title and any direct ancestors' entity, then the entity in other entities in the digital Design is nested can proceed to any complicated level.
What be associated with each design entity example body is so-called " example body identifier ".The example body identifier of given example body is the character string that comprises the closed body example body title that begins from top layer entity instance body title.For example, the design example body identifier of the example body 312a of the entity C 312 in the example body 304a of FXU entity 304 is " TOP.FXU0.B.C ".This example body identifier is used for each the example body in the unique identification analogy model.
As mentioned above, no matter utilize the physics integrated circuit or realize as software model such as analogy model 300, digital Design all typically comprises and is used for disposing digital Design to carry out the configuration latch of proper handling.The separate configurations software of creating after realizing design is different with the prior art method for designing that value is loaded in the configuration latch with adopting, and the present invention has introduced the naturally configuration appointed language of part of a kind of Configuration Values of the digital Design person of permission specification signal as design process.Specifically, configuration appointed language of the present invention allows to utilize the statement (shown in Fig. 4 A) in the one or more hdl files that are embedded in the designation number design or is embedded in statement (shown in Fig. 4 B) specified design configuration in one or more exterior arrangement files of being quoted by one or more hdl files of designation number design.
Referring now to Fig. 4 A, show according to exemplary hdl file 400 of the present invention, be the VHDL file in this example, it comprises the configuration statement of embedding.In this example, hdl file 400 is specified the entity A 306 of analogy model 300, and comprise three VHDL code sections, i.e. designated port 202,206 and 210 port list 402, logic and functional design appointment 406 of specifying the signal statement 404 of the signal in the main part 214 and specifying main part 214.Be dispersed within these parts be with the beginning double dash ("--") expression traditional VHDL note.In addition, being embedded in that design specifies in 406 is that statements are specified in one or more configurations according to the present invention, and they are jointly represented by Reference numeral 408 and 410.As shown in the figure, these configurations are specified statements to adopt with the special note form of "--## " beginning and are write, and specify statement and traditional HDL code and HDL note so that allow compiler easily to distinguish configuration.Configuration specifies statement preferably to adopt case-insensitive and blank grammer.
Referring now to Fig. 4 B, show according to exemplary hdl file 400 ' of the present invention, it comprises quoting the exterior arrangement file that comprises one or more configurations appointment statements.As apostrophe (') shown in, quoted the configuration file reference statement 412 of the separate configurations file 414 that comprises configuration appointment statement 408,410 except configuration appointment statement 408,410 substitutes for one or more (only being one in this example), hdl file 400 ' all is same as hdl file 400 in all fields.
Configuration file reference statement 412 is specified statement as the embedding shown in Fig. 4 A configuration, is identified as the configuration statement by identifier "--## ".Configuration file reference statement 412 comprises instruction (directive) " cfg_file ", the filename (i.e. " file00 ") of its indication compiler location separate configurations file 414 and this configuration file.Configuration file such as configuration file 412 be preferably complete to adopt the name expansion (for example, " .cfg ") that selects files, so as can be easily in the file system that data handling system 6 is adopted location, organization and management they.
As following with reference to Fig. 8 further as described in, no matter be embedded in the hdl file or concentrate in one or more configuration files 414, configuration specifies statement to be handled by compiler together with related hdl file.
According to a preferred embodiment of the invention, specify the configuration of statement (configuration specificationstatement) 408,410 to specify statement to be referred to as one or more examples of the configuration entity of " Dial (dial) " here such as configuration, help dispose the configuration latch in the digital Design by instantiation.The function of Dial is to shine upon between input value and one or more output valve.Generally speaking, the final Configuration Values of specified configuration latch directly or indirectly of this output valve.Each Dial is associated with particular design entity in the digital Design, and this particular design entity is to make Dial be specified the design entity of the HDL source file appointment of statement or configuration file reference statement by the configuration of instantiation by comprising by convention.Therefore, because its related with the particular design entity, wherein these particular design entities all have unique example body identifier, so as long as in any given design entity, adopt unique Dial title, but the interior Dial of unique identification digital Design just.Should be understood that a lot of dissimilar Dial can define with latch Dial (or " LDial ") beginning.
Referring now to Fig. 5 A, show the expression of exemplary L Dial 500.In this specific examples, the LDial 500 with title " bus ratio (bus ratio) " is used for coming the value of the configuration latch in the designation number design according to the input value of enumerating of the selected ratio between expression assembly clock frequency and the Bus Clock Rate.
As shown in the figure, LDial 500 mapping table 503 of output valve that logically has single input 502, one or more output 504 as all Dial and each input value is mapped to each output 504 of each auto correlation.Just, mapping table 503 is specified the mapping one by one between unique output valve of each and each auto correlation of one or more unique input values.Because the function of LDial is the legal value of specifying configuration latch, so each output 504 control logically of LDial 500 is loaded into the value in each configuration latch 505.For the configuration of avoiding a conflict, each configuration latch 505 by one and only the Dial that any kind of configuration latch 505 can be set directly specify.
In input 502, LDial 500 receives and enumerates input value (that is character string) in the combined method value that comprises " 2:1 ", " 3:1 " and " 4:1 ".Enumerate input value and can adopt software (for example) directly to provide, perhaps can provide by the output of another Dial by software simulator or service processor firmware, as following with reference to Fig. 7 A further as described in.Enumerate input value for each, the selected binary value (i.e. " 0 " or " 1 ") of mapping table 503 each configuration latch 505 of expression of LDial 500.
Referring now to Fig. 5 B, show the diagram of the analogy model that logically comprises Dial.Analogy model 300 ' among Fig. 5 B shown in apostrophe comprises the same design entity of arranging with the hierarchical relational identical with the analogy model 300 of Fig. 3, and this analogy model 300 ' illustrates two characteristics of Dial, promptly duplicates (replication) and scope.
Duplicate that automatic instantiation when being the related design entity of each instantiation is specified or by the process of its Dial that quotes in the hdl file of design entity.Duplicate and advantageously reduced the data input quantity that the deviser need carry out for a plurality of same instance of creating Dial.For example, for six examples of the LDial shown in instantiation Fig. 5 B, the deviser only need utilize in two kinds of technology shown in Fig. 4 A and the 4B any to two LDial configuration specify statements to encode.Just, the deviser specifies statement (or configuration file reference statement of sensing associated configuration file) to be encoded in the hdl file of design entity A 306 LDial configuration, so that LDial 506a0,506a1,506b0 and 506b1 in example body 306a0,306a1,306b0 and the 306b1 of the automatic instantiation entity A of difference.The deviser specifies statement (or configuration file reference statement of sensing associated configuration file) to be encoded in the hdl file of design entity FXU304 the 2nd LDial configuration, so that the example body 304a of the automatic instantiation FXU entity of difference and LDial 510a and the 510b in the 304b.Then, when compiler duplicates related design entity, create a plurality of examples of LDial automatically.Must manually in configuration software, enumerate the art methods of each configuration latch value with the deviser separately and compare, in digital Design, duplicate Dial and can therefore alleviate deviser's input burden greatly.Should be noted in the discussion above that duplication characteristic not necessarily requires all examples of Dial to generate identical output valve; The different instances of identical Dial can be configured to generate different outputs by different inputs are provided to them.
" scope " of Dial is defined as Dial citable entity set in it is specified at this.By convention, the scope of Dial comprises the Dial design entity related with it (promptly, make Dial be specified the design entity of the HDL source file appointment of statement or configuration file reference statement by the configuration of instantiation by comprising) and be included in the interior any design entity (that is, related design entity and offspring thereof) of related design entity.Therefore, Dial is not subject at it and works on by the design hierarchy levels of instantiation, but also can be on any low layer of the design hierarchy in its scope the specified configuration latch.For example, LDial 510a and 510b even be associated with the example body 304a and the 304b of FXU entity respectively, also can distinguish the example body 312a of designated entities C and the configuration latch in the 312b.
Fig. 5 B illustrates LDial another key property of (with other Dial of direct specified configuration latch).Specifically, shown in Fig. 5 B summary, get used in the hdl file deviser of specification signal and be allowed to specify and specify the signal condition that is provided with by Dial in the statement and leave no choice but be loaded into value in " upstream " configuration latch of determining signal condition in configuration.Therefore, in specifying LDial 506, the deviser can specify possible signal condition for the signal 514 that is provided with by configuration latch 512.Similarly, in specifying LDial 510, the deviser can specify possible signal condition for the signal 522 that is provided with by configuration latch 520.Not only to think deeply the customary way of digital Design consistent with the deviser for the ability of specification signal state and nand latch value, and reduce the possible errors of introducing owing to the existence of the phase inverter between configuration latch 512,520 and the signal of interest 514,522, will do further to discuss to this below.
Referring now to Fig. 5 C, show another diagram of the analogy model that comprises LDial.Shown in apostrophe, the analogy model 300 of Fig. 5 C " comprise the same design entity of arranging with the hierarchical relational identical with the analogy model 300 of Fig. 3.
As shown in the figure, the analogy model 300 of Fig. 5 C " comprise the LDial524 related with top layer design entity 302.LDial 524 specifies the signal condition of each the signal sig1 514 that is determined by configuration latch 512 separately, the signal condition of each the signal sig2 522 that determines by configuration latch 520 separately, the signal condition of the signal sig4 532 that determines by configuration latch 530, and the signal condition of the signal sig3 536 that determines by configuration latch 534.Therefore, the signal condition of the numerous unlike signals of LDial 524 configuration, it is all in the hierarchy levels of LDial 524 (being positioned at top layer) or it is down by instantiation.
As top with reference to as described in Fig. 4 A and the 4B, specify statement or quote the configuration file reference statement of the separate configurations file that comprises the configuration appointment statement of specifying LDial 524 by the configuration of in the hdl file of top layer entity 302, embed specifying LDial 524, at analogy model 300 " top layer entity 302 in instantiation LDial 524.Under any circumstance, it is as follows that the exemplary configuration of LDial 524 is specified statement:
LDial?bus?ratio(FXU0.A0.SIG1，FXU0.A1.SIG1，
FXU0.B.C.SIG2(0..5)，
FXU1.A0.SIG1，FXU1.A1.SIG1，
FXU1.B.C.SIG2(0..5)，
FPU0.SIG3，SIG4(0..3)
)＝
{2:1＝＞0b0，0b0，0x00，
0b0，0b0，0x00，
0b0，0x0；
3:1＝＞0b1，0b1，0x01，
0b1，0b1，0x01，
0b0，0x1；
4:1＝＞0b1，0b1，0x3F，
0b1，0b1，0x3F，
0b1，0xF
}；
The exemplary configuration that provides above specifies statement to start from key word " LDial ", and it specifies the type of the Dial that is stated is LDial, and is the Dial title of " bus ratio (bus ratio) " in this example.Next step, this configuration specifies statement to enumerate the signal name of its state by LDial control.As implied above, the signal identifiers of each signal is specified (for example, being FXU0.A0.SIG1 for signal 5 14a0) with respect to the default range of related design entity with layered mode, makes that the unlike signal example with same signal title is differentiable.After enumerating signal identifiers, this configuration specifies statement to comprise to list that allowing of LDial enumerated input value and each enumerates the mapping table of the respective signal value of input value.These signal values implicitly are associated with signal name by the order of statement signal name.Should be noted in the discussion above that once more the signal condition for all enumerator appointments is unique, and represent signal condition jointly legal pattern only arranged.
Can adopt some different grammers to come the specification signal state.In the example that provides in the above, have the binary format of binary constant of prefix " 0b " or the hexadecimal format that appointment has the hexadecimal constant of prefix " 0x " with appointment and come the specification signal state.Though not shown, signal condition also can adopt integer data format to specify, and in this case, does not adopt prefix.For the purpose of the data input, the configuration appointed language of ECAD system 35 is preferably also supported the serial connection grammer, wherein adopts the serial connection of automatically representing all expected signal value with a constant value of initial zero expansion.Adopt this string by grammer, be associated with all serial connection bit modes of zero in order to enumerate input value 2:1, be associated with ' 0b110000011100000100001 ' serial connection bit mode will enumerate input value 3:1, and will enumerate input value 4:1 and be associated with all serial connection bit modes of 1, the configuration that provides above specifies statement to be rewritten into:
{2:1＝＞0，
3:1＝＞0x183821，
4:1＝＞0x1FFFFF
}；
Referring now to Fig. 5 D, show the diagram of the special circumstances of the LDial with a bit output, this LDial is defined as switch (Switch) here.As shown in the figure, switch 540 has the single 1 bit output 504 of setting of single input 502, control configuration latch 505 and each that can receive in input 502 are enumerated the mapping table 503 that input value is mapped to the 1 bit output valves that drive in output 504.
Because switch is included in the overwhelming majority of the Dial that adopts in the digital Design continually, if therefore in the digital Design analogy model enumerator set of all switches are identical (for example, " conducting "/" shutoff "), then be best.In the exemplary embodiments of switch, " just " enumerated input value (for example, " conducting ") and is mapped to the output valve of 0b1 by mapping table 503, and " bearing " enumerates the output valve that input value (for example, " shutoff ") is mapped to 0b0.In order to help to use the logic of opposite polarity, preferably also support negative switch or NSwitch statement, it makes input value opposite with this default corresponding relation between the output valve in mapping table 503.
The major advantage of definition switch primitive (Switch primitive) is to reduce deviser's required input.Specifically, in order to specify comparable 1 bit LDial, statement is specified in the configuration that requires the deviser to import following form:
LDial?mode(signal)＝
{ON＝＞b1；
OFF＝＞b0
}；
On the other hand, the switch of carrying out identical function can adopt following configuration to specify statement to specify:
Switch?mode(signal)；
Though the data input quantity by using switch to eliminate when only considering single switch is not remarkable especially, during thousands of switch, it is significant that total data are imported minimizing in considering the complex digital design.
Referring now to Fig. 6 A, show the diagram of integer Dial (" IDial ") according to the preferred embodiment of the invention.As LDial, IDial directly specifies the value in each that is loaded into one or more configuration latch 605 by be illustrated in the corresponding relation between the output valve of importing 602 each input value that receives and each output 604 in mapping table 603.Yet, be different from can only be received in its mapping table 503 explicit list enumerate the LDial of input value as legal input value, the legal input value set of IDial comprises that the institute in the bit size of output 604 might round values.(the input round values that comprises the few bit of the bit size of specific output 604 aligns right, and expands to fill all available bits with zero).Owing to enumerate institute in mapping table 603 might the integer input value be inconvenience and loaded down with trivial details, so mapping table 603 is illustrated in the mode that the integer input values of importing 602 receptions are applied in one or more outputs 604 simply.
IDial is being suitable for ideally that one or more many bit register must be initialised and the number of legal value comprises the application of most numerical value of register.For example, if comprise 4 bit configuration registers of 4 configuration latch and comprise that 11 bit configuration registers of 11 configuration latch all are configured to utilize LDial, then the deviser must be in the mapping table of LDial explicit enumerating up to 2
15Individual input value and corresponding output bit mode.The configuration below utilizing of this situation specifies the IDial of statement to handle much then simple:
IDial?cnt_value(sig1(0..3)，sig2(0..10))；
Specify in the statement in above-mentioned configuration, " IDial " statement configuration entity is IDial, " cnt_value " is the title of IDial, and " sig1 " is the 4 bit signals output of 4 bit configuration registers, and " sig2 " is 11 bit signals that are coupled in 11 bit configuration registers.In addition, to be used for disposing the 4 bit configuration registers that are associated with sig1 with the ordering of each bit that is associated of sig1 and sig2 and 4 high order bits that number is represented the integer input value, and 11 low-order bit will be used for disposing the 11 bit configuration registers that are associated with sig2.Importantly, though which bit route (route) of mapping table 603 expression integer input values does not have the explicit corresponding relation between input value and the output valve to which output in mapping table 603.
IDial also can be used to specify identical value for a plurality of replicated setup registers, shown in Fig. 6 B.In the embodiment shown, the IDial 610 that can be described to IDial " splitter (splitter) " specifies each to include configuration based on three groups of replicated setup registers of 15 configuration latch 605 of single 15 bit integer input values.The exemplary configuration that is used for instantiation IDial 610 specifies statement followingly to provide:
IDial?cnt_value(A0.sig1(0..7)，A0.sig2(8..14)；
A1.sig1(0..7)，A1.sig2(8..14)；
A3.sig1(0..7)，A3.sig2(8..14)
)；
Configuration is in the above specified in the statement, and " IDial " statement configuration entity is IDial, and " cnt_value " is the title of IDial.After the IDial title be with branch ("; ") three range field separating.Each range field is represented to import integer-valued bit and how to be applied in signal specific.For example, first range field specifies 8 high order bits of integer input value will be used for disposing the 8 bit configuration registers that are associated with signal A0.sig1, and 7 low-order bit will be used for disposing the 7 bit configuration registers that are associated with A0.sig2.Corresponding configuration register in the second and the 3rd range field specified design entity A 1 and the A3 will be disposed similarly.Importantly, as long as total bit number of appointment is identical in each range field, just can in each range field, differently distribute the integer input bit.
Though the configuration of digital Design can utilize LDial separately or utilize LDial and IDial specifies fully, under many circumstances, does like this and will be poor efficiency and inconvenience.Specifically, for the layering digital Design shown in Fig. 5 C, use LDial and/or IDial will force the high level of a lot of Dial separately to the design hierarchy, from the viewpoint of tissue, it may be to be responsible for comprising by the different designs person of the design entity of the configuration latch of Dial control or the responsibility of design team.Like this, the correct configuration of configuration latch will not only require great the organizing and coordinating between the design team, the details that also requires to be responsible for deviser's understanding of digital Design high level and comprise the configuration of relevant low layer design entity in their hdl file.And, the high level of hierarchy realize Dial mean can not the separate analogue hierarchy low layer because the Dial of the configuration of control low layer design entity is not included in the low layer design entity itself.
In view of afore-mentioned, the layering combination that the present invention recognizes the Dial that provides support to be allowing the low layer by low layer Dial configuration design hierarchy, and controls the effectiveness of low layer Dial by one or more high-rise Dial.Configuration appointed language of the present invention is called control Dial (" CDial ") to the high-rise Dial of the one or more low layer Dial of control.
Referring now to Fig. 7 A, show diagram according to CDial 700a of the present invention.CDial 700a is as all Dial, the mapping table 703 of output valve that preferably has single input 702, one or more output 704 and each input value is mapped to each output 704 of each auto correlation.The not direct specified configuration latch of the LDial and the IDial that are different from direct specified configuration latch, CDial 700.On the contrary, CDial 700 controls logically are coupled in one or more other Dial (being CDial and/or LDial and/or IDial) of CDial 700 with n road " Dial tree ", wherein each low layer Dial forms at least a portion of " branch ", and it finally ends at " leaf " of configuration latch.The Dial tree preferably is configured to do not have Dial by the instantiation secondary in any Dial tree.
In the exemplary embodiment that Fig. 7 A provides, CDial 700a input 702 receive comprise " A " ..., enumerate input value (being character string) in the combined method value of " N ".If CDial 700a (or LDial or IDial) be top layer Dial (that is, and in Dial tree its " on " do not have a Dial), then CDial700a directly receives from software (for example, simulation softward or firmware) and enumerates input value.Perhaps, if CDial700a forms the part of Dial tree " branch ", then CDial 700a enumerates input value from the output reception of another CDial.For importing 702 each legal input value of enumerating that receives, CDial 700a selectes enumerator or bit value for Dial (for example, Dial 700b, the 500 and 600) appointment that each connected in mapping table 703.Make an explanation by ECAD system 35 with the type of the value of each output in 704 mapping tables that are associated 703 according to the low layer Dial that is coupled in output 704.Just, for the value of LDial and CDial appointment is interpreted as enumerator, and be that the value of IDial appointment is interpreted as round values.Adopt these values, Dial 700b, each final value of directly or indirectly specifying one or more configuration latch 705 of 500 and 600.
Referring now to Fig. 7 B, show another diagram of the analogy model that comprises the Dial tree, wherein the Dial tree comprises the top layer CDial that controls a plurality of low layer LDial.Shown in apostrophe, analogy model 300 of Fig. 7 B comprise the same design entity of arranging with the hierarchical relational identical with the analogy model 300 of Fig. 3, and comprise the analogy model 300 with Fig. 5 C " identical configuration latch and correlation signal.
As shown in the figure, analogy model 300 of Fig. 7 B comprise the top layer CDial 710 that is associated with top layer design entity 302.Analogy model 300 also comprise four LDial 712a, 712b, 714 and 716.The signal condition of each signal sig1 514a that the LDial 712a that is associated with entity instance body A0 304a control is determined by configuration file 512a separately, and the signal condition of the signal sig2 522a that determines by configuration latch 520a.Be associated with entity instance body A1 304b, control the signal condition of each the signal sig1 514b that determines by configuration latch 512b separately similarly as the LDial712b of LDial 712a duplicate, and the signal condition of the signal sig2 522b that determines by configuration latch 520b.The LDial 714 that is associated with top layer entity 302 controls the signal condition of the signal sig4 532 that is determined by configuration latch 530.At last, the LDial 716 that is associated with entity instance body FPU0 314 controls the signal condition of the signal sig3 536 that is determined by configuration latch 534.Each of these four LDial is controlled by the CDial 710 that is associated with top layer entity 302.
As top with reference to as described in Fig. 4 A and the 4B, each of the CDial 710 shown in Fig. 7 B and four LDial all by the hdl file at related design entity be embedded in configuration specify statement (perhaps point to and comprise the configuration file reference statement that the configuration file of statement is specified in configuration) in related design entity by instantiation.Being used for the exemplary configuration of each Dial shown in instantiation Fig. 7 B specifies that statement is following to be provided:
CDial?BusRatio(FXU0.BUSRATIO，FXU1.BUSRATIO，FPU0.BUSRATIO，
BUSRATIO)＝
{2:1＝＞2:1，2:1，2:1，2:1；
3:1＝＞3:1，3:1，3:1，3:1；
4:1＝＞4:1，4:1，4:1，4:1
}；
LDial?BusRatio(A0.sig1，A1.sig1，B.C.sig2(0..5))＝
{2:1＝＞0b0，0b0，0x00；
3:1＝＞0b1，0b1，0x01；
4:1＝＞0b1，0b1，0x3F；
}；
LDial?BusRatio(sig3)＝
{2:1＝＞0b0；
3:1＝＞0b0；
4:1＝＞0b1
}；
LDial?BusRatio(sig4(0..3))＝
{2:1＝＞0x0；
3:1＝＞0x1；
4:1＝＞0xF
}；
By realizing layering Dial tree by this way, some advantages have been realized.The first, because duplicating automatically of LDial 712 allows only to import the code of once specifying LDial712 in FXU entity instance body 304a and the 304b, therefore reduced the software code amount of necessary input.The second, by the interior signal configures of design entity that allows each deviser (or design team) to specify him to be responsible for, observe the organizational boundaries of design process.The 3rd, the coding of high-rise Dial (being CDial 710) is greatly simplified, thereby has reduced wrong possibility.Therefore, for example, the CDial of appointment and LDial set is carried out and top " greatly " LDial identical functions with reference to Fig. 5 C appointment on the next-door neighbour, but complicacy reduces greatly in any one Dial.
A lot of Dial for example are used for the switch of under the situation that detects the mistake that can not correct forbidding particular design entity, all have the specific input value that Dial should have in nearly all situation.For such Dial, configuration appointed language of the present invention allows deviser's explicitly to specify the default input value of specifying Dial in the statement in configuration.In the exemplary embodiment, by after the appointment of Dial and finish to comprise before the branch that "=default value " specify default value.For example, the default value of CDial can followingly provide:
CDial?BusRatio(FXU0.BUSRATIO，FXU1.BUSRATIO，FPU0.BUSRATIO，
BUSRATIO)＝
{2:1＝＞2:1，2:1，2:1，2:1；
3:1＝＞3:1，3:1，3:1，3:1；
4:1＝＞4:1，4:1，4:1，4:1
}＝2:1；
Should be noted in the discussion above that for CDial and LDial the default value that requires appointment is that general (that is, except switch) is listed in one of legal enumerator in the mapping table.For switch, default value must be one of predefined enumerator " conducting " and " shutoff ".
The default value of IDial can following similarly appointment:
IDial?cnt_value(A0.sig1(0..7)，A0.sig2(8..14)；
A1.sig1(0..7)，A1.sig2(8..14)；
A3.sig1(0..7)，A3.sig2(8..14)
)＝0x7FFF；
In this case, the constant that can adopt sexadecimal, the decimal system or binary format to provide provides the default output valve by each signal of IDial control.For specified constant being put on represented signal, delete as required and cut high order bit or fill zero to it.
Configuration appointed language of the present invention also allows to control the time that applies specific default value.The control example that applies default value is as in simulation or to adopt hardware to carry out in the homing sequence of integrated circuit be important.During the starting stage of homing sequence, can start at different time to the clock signal of integrated circuit different piece, thereby mean that the latch in the integrated circuit different piece must be loaded at different time according to the Dial default value of appointment.
According to the present invention, the timing controlled that applies default value is supported with the related of default value by one or more phase identifier (ID).Phase I D is the character string of the mark default value Dial set that should be applied in simultaneously basically.A plurality of Phase I D can be associated with specific Dial to increase dirigibility.For example, in the different system configuration, the homing sequence of forming integrated circuit can be different.Therefore, according to system configuration, during different phase, default value put on that specific Dial may be necessary or desired.
In an example syntax, one or more Phase I D (for example, phaseid0 and phaseid1) can be alternatively in being contained in bracket and the comma separated list that is arranged in after the default statement of Dial declarative statement specify, as follows:
CDial?BusRatio(FXU0.BUSRATIO，FXU1.BUSRATIO，FPU0.BUSRATIO，
BUSRATIO)＝
{2:1＝＞2:1，2:1，2:1，2:1；
3:1＝＞3:1，3:1，3:1，3:1；
4:1＝＞4:1，4:1，4:1，4:1
}＝2:1(phaseid0，phaseid1)；
Be the Dial specified phases ID that do not specify default value mistake preferably, and as mentioned above, the appointment of any Phase I D preferably fully optionally, shown in the exemplary CDial and IDial statement that provide previously.
Many rules are followed in the use of the default value of Dial.The first, can comprise that LDial, IDial (comprising the IDial that has division output) and CDial specify default value for the Dial of any kind.Best, for Dial group (it being discussed), do not support default value below with reference to Figure 11 A-11B.The second, if for a plurality of Dial in the multilayer Dial tree specify default value, the top default value (being included as the default value of top layer Dial appointment) of the Dial that then only exerts one's influence tree each " branch ", and, ignore all the other default values if having.Although there is this rule, also be useful for the low layer Dial in the Dial tree specifies default value, because under the situation of the smaller portions of separate analogue model, also can apply default value as mentioned above.If for the combination of the default value of the low layer Dial appointment of " branch " that form the Dial tree does not correspond to the legal output valve that is provided with into high-rise Dial, then compiler will indicate mistake.The 3rd, when the Dial reception effectively is provided with the input of Dial, cover (override) default value.
By specifying the default value of Dial, the deviser by reduce must explicitly for simulating or the Dial number of hardware configuration setting is simplified the downstream greatly and organized the use of group to Dial.In addition, as following further as described in, the use of default value helps which Dial of audit to be provided with effectively.
Specify the configuration of Dial except definition and specify the grammer of statement, configuration appointed language of the present invention is also supported at least two additional HDL semantic structures: note and attribute are specified statement.The note that can have following form:
BusRatio.comment=" bus ratio Dial is according to selected processor/interconnection frequency ratio arrangement circuit ";
Allow the deviser to be associated with specific Dial title with the arbitrary string that quotation marks are divided.Handle these notes at compile duration, and it is included in the configuration documentation file with reference to as described in Fig. 8 as following, so that the function of explanation Dial, relation and suitably be provided with.
It is statement Property Name and property value and statement that Property Name is associated with specific Dial title that attribute is specified statement.For example, attribute specifies statement can have following form:
BusRatio.attribute(myattribute)＝scom57(0:9)；
In this example, " BusRatio.attribute " states that this statement is with attribute and has " BusRatio " Dial associated attributes appointment statement as its Dial title, " myattribute " is the title of attribute, and " scom57 (0:9) " is the character string of specifying property value.Attribute support customization characteristic and to the language extension of basic configuration appointed language.
Referring now to Fig. 8, show the high-level flow of model construction process, but wherein compiling comprises the hdl file that dispose statement simulation execution model and the analog configuration database with the acquisition digital Design.This process starts from one or more design entity HDL source code file 800, and it comprises configuration appointment statement and/or configuration file reference statement, and comprises one or more configurations appointment reference documents 802 alternatively.HDL compiler 804 is handled hdl files 800 and configuration specified file (configuration specificationfile) 802 (if the words that have), begins and enters all hdl files 800 of describing the mould preparation analog model with recursive fashion from the top layer entity of analogy model.When HDL compiler 804 is handled each hdl file 800, create in the design intermediate file 806 that HDL compiler 804 is produced in storer " mark ", be embedded in the HDL code and by the configuration statement that embeds in any configuration specified file that the configuration file reference statement quotes with sign.
Then, the design intermediate file 806 in the storer is handled by configuration compiler 808 and model construction instrument 810, to finish model construction process.But model construction instrument 810 will design intermediate file 806 and be processed into the simulation execution model 816 that when carrying out the logic function of digital Design is carried out modeling, wherein but simulation execution model 816 can be represented for example part of integrated circuit, whole integrated circuit or module perhaps comprise the digital display circuit of a plurality of integrated circuit or module.Configuration compiler 808 is handled the configuration of mark in design intermediate file 806 and is specified statement, and creates configuration documentation file 812 and configuration database 814 according to these statements.
As mentioned above, configuration appointed language of the present invention advantageously allows the output valve that signal name (for example, " sig1 ") is by reference specified LDial and IDial.As mentioned above, the crucial motivation of this characteristic is that the deviser is often according to operation signal being configured to the signal specific state rather than the configuration association configuration latch is considered.Yet in fact, deviser's expectation may not be directly connected to its signal that is configured to particular state the output of associated configuration latch.On the contrary, the signal that dispose may be coupled in the associated configuration latch by one or more intermediate circuit element such as impact damper and phase inverter.Not to apply to the deviser manually to recall each configurable signal to the associated configuration latch, determine the burden of the appropriate value of configuration latch then, configuration compiler 808 is recalled specification signal automatically to first memory element that is coupled in this signal (being configuration latch), and any necessity of the signal condition value of execution deviser appointment is anti-phase, to obtain to be loaded into the right value in the configuration latch.
Referring now to Fig. 9 A, show the part of the digital Design that comprises LDial 900, wherein the state of a plurality of signal 904a-904e in the design of LDial900 control figure.When configuration compiler 808 is carried out recalling of signal 904a, do not need signal condition anti-phase of deviser's appointment, because signal 904a is directly connected to configuration latch 902a.Therefore, configuration compiler 808 will specify deviser's designated value of statement to store in the configuration database 814 from the configuration of LDial 900, as the value that will be loaded among the configuration latch 902a.Signal 904b does not cause specifying from the configuration of LDial900 deviser's designated value anti-phase of statement similarly to recalling of configuration latch 902b, because the unique medium element between signal 904b and the configuration register 902b is a non-inverting buffer 906.
Configuration latch such as configuration latch 902c and 902d are by comprising the HDL statement person of the being designed instantiation continually of the latch primitive of quoting in the HDL design library in hdl file 800.Respond that this HDL storehouse is quoted and but the latch entity 903a, the 903b that are inserted in the simulation execution model can be included in the HDL code not to deviser's phase inverter of explicit " as seen ", as phase inverter 908,910.But, detect these phase inverters by recalling automatically of configuration compiler 808 execution, thereby prevent possible configuration error.
Therefore, when carrying out the recalling of signal 904c, owing to have phase inverter 908 between signal 904c and the configuration latch 902c, therefore disposed compiler 808 before the Configuration Values with configuration latch 902c is stored in the configuration database 814, anti-phase automatically is deviser's specified configuration value of signal 904c appointment.Yet, when configuration compiler 808 is carried out recalling of signal 904d, although in signal path, have phase inverter 910,914 and impact damper 912, be noninverting because logic lumps together, therefore dispose the signal condition value of the not anti-phase deviser's appointment of compiler 808.Should be noted in the discussion above that disposing compiler 808 can handle the phase inverter of " hiding " such as the phase inverter such as the phase inverter 914 of phase inverter 910 and explicit declaration exactly.
Fig. 9 A illustrates the signal 904e that is coupled in a plurality of configuration latch 902e and 902f by middle and door 916 at last.Detect in trace-back process under the situation of fan-out (fanout) logic between specification signal and the nearest configuration latch, configuration compiler 808 might be according to deviser's specification signal state value of signal 904e, for configuration latch 902e, 902f generate suitable Configuration Values.Yet, if configuration compiler 808 indicates the configuration of LDial 900 and specifies statement to comprise mistake, then be preferred, because the compiler selective value of configuration latch 902e, 902f may influence other circuit that receive Configuration Values from configuration latch 902 in unpredictable mode.
Referring now to Fig. 9 B, wherein show configuration compiler 808 for specify the logic high level process flow diagram of the trace-back process that each signal name of appointment is realized in the statement in configuration.As shown in the figure, this process starts from piece 920, enters piece 922-924 then, and it illustrates configuration compiler 808 anti-phase counting is initialized as zero, locatees the signal by the signal name sign of specifying appointment in the statement in configuration then.
Then, this process enters the circulation that comprises piece 926-936, and its common expression configuration compiler 808 is recalled first latch element of specification signal to the signal path.Specifically, shown in piece 926-930, configuration compiler 808 determines that the next one " upstream " circuit component in the signal path is latch (926), impact damper (928) or phase inverter (930).The ifs circuit element is a latch, and then this process withdraws from circulation and passes to the piece 940 that describes below.Yet the ifs circuit element is an impact damper, and this process passes to piece 934, and it illustrates the configuration compiler and moves on to next upstream circuitry element to be processed, and does not increase anti-phase counting.The ifs circuit element is a phase inverter, and then this process passes to piece 936 and 934, and it illustrates increases anti-phase counting, moves on to next upstream circuitry element to be processed then.By this way, the configuration compiler is recalled specification signal to configuration latch, determines the anti-phase number of times by the signal condition of the realization of the circuit component in the path simultaneously.As mentioned above, if configuration compiler 808 detects the circuit component that is different from impact damper or phase inverter in signal path, then dispose compiler 808 and preferably indicate mistake, shown in piece 946.Then, this process ends at piece 950.
After piece 926 detected configuration latch, configuration compiler 808 determined that anti-phase counting is odd number or even number.Shown in piece 940-944, if anti-phase counting is an odd number, then disposed compiler before value being inserted in the configuration database 814, in deviser's specified configuration value of piece 942 anti-phase these signals.If anti-phase counting is an even number, then before Configuration Values being inserted in the configuration database 814, do not carry out anti-phase.Then, this process ends at piece 950.
As mentioned above, the invention provides a kind of deviser who allows digital display circuit utilizes the configuration statement that is embedded in the HDL design document of describing digital display circuit to come the configuration appointed language of the configuration of designation number system.Configuration statement one or more Dial of instantiation on the digital Design internal logic, it provides the Configuration Values of digital Design in response to specific input.Dial can hierarchical arrangement as the design entity that comprises digital Design.Configuration appointment statement compiles with the hdl file of describing digital Design, but can be accessed with the simulation execution model of configuration digital Design or the configuration database of (after suitably changing) physics realization to produce.Configuration specifies the compiling of statement preferably to support trace-back process, wherein deviser's specified configuration value of inversion signal in response to detecting the odd number phase inverter that is coupled between signal and the associated configuration latch.
Referring again to Fig. 5 C, recall, the exemplary configuration of LDial 524 specifies statement to comprise that signal is enumerated in the bracket of following form:
LDial?bus?ratio(FXU0.A0.SIG1，FXU0.A1.SIG1，
FXU0.B.C.SIG2(0..5)，
FXU1.A0.SIG1，FXU1.A1.SIG1，
FXU1.B.C.SIG2(0..5)，
FPU0.SIG3，SIG4(0..3)
)＝
…
Should be noted that, the scope of the design entity that is associated with it from Dial (by convention, it is that the configuration of instantiation Dial specifies statement or configuration reference statement to be embedded in design entity in its hdl file), configuration specify the signal of statement enumerate part separately, layering and explicitly enumerate the signal identifiers by each signal example of Dial configuration.This grammer is referred to herein as signal identifiers " expression formula fully ".Specify the signal of statement to enumerate in the part or specify the Dial of statement to enumerate in the part to adopt " expression formula fully " grammar request deviser to know and correctly import layered identification symbol in the configuration of LDial or IDial by each example of the signal (or low layer Dial) of Dial control in the configuration of CDial.Therefore, if the new example with same signal (or low layer Dial) joins in the digital Design later on, then statement is specified in deviser's configuration of Dial of must scrutiny quoting other examples of same signal (or Dial), and update signal (or Dial) is enumerated part, to comprise the complete expression formula of initiate example.
Specify the signal (or Dial) of statement to enumerate the required input quantity of part and alleviate code maintenance burden when joining new signal and Dial example in the digital Design in order to reduce input configuration, also support configuration to specify the signal (or Dial) of statement to enumerate " compact expression formula " grammer of part according to ECAD of the present invention system 35.Here, this grammer more specifically is called " compact signal expression " when statement is specified in the configuration that is applied to LDial and IDial, and is called " compact Dial expression formula " when statement is specified in the configuration of quoting CDial.
In the compact expression formula that signal or Dial enumerate, all examples of entity can adopt single identifier to enumerate in the selected scope that its expectation is disposed jointly.For example, in Fig. 5 C, if the deviser wants to dispose jointly for all four example bodies of signal sig1 514, then the deviser can specify all four example bodies in the statement by the configuration that single compact signal expression " [A] .sig1 " enumerates LDial 524, and wherein the project in the square bracket is the title that the entity of signal of interest takes place.In compact expression formula, the scope of the implicit design entity that is associated with it for Dial of the default range of expression formula (being top layer entity 302 in this example).Therefore, identifier " [A] .sig1 " is specified all four the example bodies of the signal sig1 514 in the example body 304 of A entity in the default range of top layer entity 302.
Adopt the range of identifiers of compact expression formula also can narrow down by the explicit selected level of enumerating the design hierarchy.For example, and compact expression formula " FXU1.[A] .sig1 " only quote signal sig1 example body 514b0 and 514b1 in the FXU1 entity instance body 304b, but do not comprise signal sig1 example body 514a0 and the 514a1 of FXU0 entity instance body 304a.
Certainly, when at the high level of design hierarchy only during the single instance of instantiation signal or Dial, compact expression formula and fully expression formula will need about identical input quantity (for example, " FPU0.sig3 " comes id signal sig3 536 to " [FPU] .sig3 ").Yet, should be noted in the discussion above that if afterwards another FPU entity 314 was joined analogy model 300 " in, the compact expression formula of this sign will advantageously be applied to the interior any FPU entity that added afterwards of scope of top layer entity 302.
Utilize compact expression formula, the configuration of LDial 524 specifies the statement now can be more compactly by following rewriting:
LDial?bus?ratio([A].SIG1，[C].SIG2(0..5)，
FPU0.SIG3，SIG4(0..3)
)＝
{2:1＝＞0b0，0x00，0b0，0x0；
3:1＝＞0b1，0x01，0b0，0x1；
4:1＝＞0b1，0x3F，0b1，0xF
}；
If above-mentioned serial connection grammer is applied to mapping table, then mapping table also can be simplified to:
{2:1＝＞0；
3:1＝＞0x821；
4:1＝＞0xFFF
}；
In the serial connection grammer, in mapping table, specify signal value with the corresponding individual bit field of each entity identifier, and irrelevant with the actual entities instance number.For example, all represent by all examples that " [A] .sig1 " comprises with 1 bit of specified configuration value, all represent by all examples that " [C] .sig2 " comprises with 6 bits of specified configuration value, single instance by " FPU0.sig3 " sign is represented with 1 bit of specified configuration value, and the single instance of " sig4 (0..3) " is represented with 4 bits of specified configuration value.Therefore, utilize the serial connection grammer, can adopt 12 bit modes of equal value to specify by 21 bits of LDial 524 appointment together.
Compact Dial expression formula is constructed and is analyzed by compiler in the mode identical with compact signal expression.For example, the configuration of the CDial 710 of Fig. 7 B specifies statement can utilize compact Dial expression formula to come following rewriting:
CDial?BusRatio([FXU].BUSRATIO，[FPU].BUSRATIO，BUSRATIO)＝
{2:1＝＞2:1，2:1，2:1；
3:1＝＞3:1，3:1，3:1；
4:1＝＞4:1，4:1，4:1
}；
Once more, this configuration specify statement advantageously allow the instantiation automatic control of CDial 710 by additional FXU entity 304 or FPU entity 314 joined afterwards among analogy model 300 , name is called any additional LDial of " Busratio ", and need not any code revision.
Referring now to Figure 10, show logic high level process flow diagram according to the illustrative methods of each signal in the configuration compiler 808 parsing configuration appointment statements according to the present invention or Dial sign.As mentioned above, each signal or Dial sign is made of one or more field layerings of separating with period (". ").(for example, " Bus_Ratio ") example title, and front field begins to make scope to narrow down from default range, and wherein default range is the Dial scope of related design entity with it by convention for last field specification signal (for example, " sig1 ") or Dial.
As shown in the figure, this processing starts from piece 1000, enters piece 1002 then, whether its first or current field that configuration compiler 808 definite signals or Dial sign are shown comprises (for example is contained in the interior entity identifier of square bracket, " [A] "), just, whether this sign is compact expression formula.If then this process passes to the piece 1020 that describes below.Whether if not, then dispose compiler 808 is that the last field of this sign determines whether this sign is complete expression formula in first or the current field of piece 1004 by determining this sign.If then signal or Dial are designated complete expression formula, and this process passes to piece 1010.On the other hand, if the current field of this sign is not last field, then disposes compiler 808 current scope is narrowed to the design entity example body that identifies in the current field of this sign, shown in piece 1006.For example, specify the interior sign " FPU0.SIG3 " of statement, then dispose compiler 808 and will make scope narrow to FPU entity instance body 314 from the default range of top layer entity 302 if configuration compiler 808 is being handled the configuration of the CDial 710 of Fig. 7 B.If there is the entity instance body of being represented by the current field of this sign shown in piece 1008, then after shown in piece 1009 current field being updated to next field, this process turns back to piece 1002.Yet, if in current scope, there is not entity instance body, dispose compiler 808 in piece 1032 sign mistakes by current field appointment, and the processing of termination signal or Dial sign.
Get back to piece 1004 once more, when configuration compiler 808 detects it when reaching the last field of complete expression formula, process shown in Figure 10 passes to piece 1010 from piece 1004.Piece 1010 illustrates configuration compiler 1010 and attempts in current scope individual signals or the Dial example that the title of its title of location and appointment in the last field of signal or Dial sign is complementary.If configuration compiler 808 is determined not find the coupling example in current scope at piece 1012, then this process passes to piece 1032, and configuration compiler 808 sign mistakes.Yet, if configuration compiler 808 has been located matched signal or Dial example, then dispose compiler 808 and in configuration database 814, create clauses and subclauses, thereby this signal or Dial example be tied in the configuration of just processed Dial specify designated parameters in the mapping table of statement, shown in piece 1014.Then, the processing of signal or Dial sign ends at piece 1030.
Referring now to piece 1020 and following piece, will the signal of the compact expression formula of employing or the processing of Dial sign be described.Piece 1020 illustrates configuration compiler 808 to be attempted in each of one or more examples in the current scope of the entity of being represented by the square bracket field, each Dial or signal example that location and Dial specified in signal or Dial sign or signal example are complementary.For example, when the compact expression formula of analogy model 300 that handle Fig. 7 B " FXU1.[A] .sig1 ", one arrives field " [A] ", then to the example body of FXU1 searching entities A 306, and one finds entity instance body 306a0 and 306a1, then in each of this two entity instance bodies, search for, with positioning signal example body sig1 514a0 and 514a1.If configuration compiler 808 is determined not find matched signal or Dial example in current scope at piece 1022, then this process passes to piece 1032, and it illustrates the processing of configuration compiler 808 in wrong termination signal afterwards of sign or Dial sign.Yet if configuration compiler 808 has been located one or more matched signal or Dial example, this process passes to piece 1024 from piece 1022.Piece 1024 illustrates configuration compiler 808 and creates one or more clauses and subclauses in configuration database 814, thereby each matched signal or Dial example are tied to designated parameters in the mapping table of the configuration appointment statement of just processed Dial.Then, the processing of signal or Dial sign ends at piece 1030.
Utilization can advantageously be reduced the deviser and be specified the size of code that must import in the statement in configuration by the compact expression formula that the present invention supports.The use of compact expression formula not only reduces the possibility of input requirement and input error, and comes simplified code to safeguard by signal and the Dial example that the specified configuration parameter is put on automatically in the selected scope of dropping on of input afterwards.
As mentioned above, each Dial has mapping relations one by one between unique output valve of each and Dial of its input value.In other words, each input value has the unique output valve different with the output valve of any other input value.For CDial and LDial, mapping table must be enumerated each legal input value and relationship maps thereof by explicitly.
Must be in mapping table the explicit requirement of enumerating input value limit the overall complexity of any given LDial or CDial.For example, () situation for example, Memory Controller, wherein each of these configuration registers all has 5 to 20 legal values to consider to comprise the integrated circuit of 10 to 20 configuration registers.Under many circumstances, these registers have interdependent property-the be loaded in legal possibility that a value in the register can influence one or more other registers.Ideally, utilizing the Dial tree of being controlled by single CDial to specify the value of all registers will be easily.In this way, the configuration of all 10 to 20 registers can be used as a group and controls.
Unfortunately, under the situation of above-mentioned supposition, 10 to 20 registers may have together above 300,000 legal values combinations.In this case, though the appointment of CDial is possible in theory, is unfavorable and is infeasible actually.And, even can adopt looping construct to come the configuration of robotization structure CDial to specify statement, be legal although notify which input value to simulation softward, configuration specifies statement to inform the CDial how this size is set to the user.
Recognizing under the situation of foregoing problems that configuration appointed language of the present invention provides " Dial group " structure.The Dial group is that the deviser wishes to create betwixt related Dial set.API working time that is used to provide the Dial input value follows this association by preventing each Dial that is provided with separately in the Dial group.In other words, all Dial in the Dial group must be set simultaneously, with the alternant way of being indifferent between the Dial each Dial be set independently so that prevent.Because software forces to follow the marshalling of the Dial that forms the Dial group, so the use of Dial group also provides the deviser forming the mechanism that exists unstated mutual dependence to be provided with between the Dial of Dial group to the warning of " downstream " user community.
Referring now to Figure 11 A, show the diagram of Dial group 1100a.Dial group 1100a is by group name 1102 (for example, " GroupG ") and list one or more Dial or Dial tabulation 1104 definition of other Dial group.The Dial group is without any inputing or outputing.The Dial that is listed in the Dial tabulation 1104 as all top layer Dial 1110a-1110f can be LDial, CDial and/or IDial.
Figure 11 A illustrates Dial group 1100a can be implemented as the layering Dial group of quoting one or more other Dial groups 1100b-1100n in its Dial tabulation 1104.These low layers Dial group is quoted one or more top layer Dial 1110g-1110k and 1110m-1110r (or other Dial groups) again in its Dial tabulation separately.
Layering realizes that a motivation of Dial group is to coordinate the configuration of the Dial group of leap organizational boundary.For example, consider such digital display circuit, wherein 30 Dial logically belong to a Dial group, and in 10 first design entities that are included in as first deviser's responsibility among these Dial, and in 20 second design entities that are included in as second deviser's responsibility among these Dial.Under the situation that does not have layering Dial group, will have to specify in the explicit single Dial group of listing all 30 Dial in its Dial tabulation 1104 at the high level that comprises both design hierarchies of first and second design entities.This realization will be inconvenient, must know all relevant Dial in the low layer design entity because be responsible for the deviser (or design team) of high-rise design entity, and in the Dial of Dial group tabulation 1104 each of 30 Dial of concrete sign.
The 3rd high-rise Dial group that a kind of interchangeable layered approach will need to create Dial group, the 2nd Dial group that comprises 20 Dial in second design entity that comprises 10 Dial in first design entity and quote first and second Dial group.Importantly, two low layer Dial groups must be only quoted in the Dial tabulation 1104 of high-rise Dial group, therefore hide the low layer details to the deviser who is responsible for design hierarchy high level.In addition, belong to the Dial tabulation 1104 that two low layer Dial groups will not influence high-rise Dial group, therefore alleviated code maintenance owing to change which Dial.
The Dial group is followed many rules.At first, Dial or Dial group cannot be listed in the Dial tabulation of organizing more than a Dial 1104.The second, the Dial group must be quoted at least one Dial or other Dial group in its Dial tabulation 1104.The 3rd, in its Dial tabulation 1104, the Dial group can only be quoted Dial or the Dial group in its scope, wherein this scope by convention (as the scope notion that is applied to Dial) be the scope (that is any low layer design entity in design entity itself and the design entity) of its related design entity.The 4th, each Dial that quotes in the Dial of Dial group tabulation 1104 must be top layer Dial.
Referring now to Figure 11 B, show the exemplary simulated model 1120 that explanation Dial group is used.Exemplary simulated model 1120 comprises the top layer design entity 1122 with example body identifier " TOP:TOP ".In top layer design entity 1122, instantiation has two design entities 1124 and 1126 of entity title FBC and L2 respectively.FBC entity instance body 1124 again instantiation have Dial title " C " Dial example 1130, comprise the Z entity instance body 1132 of Dial example 1134 and be named as " X0 " respectively and two example bodies of the entity X 1136 of " X1 " with Dial title " B ".Each entity X example body 1136 comprises two entity Y example bodies 1138, and wherein each further instantiation has the Dial example 1140 of Dial title " A ".L2 entity instance body 1126 comprises Dial example 1150 and two the entity L example bodies 1152 with Dial title " D ", these two entity L example bodies, 1152 each self-contained Dial examples 1154 with Dial title " E ".
As shown in the figure, FBC entity instance body 1124 has the related Dial group example 1160 of group name for " F ".As shown by arrows, Dial group example 1160 comprises each of Dial example 1130,1134 and 1140 in FBC entity instance body 1124.L2 entity instance body 1126 has related Dial group example 1162 similarly, and it comprises Dial example 1150 and 1154 each in L2 entity instance body 1126.These Dial group examples all belong to the high-rise Dial group example 1164 with group name " H " again, and it is associated with top layer design entity 1122.
Each Dial group example is created by comprise suitable configuration statement in the hdl file of related design entity.For example, create following respectively the providing of example syntax of the configuration statement of Dial group " F ", " G " and " H ":
GDial?F(C，[Z].B，[Y].A)；
GDial?G(D，[L].E)；
GDial?H(FBC.F，L2.G)；
In each configuration statement, the Dial group is thereafter the character string (for example, " F ") of expression group name with key word " GDial " statement.In the bracket after group name, specify the Dial tabulation of Dial group.Shown in the configuration statement of Dial group " H ", the Dial tabulation of layering Dial group is specified other Dial groups in the mode identical with Dial.Should also be noted that above-mentioned compact Dial expression syntax can be used to specify Dial or the Dial group in the Dial tabulation, shown in the configuration statement of Dial group " F " and " G ".
Since described the fundamental type of Dial, grammer and the application and the Dial group of its appointment, will provide the exemplary realization of configuration database 814 and the description of use thereof.In order to help to understand the mode of addressable specific Dial example body (or a plurality of example bodies of Dial) in configuration database 814, will the nomenclature of Dial in the configuration database 814 be described.
The nomenclature that is used for the preferred embodiments of the present invention at first requires each Dial of the unique name of deviser appointment in any given design entity, and promptly the deviser can not adopt identical Dial title to state any two Dial in the same design entity.Follow the Name Conflict between the Dial that this requirement prevents instantiation in the same design entity, and help design entity re-using arbitrarily in the model of size arbitrarily.This constraint is not too heavy, because given design entity created by particular design person at particular point in time usually, and safeguards that unique Dial title only brings the burden of appropriateness in that this stop collar is domestic.
(for example in given analogy model, can have a plurality of example bodies because wish to visit separately, owing to duplicate) the particular instance body of Dial entity, so the independent use of Dial title can not guarantee the specific Dial entity instance body in the unique identification analogy model.Accordingly, in a preferred embodiment, the nomenclature of Dial supports local HDL to adopt " the expansion Dial identifier " of each Dial in the analogy model to eliminate unique example body identifier of the required related design entity of the ambiguity of a plurality of examples of same design entity.
In addition, have realized that the requirement of the not strict pressure sole entity of some HDL title.For example, traditional VHDL entity name structure allows two design entities to share identical entity title entity_name.Yet the entity that VHDL requires to have same names must be encapsulated in from it can construct in the different VHDL storehouse of effective VHDL model.In this case, entity_name is equivalent to the VHDL library name that is connected in series with the entity title of being stated with period (". ") in the entity statement.Therefore, different VHDL library names are suspended in advance the ambiguity that the entity title will be eliminated the entity of sharing identical entity title.Most of HDL comprise such as next each design entity of unique name of such mechanism.
In a preferred embodiment, the expansion Dial identifier of the particular instance body of unique identification Dial entity comprises three fields: example body identifier field, design entity title and Dial title.Expansion Dial identifier can followingly be expressed as the character string with period (". ") separating adjacent field:
＜example body identifier 〉.＜design entity title 〉.＜Dial title 〉
In expansion Dial identifier, the design entity field comprises Dial therein by the entity title of the design entity of instantiation, and the Dial name field is included in the title of stating for Dial in the Dial configuration appointment statement.As mentioned above, the example body identifier of appointment in example body identifier field is the sequence of example body identifier, its top layer entity from analogy model begins the direct ancestors' design entity to given Dial example, and wherein adjacent Provisioning Instance Identifier with period (". ") separately.Owing to there is not design entity can comprise two Dial with same names, so example body identifier is unique for each example of Dial in the model.
The uniqueness of title is the main differentiation factor between the Dial in the design entity name field.By in expansion Dial identifier, comprising the design entity title, in fact each design entity has been endowed unique NameSpace of the Dial that is associated with that design entity, and the Dial in the promptly given design entity can not have Name Conflict with the Dial that is associated with other design entities.Should also be noted that and to come each Dial of unique name by independent use-case body identifier field.Just, because the uniqueness of example body identifier, only the Dial identifier that is formed by example body identifier field and Dial name field must be unique.Yet this nomenclature scheme is not associated Dial with given design entity.In fact, expectation is associated Dial with design entity, and wherein they take place by comprising the design entity field, need not to determine to comprise the title of all design entity example bodies of Dial because all Dial example bodies can be quoted by concentrating then.
As mentioned above, use expansion Dial identifier to allow the particular instance body of unique identification Dial, and allow in arbitrary model, to re-use design entity and the danger of not having the Dial Name Conflict.For example, referring again to Figure 11 B, Dial A entity instance body 1140a0,1140a1,1140b0 and 1140b1 can come unique identification with following expansion Dial identifier respectively:
FBC.X0.Y0.Y.A
FBC.X0.Y1.Y.A
FBC.X1.Y0.Y.A
FBC.X1.Y1.Y.A
Under the situation of the preferred nomenclature of having understood Dial, referring now to Figure 12, it is the diagram by the example format of the configuration database 814 of configuration compiler 808 establishments.In this exemplary embodiment, configuration database 814 comprises at least four kinds of data of different types structures: Dial definition data structure (DDDS) 1200, Dial instance data structure (DIDS) 1202, latch data structure 1204 and top layer array of pointers 1206.Configuration database 814 can comprise additional data structure alternatively, as Dial array of pointers 1208, latch array of pointers 1210, example array of pointers 1226 and other data structures of representing with dash line, when configuration database 814 is loaded, these additional data structure can be configured in volatile memory alternatively, as following further as described in.Only after configuration database 814 being loaded in the volatile memory, just generate these additional data structure and advantageously promote compacter configuration database 814.
For each Dial in the digital display circuit or Dial group, in configuration database 814, create corresponding D ial definition data structure (DDDS) 1200.Preferably, in configuration database 814, only create a DDDS 1200 and with digital display circuit in the example body number of Dial (or Dial group) irrelevant.As described below, the information of the particular instance body of the relevant Dial that describes in DDDS 1200 is independently being specified among the DIDS 1202.
As shown in the figure, each DDDS 1200 comprises that it still is Dial group and if Dial also represents the type field 1220 of Dial type that expression DDDS 1200 describes Dial.In one embodiment, the value that is provided with for type field 1220 comprises " G ", " I " that be used for integer Dial (IDial) that are used for the Dial group, is used for " L " of latch Dial (LDial) and is used to control Dial (CDial) " C ".DDDS 1200 also comprises name field 1222, and it specifies the title by the Dial of DDDS 1200 descriptions or Dial group.This field preferably comprises the design entity title of Dial (or Dial group), is period (". ") afterwards, is afterwards the title of specifying the Dial (or Dial group) that provides in the statement in the configuration of Dial (or Dial group) again.The content of name field 1222 is corresponding to the Dial name field of the expansion Dial identifier of design entity title and Dial.
At last, DDDS 1200 can comprise example array of pointers 1226, and it comprises the example pointer 1228a-1228n of one or more sensings by each example of the Dial of DDDS 1200 definition or Dial group.Example array of pointers 1226 helps a plurality of examples of specific Dial of visit or Dial group.
Shown in Figure 12 was further, configuration database 814 comprised the DIDS 1202 corresponding to each Dial example body in the digital Design or Dial group example body.Each DIDS 1202 comprises define field 1230, and it comprises and points to DIDS 1202 and describe the definition pointer 1231 of DDDS 1200 of the Dial of particular instance for it.In case identify specific Dial example, definition pointer 1231 just allows easily Dial title, Dial type and the mapping table of access instances.
Therefore, the father field 1232 of DIDS 1202 is described in the Dial entity of instantiation in the digital Design and the hierarchical arrangement of Dial group jointly in the configuration database 814.As described below, under the given finally situation by the Configuration Values of the configuration latch of top layer Dial control, the hierarchical information that is provided by father field 1232 advantageously makes it possible to determine the input value of any top layer Dial.
The complete qualified example title of the Dial example that the example name field 1234 of DIDS 1202 provides top layer design entity from digital Design, described by DIDS 1202.For the Dial example that is associated with the top layer entity, example name field 1234 preferably comprises null character string.
DIDS 1202 can comprise that also default field 1229, Phase I D field 1227 and Dial are provided with field 1239.In the time of compiling, configuration compiler 808 preferably initially is inserted into default field 1229 configuration of related Dial and specifies statement to have among each DIDS 1202 at least of default value for its appointment.Default value is specified in default field 1229 storages; If do not specify default value, then default field 1229 is empty or is omitted.Configuration compiler 808 utilizes recursion to travel through analysis configuration database 814 subsequently, and perhaps deletion (or being set as sky) has the default field 1229 of any Dial example of the ancestors Dial that is with default value.By this way, the default value that is in high-rise Dial example in hierarchy is covered as the default value of low layer Dial example appointment.For each all the other (or non-NULLs) default field 1229, the Phase I D field 1227 that configuration compiler 808 will be used for storing the one or more Phase I D (if having) that are associated with default value is inserted into DIDS 1202.The Phase I D that is stored in the Phase I D field 1227 can specify in the Dial definition statement in hdl file 800 or the configuration specified file 802, perhaps can be alternatively provide by direct manipulation configuration database 814 by downstream user, as following with reference to as described in Figure 18 C.
Shown in dotted line, when configuration database 814 was loaded onto in the volatile memory, Dial was provided with field 1239 and preferably is inserted in each DIDS 1302 in the configuration database 814.It is Boolean fields that Dial is provided with field 1239, and it is initialized as FALSE (vacation), and when explicit be updated to when related Dial example is set true.
At last, DIDS 1202 comprises output pointer array 1236, and it comprises the pointer 1238a-1238n that points to the data structure of describing the low layer example body that is associated with corresponding Dial example or Dial group example.Specifically, under the situation of IDial and LDial, the corresponding latch data structure 1204 of configuration latch of Dial example is quoted and be coupled in to output pointer 1238.For non-division IDial, the configuration latch entity of being quoted by output pointer 1238a receives the high order bit of integer input value, and is received the low-order bit of integer input value by the configuration latch entity that output pointer 1238n quotes.Under the situation of CDial, output pointer 1238 is quoted and corresponding other DIDS 1202 of Dial example that controlled by CDial.For the Dial group, output pointer 1238 is quoted with layered mode and is included in corresponding to top layer Dial example in the Dial group example of DIDS 1202 or Dial group example.
But for the output of LDial or IDial each configuration latch in the simulation execution model 816 of coupling with it logically, configuration database 814 also comprises corresponding latch data structure 1204.Each latch data structure 1204 comprises father field 1240, and it comprises the parent pointer 1242 of the DIDS 1200 of the LDial that points to the direct corresponding configuration latch of control or IDial.In addition, with respect to the entity that comprises by the Dial example body of parent pointer 1242 signs, latch data structure 1204 comprises the latch name field 1244 of specifying layering latch title.For example, quote the have hierarchical name configuration latch of " a.b.c.d.latchl " if having the LDialX of example body identifier a.b.c, then latch name field 1244 will comprise character string " d.latchl ".Like this, the content that will be suspended to latch name field 1244 by the content of the example name field 1234 of the DIDS 1202 of parent pointer 1242 sign in advance will provide the complete qualified title of any example of the given configuration latch that can utilize configuration database 814 configurations.
Still with reference to Figure 12, as mentioned above, configuration database 814 comprises top layer array of pointers 1206 and comprises Dial array of pointers 1208 alternatively and latch array of pointers 1210.Top layer array of pointers 1206 comprises top layer pointer 1250, and it points to the related DIDS 1202 of top layer entity instance for each top layer Dial and each top layer Dial group.Dial array of pointers 1208 comprises the Dial pointer 1252 that points to each DDDS 1200 in the configuration database 814, to allow by Dial and/or the specific Dial example of entity title dereference.At last, latch array of pointers 1210 comprises latch pointer 1254, and it points to each the latch data structure 1204 in the configuration database 814, to allow easily to visit all configuration latch.
In case constructed configuration database 814, then the content of configuration database 814 can be loaded onto in the system storage 18 of data handling system 8 of volatile memory such as Fig. 1, thus the configuration analogy model that is used to simulate suitably.Generally speaking, data structure 1200,1202,1204 and 1206 can directly be loaded in the system storage 18, and can increase added field alternatively, and is as described below.Yet, as mentioned above, if wish to make the non-volatile reflection of configuration database 814 compact, then generation additional data structure such as Dial array of pointers 1208, latch array of pointers 1210 and example pointer array 1226 are helpful in the non-volatile configuration database reflection of system storage 18.
Referring now to Figure 13, show the logic high level process flow diagram that in the system storage 18 of the volatile memory of data handling system such as data disposal system 8, launches the method for configuration database 814.Because Figure 13 illustrates logic step but not operation steps, therefore it should be understood that and to carry out a lot of steps shown in Figure 13 simultaneously or with the order shown in being different from.
As shown in the figure, this process starts from piece 1300, enter piece 1302 then, it illustrates data handling system 6 the available data structure in the configuration database 814 is copied in the volatibility system storage 18 from Nonvolatile memory devices (for example, disc memory device or flash memory).Next step at piece 1304, determines whether all the top layer pointers 1250 in the top layer array of pointers 1206 of configuration database 814 are processed.If then this process passes to the piece of discussing below 1320.If not, this process enters piece 1306, and it illustrates from top layer array 1206 and selects next top layer pointer 1250 to be processed.
Then, determine at piece 1308 whether by the parent pointer 1233 in the DIDS 1202 of selected top layer pointer 1250 signs be null pointer.If not, its expression DIDS 1202 descriptions belong to the top layer Dial of Dial group, and then this process turns back to piece 1304, and the Dial of its expression under handling it will handle top layer Dial and related low layer Dial thereof when organizing.
In response to determining that at piece 1308 parent pointer 1233 is null pointers, create the example pointer 1228 that points to DIDS 1202 in the example array 1226 of the DDDS 1200 that the definition pointer 1231 of data handling system 8 in the define field 1230 of DIDS1202 is pointed, shown in piece 1310.Next step, at piece 1312, if Dial pointer 1252 is not redundant, then data handling system 8 is created the Dial pointer 1252 of the DDDS 1200 that points to top layer Dial in Dial array of pointers 1208.In addition, shown in piece 1314, the latch pointer 1254 that data handling system 8 is created in the latch array of pointers 1210, it points to each latch data structure 1204 (if the words that have) of being quoted by the output pointer 1238 of the DIDS 1202 of top layer Dial.Then, shown in piece 1316, handle each branch (if the words that have) similarly by the function shown in the execution block 1310-1316, till finding and having handled the latch data structure 1204 that stops that branch with each low layer of the Dial tree headed by the top layer Dial that quotes by selected top layer pointer 1250.Then, this process turns back to piece 1304, the processing of each top layer pointer 1250 in its expression top layer array of pointers 1206.
In response to determining that at piece 1304 all top layer pointers 1250 are all processed, process shown in Figure 13 enters piece 1320.Piece 1320 is illustrated in to be created Dial among each DIDS 1320 in the configuration database field 1239 is set.As mentioned above, it is Boolean fields that Dial is provided with field 1239, and it is initialized as vacation, and when explicit be updated to when related Dial example is set true.In addition, shown in piece 1322, data handling system 8 is created latch value field 1246 in each latch data structure 1204, latch is provided with field 1248 and history field 1249 is set, to represent the Set For Current value of associated configuration latch respectively, whether the expression configuration latch is current is provided with order setting by explicit, and whether the expression configuration latch is by explicit setting.Though the establishment of four fields shown in the piece 1320-1322 is to separate with the processing shown in the piece 1304-1316 to illustrate for the sake of brevity, but should be appreciated that create when handling each DIDS 1202 that Dial is provided with field 1239 and when the latch data structure 1204 of the bottom that arrives each Dial tree establishment field 1246,1248 and 1249 be more efficiently.Then, the process that configuration database is loaded in the volatile memory ends at piece 1234.
Under configuration database is loaded onto situation in the volatile memory, can dispose and utilize analogy model to come analog digital design by carrying out simulation softward.With reference to Figure 14, show the block scheme of the content of system storage 18 (Fig. 1) during the dry run that is described in analogy model.As shown in the figure, system storage 18 comprises analogy model 1400 and software, and wherein analogy model 1400 is logical expressions of the digital Design that will simulate, and software comprises provisioning API 1406, simulator 1410 and RTX (carrying out body working time) 1420.
Simulator 1410 is loaded into analogy model such as analogy model 1400 in the system storage 18.During dry run, simulator 1410 resets, regularly and assessment analogy model 1400 by various API 1416.In addition, simulator 1410 utilizes GETFACAPI 1412 to read value in the analogy model 1400, and utilizes PUTFAC API 1414 to write values into analogy model 1400.Though simulator 1410 adopts software to realize fully, should be appreciated that hereinafter simulator can be alternatively adopts hardware to realize to small part in Figure 14.
Provisioning API 1406 comprises typically the software that adopts the higher level lanquage of supporting configuration analogy model 1400 such as C or C++ to write.These API by simulator 1410 dynamic loadings comprise an API as required, and it launches it from Nonvolatile memory devices elements with configuration data storehouse 814 and with top with reference to the described mode of Figure 13, so that the memory mapping of configuration database 1404 to be provided.Provisioning API 1406 also comprises additional API, with visit as described below and manipulation configuration database 1404.
The simulation of RTX 1420 control analogy models such as analogy model 1400.For example, RTX 1420 loads the test case that will put on analogy model 1400.In addition, one group of API Calls of the API that provides to provisioning API 1406 with by simulator 1410 is provided for RTX 1420, with the operation of initialization, configuration and analogsimulation model 1400.During simulating and afterwards, the API that RTX 1420 also calls provisioning API 1406 and provided by simulator 1410 is to check the correctness of analogy model 1400 by each Dial, configuration latch, counter and other entities in the visit analogy model 1400.
RTX 1420 has two patterns of the Dial of visit instantiation in analogy model 1400: interactive mode and batch mode.In interactive mode, RTX 1420 calls first group of API and comes the one or more examples of the specific Dial in the configuration database 1404 to read or write to it.The latch value that obtains by reference configuration database 1404 comes into force in analogy model 1400.In batch mode, RTX1420 calls the example body that second group of different API read or write a plurality of Dial in the configuration database 1404, carries out any modification to analogy model 1400 then simultaneously.
In mutual or batch mode, which Dial or Dial that RTX 1420 must adopt certain grammer to specify in its API Calls and will visit in the analogy model 1400 organize example.Though can adopt multiple different grammer, comprise the conventional normal expression formula that adopts asterisk wildcard, in illustrative embodiment, be used in API Calls, specifying the syntactic class of Dial or Dial group example to be similar to aforesaid compact expression formula.Above-mentioned compact expression formula and be used in RTXAPI calls specifies the crucial difference between the grammer of Dial or Dial group example to be, in illustrative embodiment, the top layer design entity of analogy model 1400 but not come in the RTX API Calls, to specify Dial and Dial group example by reference with respect to the design entity of wherein having specified Dial or Dial group.
In the embodiment shown, be that each RTX API Calls of target utilizes two parameters to specify Dial or Dial group example: example qualifier and Dial title qualifier with the one or more Dial in the analogy model 1400 or Dial group example.In order only to quote single Dial or Dial group example body, the example qualifier is taked the form of " a.b.c.d ", and it is the layering example body identifier that the design entity of this single Dial or Dial group example body occurs.In order to quote a plurality of Dial or Dial group example, the example qualifier is taked the form of " a.b.c.[X] ", all example bodies of entity X in the scope of its identified entities example a.b.c.The form of adopt degenerating, the example qualifier may simply be " [X] ", Anywhere all example bodies of entity X in its sign analogy model 1400.
Dial title (dialname) qualifier is preferably taked the form of " Entity (entity) .dialname (Dial title) ", wherein " entity " is that Dial or Dial organize therein by the design entity of instantiation, and " Dial title " is to specify the title of distributing to Dial or Dial group in statement in its configuration.If adopt band square bracket grammer to come the given instance qualifier, then can from Dial title qualifier, remove " entity " field, because it is with the entity title of matching strip square bracket.
Referring now to Figure 15, it shows provisioning API 1406 according to the present invention is organized the example process of example to specific Dial in location or Dial in configuration database 1404 based on example qualifier and Dial title qualifier logic high level process flow diagram.As shown in the figure, this process response receives the API Calls of the RTX 1420 that comes self-contained example qualifier and Dial title qualifier as mentioned above and starts from piece 1500 in provisioning API 1406.In response to this API Calls, provisioning API 1406 enters configuration database 1404 with Dial array of pointers 1208, shown in piece 1502, and utilize Dial pointer 1252 to locate the accurately DDDS 1200 of coupling appointment Dial title qualifier of its name field 1222, shown in piece 1504.
Next step, at piece 1506, provisioning API 1406 determines whether the example qualifier adopts band square bracket grammer as mentioned above.If then this process passes to the piece 1520 that describes below.Yet if the example qualifier does not adopt band square bracket grammer, provisioning API 1406 is located the accurately single DIDS 1202 of the example qualifier of coupling appointment of example name field 1234 according to the example pointer 1228 of coupling DDDS 1200.Shown in piece 1510-1512, if do not find coupling, then this process is with error ending.Yet,, create interim " result " pointer of this single coupling DIDS1202 of sign at piece 1524 if located coupling DIDS 1202.Then, this process ends at piece 1526.
Get back to piece 1520, if adopt band square bracket grammer, then provisioning API 1406 utilizes the example pointer 1228 of coupling DDDS1200, with the DIDS 1202 of one or more Dial in location or Dial group example in by the scope of the prefix part appointment of the Provisioning Instance Identifier before the square bracket.Just, if the example name field 1234 of DIDS1202 comprises the prefix part of example qualifier, then think DIDS 1202 " coupling ".Once more, if do not find coupling, this process is by piece 1522, and with error ending in piece 1512.Yet, if one or more DIDS 1202 " coupling " example qualifier, at the interim result pointer of the marking matched DIDS 1202 of piece 1524 structures.Process shown in Figure 15 ends at piece 1526 then.
Referring now to Figure 16 A, it shows RTX 1420 according to the present invention reads the value of one or more Dial examples in interactive mode the logic high level process flow diagram of example process.As shown in the figure, this process response receives the read_Dial () API Calls of RTX 1420 and starts from piece 1600 in provisioning API 1406.Shown in piece 1602, provisioning API 1406 responds read_Dial () API Calls by the DIDS 1202 that locatees one or more Dial examples above utilizing with reference to the described process response API Calls of Figure 15 in configuration database 1404.
Then, this process enters circulation at piece 1604, each of the interim result pointer that the process by Figure 15 of wherein handling generates.If all processed by all result pointers that the process of Figure 15 is returned, then this process passes to the piece 1640 that describes below.If not, then this process enters piece 1608 from piece 1606, and it illustrates provisioning API 1406 and selects next result pointer to be processed.Next step, at piece 1608, provisioning API 1406 determines by the type field 1220 with reference to the DDDS1200 that is associated with DIDS 1202 by the current results pointer mark whether DIDS 1202 organizes corresponding to Dial.If then the process shown in Figure 16 A ends at piece 1610 with error condition, its expression RTX 1420 has utilized wrong API Calls to read the Dial example.
In response to determining that at piece 1608 DIDS 1202 by the current results pointer mark does not correspond to Dial group example, this process enters piece 1620.Piece 1620 illustrate the output pointer 1238 that provisioning API 1406 utilizes DIDS 1202 (and in the Dial tree any low layer DIDS 1202 output pointer) come from finally make up the data set that comprises the latch title by the latch name field 1244 of the corresponding latch data structure 1204 of all configuration latch of the Dial example control of appointment API Calls.Next step, shown in piece 1622, provisioning API 1406 sends the API Calls of one or more GETFAC () API1412 to simulator 1410, to obtain to list in the latch value at all configuration latch of the data centralization of piece 1620 structures from analogy model 1400.
Then, the latch value that 1404 checkings of provisioning API 1406 reference configuration databases obtain from analogy model 1400 is shown in piece 1624.In order to verify the latch value, provisioning API 1406 utilizes mapping table 1224 upwards to propagate latch value by middle DIDS 1202 (if the words that have) along the Dial tree from the latch data structure of correspondence, till the input value of the Dial example of determining to be asked.If at any point of this proof procedure, the output valve of the Dial example that generates by proof procedure does not correspond to one of legal value of enumerating in its mapping table 1224, then detect mistake at piece 1626.Therefore, will place the result data structure from latch value and the wrong indication that analogy model 1400 reads, shown in piece 1630.If do not detect mistake, then the Dial input value that will generate by proof procedure and successfully indication place the result data structure, shown in piece 1628.
Turn back to shown in the piece 1604 as this process,, repeat said process for each the interim result pointer that returns by the process of Figure 15.In case all result pointers are all processed, then this process passes to piece 1640-1642 from piece 1604, and it illustrates provisioning API 1406 the result data structure is turned back to RTX 1420, stops then.
RTX 1420 for example utilizes that the method for Figure 16 A reads the Dial example in interactive mode, monitors the detector of the part of analogy model 1400 during dry run with initialization.Interested Dial is provided with the Dial that not only comprises top layer Dial example and is provided with, and comprises the Dial setting with the low layer Dial example of the part associating of the analogy model 1400 that is monitored by detector.
Referring now to Figure 16 B, it shows RTX 1420 according to the present invention reads the value of one or more Dial group examples in interactive mode the logic high level process flow diagram of example process.By comparison diagram 16A and 16B as can be seen, the process that reads Dial group example is similar to the process that reads the Dial example, but returns the value of one or more top layer Dial examples of Dial entity that may be different but not the value of one or more examples of identical Dial entity.
As shown in the figure, the process response shown in Figure 16 B receives the read_Dial_group () API Calls of RTX 1420 and starts from piece 1650 in provisioning API 1406.Shown in piece 1652, provisioning API 1406 is by coming the DIDS 1202 of the one or more Dial group in location example in configuration database 1404 to respond read_Dial_group () API Calls with reference to the described process of Figure 15, response API Calls above utilizing.
Then, this process enters circulation at piece 1654, each of the interim result pointer that the process by Figure 15 of wherein handling generates.If all processed by all result pointers that the process of Figure 15 is returned, then this process passes to the piece 1680 that describes below.If not, then this process enters piece 1656 from piece 1654, and it illustrates provisioning API 1406 and selects next result pointer to be processed.Next step, at piece 1658, provisioning API 1406 signs are also created and are pointed to the temporary pointer that the DIDS 1202 corresponding Dial that belong to and quoted by the current results pointer organize all top layer Dial examples of examples.Specify the top DIDS 1202 of each output pointer 1238 of the type that is different from the Dial group to identify top layer Dial example by the type field 1220 of locating among the related DDDS 1220.In other words, provisioning API 1406 may have to search for one or more layering Dial groups downwards, to locate relevant top layer Dial example.
Process shown in Figure 16 B enters the circulation with piece 1659 beginning then, and wherein, individual processing belongs to each with the top layer Dial example of the Dial group DIDS 1202 corresponding Dial groups of being quoted by the current results pointer, to obtain the value of top layer Dial example.Next step, this process enters piece 1660, it illustrates the output pointer 1238 that provisioning API 1406 utilizes the DIDS 1202 of first (or next) top layer Dial example (and in the Dial tree any low layer DIDS 1202 output pointer), from making up the data set that comprises the latch title with latch name field 1244 by the corresponding latch data structure 1204 of all configuration latch of the final control of top layer Dial example.Next step, shown in piece 1662, provisioning API 1406 sends the API Calls of one or more GETFAC () API 1412 to simulator 1410, to obtain to list in the latch value at all configuration latch of the data centralization of piece 1660 structures from analogy model 1400.
At piece 1664, described constructed above provisioning API 1406 utilizes then with reference to the piece 1624 of Figure 16 A, the latch value that 1404 checkings of reference configuration database obtain from analogy model 1400.If at any point of this proof procedure, the output valve of the Dial example that generates by proof procedure does not correspond to one of legal value of enumerating in its mapping table 1224, then detect mistake at piece 1666.Therefore, will place the result data structure from latch value and the wrong indication that analogy model 1400 reads, shown in piece 1670.If do not detect mistake, then the Dial input value that will generate by proof procedure and successfully indication place the result data structure, shown in piece 1668.
After piece 1668 or piece 1670, this process turns back to piece 1659, and whether its expression is determined to belong to all processed with all top layer Dial of the DIDS 1202 corresponding Dial groups of being quoted by the current results pointer.If not, then this process turns back to the piece of having described 1660.Yet if all top layer Dial are processed, this process turns back to piece 1654, and it illustrates determines whether all result pointers are all processed.If not, then the piece of having described 1656 and below piece handle next result pointer.Yet if all result pointers are all processed, this process passes to piece 1680-1682, and it illustrates provisioning API 1406 the result data structure is returned to RTX 1420, stops then.
Reading Dial in the batch mode of RTX 1420 is preferably handled by provisioning API 1406 in the mode identical with interactive mode except an exception with Dial group example.In interactive mode always at piece 1622 and 1662 by calling from analogy model 1440 of GETFAC () API 1412 read the latch value, and in batch mode preferably, corresponding configuration latch is set up if latch is provided with field 1248 expressions, and then the latch value field 1246 of the latch data structure 1204 from configuration database 1404 obtains the latch value.If configuration latch is not set up as yet, then by calling from analogy model 1440 of GETFAC () API1412 obtained the latch value.This difference is guaranteed correctly to be reported in the Dial that carries out in the batch mode and is provided with, and it may not be reflected in the analogy model 1400 as yet.
Referring now to Figure 17 A, it shows RTX according to the present invention is provided with the example process of Dial example in interactive mode logic high level process flow diagram.This process response receives from the set_Dial () API Calls of RTX 1420 in provisioning API 1406 and starts from piece 1700.In response to set_Dial () API Calls, with reference to the described technology of Figure 15, the interim result pointer of the DIDS 1202 of the Dial example of appointment in set_Dial () API Calls was pointed in location and generation, shown in piece 1702 above provisioning API 1406 at first utilized.Next step, provisioning API 1406 determines at piece 1704 whether all interim result pointers point to the DIDS 1202 of top layer Dial example.For example, this is determined and can be undertaken by parent pointer 1233 (with the parent pointer of any high-rise DIDS 1202 that is linked by parent pointer 1233) and the type field 1220 of related DDDS 1200 of checking each such DIDS 1202.The DIDS 1202 of top layer Dial example will have sky parent pointer 1233 or point to the non-NULL parent pointer 1233 of another DIDS 1202 of the type field 1220 expression Dial group of related DDDS 1200.If any DIDS 1202 that is quoted by result pointer does not correspond to top layer Dial example, then this process ends at piece 1708 with error condition.
Corresponding to top layer Dial example, determine further that at piece 1706 whether designated value that the Dial examples will be set up is one of value of appointment in the mapping table 1224 at related DDDS1200 in response to all DIDS 1202 that determine to quote at piece 1704 by result pointer.If not, then this process with error ending in piece 1708.Yet in response to determining that at piece 1706 designated value that the Dial example will be set up is one of legal value, this process enters the circulation that comprises piece 1710-1716, wherein handles each result pointer so that Dial example separately to be set.
At piece 1710, provisioning API 1406 determines whether all result pointers are all processed.If then this process ends at piece 1720.Yet,, select next result pointer to be processed at piece 1712 if also have other result pointer processed.Next step, at piece 1714, the Dial that provisioning API 1406 will appointment in set_Dial () API Calls is provided with along to propagate downwards with the Dial tree headed by the top layer Dial example that the DIDS 1202 that is quoted by the current results pointer is associated.Be provided with in order to propagate expectation Dial, in case of necessity, mapping table 1224 among the DDDS 1200 that the DIDS 1202 that at first quotes and quoted by the current results pointer is associated (promptly, for CDial and LDial), with the output valve of each output pointer 1238 in the output pointer array 1236 of the DIDS 1202 that determines to quote by the current results pointer.These output valves as with the input value of the DIDS 1202 corresponding next low layer Dial examples of quoting by output pointer 1238 (if the words that have), propagate downwards along the Dial tree.This propagates continuation, up to determined the latch value for each configuration latch (it is represented by latch data structure 1204) that stops the Dial tree in configuration database 1404 till.Shown in piece 1716, when having determined each latch value of configuration latch, provisioning API 1406 sends calling PUTFAC () API 1414, latch title in order to appointment in the latch name field 1244 that is used in corresponding latch data structure 1204 is set as determined value with the configuration latch in the analogy model 1400.
Then, this process turns back to piece 1710, and its expression is corresponding to the processing of the top layer Dial of next result pointer.After all result pointers were all processed, this process ended at piece 1720.
Referring now to Figure 17 B, it shows RTX according to the present invention is provided with the example process of Dial group in interactive mode logic high level process flow diagram.This process response receives from the set_Dial_group () API Calls of RTX 1420 in provisioning API 1406 and starts from piece 1730.In response to set_Dial_group () API Calls, provisioning API 1406 at first utilizes top with reference to the described technology of Figure 15, the interim result pointer of the DIDS 1202 of the Dial group example of location and generation sensing appointment in set_Dial_group () API Calls is shown in piece 1732.Next step, provisioning API 1406 determines at piece 1734 whether all interim result pointers point to the DIDS 1202 of top layer Dial group example.For example, this determines whether to be that sky carries out with definite parent pointer 1233 by the parent pointer 1233 of checking each such DIDS 1202.If any DIDS 1202 that is quoted by result pointer does not correspond to top layer Dial group (promptly having non-NULL parent pointer 1233), then this process ends at piece 1736 with error condition.
Corresponding to top layer Dial group, this process passes to piece 1738-1740 in response to each DIDS 1202 that determines at piece 1734 to be quoted by result pointer.Piece 1738 illustrates all interior top layer Dial examples of each Dial group that the corresponding DIDS 1202 in provisioning API 1406 location is quoted by result pointer.Then, shown in piece 1740, provisioning API 1406 determines that whether designated value that each top layer Dial example will be set up is one of value of appointment in the mapping table 1224 of the DDDS 1200 of correspondence.If not, then this process with error ending in piece 1736.
In the embodiment shown, before any Dial example is set, pre-confirmation (prevalidation) step shown in the execution block 1734,1738 and 1740, because as basic (atomic) operation that all relevant top layer Dial examples successfully is set or falls flat, realize being provided with Dial group example and be considered to preferred.By this way, can avoid some top layer Dial examples in the Dial group example to be set up and complex situations that other are not set up.
In response to determining that at piece 1740 designated value that each top layer Dial example will be set up is one of legal value, then this process enters the circulation that comprises piece 1750-1756, wherein handles each result pointer belongs to each Dial group example with setting top layer Dial example.
At piece 1750, provisioning API 1406 determines whether all result pointers are all processed.If then this process ends at piece 1760.Yet,, select next result pointer to be processed at piece 1752 if also have other result pointer processed.Next step, at piece 1754, provisioning API 1406 will be provided with along downward propagation of Dial tree of the top layer Dial example of the DIDS 1202 corresponding Dial group examples that belong to and quoted by the current results pointer by the Dial to each top layer Dial appointment in set_Dial_group () API Calls.To be same as top piece 1714 described modes, carry out along the Dial tree and propagate the Dial setting downwards with reference to Figure 17 A.Shown in piece 1756, when having determined each latch value of configuration latch, provisioning API 1406 sends calling PUTFAC () API 1414, in order to the latch title of appointment in the latch name field 1244 that is used in corresponding latch data structure 1204, the configuration latch in the analogy model 1400 is arranged to determined value.Then, this process turns back to piece 1750, and its expression is corresponding to the processing of the top layer Dial of next result pointer (if the words that have).
Referring now to Figure 18 A, it shows according to the present invention the logic high level process flow diagram of the illustrative methods that Dial and Dial group example are set in batch mode.As shown in the figure, this process starts from piece 1800, enters piece 1802 then, and it illustrates RTX 1420 and comes initial configuration database 1404 by calling provisioning API 1406 (for example, start_batch ()), thus initial configuration database 1404.Start_batch () API routine for example is provided with field 1248 and history field 1249 is set and be set as vacation (FALSE) and come initial configuration database 1404 by each Dial in the configuration database 1404 being provided with field 1239, latch.All " setting " fields by in the configuration database 1404 that resets can easily detect the Dial and the configuration latch that are not provided with by current batch mode calling sequence, and are as described below.
After piece 1802 initial configuration databases 1404, the process shown in Figure 18 A enters piece 1804.Piece 1804 illustrates RTX 1420 and sends one or more read_Dial () or read_Dial_group () API Calls alternatively, as described in Figure 16 A and 16B, to read one or more Dial or Dial group as top, and send one or more batch mode set_Dial () or set_Dial_group () API Calls alternatively, be input in the configuration database 1404 with setting with Dial example and bottom configuration latch thereof.Except two exceptions, provisioning API 1406 is to respond " setting " API Calls with reference to Figure 17 A (being used to be provided with the Dial example) or the described mode of Figure 17 B (being used to be provided with Dial group example) above being same as.The first, when any top layer or low layer Dial example are set, no matter be because set_Dial () or set_Dial_group () API Calls, all the Dial of the DIDS 1202 of correspondence is provided with field 1239 and is made as very (TRUE).The second, there is not the latch value shown in the piece 1716 and 1756 of Figure 17 A-17B, to be written in the analogy model 1400 by " setting " API routine.On the contrary, the latch value is written in the latch value field 1246 with the corresponding latch data structure 1204 of each affected configuration latch, and latch is provided with field 1248 and is updated and comes true.By this way, can easily discern Dial example and configuration latch during with aftertreatment by the explicit setting of API Calls.
After piece 1804, this process passes to piece 1806, and it illustrates RTX 1420 and calls end_batch () API routine in the provisioning API 1406, to finish the current generation that default value is used.Shown in piece 1806, and as followingly describe in detail with reference to Figure 18 B, end_batch () API routine will be selected the Dial example that default value (as if having) puts on appointment, and these default values are propagated into bottom configuration latch in the configuration database 1404.Explicitly or adopt the default value setting all configuration latch the latch value thereby put on latch in the analogy model potentially.At last, prepare for the next stage (if the words that have).
Apply the stage if RTX 1420 has other default value, then this process passes to piece 1808 from piece 1806, turns back to piece 1804 then, and its expression RTX 1420 initiates next default value and applies the stage.Yet if all stages that default value applies are all processed, the process shown in Figure 18 A passes to piece 1810 from piece 1806 by piece 1808, and batch process stops at this.
Referring now to Figure 18 B, it shows the logic high level process flow diagram of the exemplary embodiment of end_phase () the API routine that the piece 1806 at Figure 18 A calls.As shown in the figure, when RTX 1420 for example adopted following statement to call end_phase () API routine, this process started from piece 1820:
End_phase(phases，unnamed，instance_qualifier，apply)
In this exemplary API Calls, " phases (stage) " parameter is the character string that specifies in the Phase I D of the default value that the current generation will apply when finishing; " unnamed (unnamed) " is to be illustrated in boolean's parameter that whether should apply during the current generation without any the default value of association phase ID; " apply (applying) " is the Boolean parameter of representing whether the configuration latch value to be put on immediately analogy model 1400; And " instance_qualifier (example _ qualifier) " is to can be used to limit which example of the specific Dial of processing to apply one or more regular expressions of default value.
By specifying the instance_qualifier parameter of end_phase () API routine, the user can apply default value an only part that is limited to analogy model 1400.Limit by this way that two parts (that is the part of two different integrated circuit (IC) chip of expression) that ability that default value applies is particularly useful in analogy model 1400 have the different phase requirement but the situation that is to use same phase ID.Therefore, the conflict of Phase I D can solve in conjunction with the instance_qualifier that Phase I D uses together by suitable appointment.
End_phase () API routine enters the cycle of treatment that comprises piece 1822-1838 then, and the DIDS 1202 in the processing configuration database 1404 wherein is to apply suitable Dial default value (if the words that have).At first reference block 1822, and end_phase () API determines whether all the top layer pointers 1250 in the top layer array of pointers 1206 are all processed.If then this process enters the piece 1840 that describes below from piece 1822.All top layer pointers 1250 in top layer array of pointers 1206 are all processed, and then this process enters piece 1824.The DIDS 1202 that piece 1824 expression end_phase () API routine recursiveness ground scannings are pointed to by next top layer pointer 1250 and offspring DIDS 1202 (if the words that have) thereof is to apply the default value by the parametric representation of end_phase () API Calls.If end_phase () API routine determines that at piece 1826 it has handled by the DIDS that is necessary 1202 in the subtree of the top layer DIDS 1202 of current top layer pointer 1250 signs, then this process turns back to the piece of having described 1822.Yet if also have by at least one DIDS 1202 in the subtree of the top layer DIDS 1202 of current top layer pointer 1250 signs processedly, this process passes to piece 1828 from piece 1826.
Turn back to piece 1830, in response to determining that the Dial that current DIDS 1202 is not set is provided with field 1239, then this process enters piece 1832.Piece 1832 illustrates the Phase I D field 1227 that end_phase () API inquires current DIDS 1202, whether has one or more association phase ID with the default value of determining to be stored in the default field 1229.If not, then this process passes to the piece 1833 that describes below.In response to determine Phase I D field 1227 at least one Phase I D of storage at piece 1832, next step determines at piece 1834 whether the stage parameter of end_phase () API Calls specifies coupling to be included in the Phase I D of the Phase I D in the Phase I D field 1227 end_phase () API.If do not find coupling, then this process passes to the piece of having described 1836 from piece 1834.On the other hand, if the Phase I D of appointment is matched with the Phase I D in the Phase I D field 1227 that is included in current DIDS 1202 in the stage parameter of end_phase () API Calls, then whether next step Dial example title of determining to be included in the example name field 1234 of current DIDS 1202 at piece 1835 of end_phase () API is matched with the qualified expression that transmits as the instance_qualifier parameter of end_phase () API Calls.Once more, determine that in response to the negative of piece 1835 then this process passes to the piece of having described 1836.On the other hand, if the Dial example title that is included in the example name field 1234 meets the instance_qualifier parameter, then this process enters the piece 1838 that describes below.
Get back to piece 1833, if the Phase I D of current DIDS 1202 neither ones or a plurality of appointments in Phase I D field 1227, whether the unnamed parameter of then further determining end_phase () API Calls has true value, to be illustrated in the default value that should apply during the current generation without any association phase information.If not, then this process passes to the piece of having described 1836 from piece 1833.On the other hand, if end_phase () API determines should apply the default value that does not have association phase information during the current generation at piece 1833, then this process enters the piece 1835 of mistake described above.
Therefore, when end_phase () API arrives piece 1838, by at determining shown in 1830,1832,1833,1834 and 1835, end_phase () API has determined should be applied for default value corresponding to the Dial example appointment of current DIDS 1202 in the current generation that batch mode is carried out.Thereby, at piece 1838, end_phase () API routine will appointment in default field 1229 default value put on mapping table 1224, to generate one or more Dial output signals, the mode of describing with the front is propagated this signal downwards along the Dial tree of current DIDS 1202 then, thus the most at last in the configuration database 1404 the latch value field 1246 of each bottom latch data structure 1204 and latch field 1248 be set be set as value corresponding to the Dial default value.Then, this process enters the piece of having described 1836 from piece 1838.
Get back to piece 1822, to apply any suitable default value, next step passes to piece 1840 this process in response to the Dial tree of determining to adopt aforesaid way to handle all DIDS 1202 that pointed to by top layer pointer 1250.Piece 1840 illustrates the apply parameter that end_phase () API checks end_phase () API Calls, to determine whether and the configuration latch value in the latch data structure 1204 should be put on analogy model 1400.By this additional degree of control of determining expression is favourable, because can have the different piece of the analogy model 1400 of conflict Phase I D can be configured in configuration database 1404 independently in different phase, but if desired, the configuration latch value can put on analogy model 1400 simultaneously as a result.If the apply parameter has falsity, it means during the current generation and will analogy model 1400 not applied the configuration latch value that then this process directly passes to piece 1844.
Yet, if as the apply parameter value for very indicated, during the current generation, to apply the configuration latch value to analogy model 1400, end_phase () API routine enters piece 1842.At piece 1842, end_phase () API utilizes latch array of pointers 1210, to check each the latch data structure 1204 in the configuration database 1404.For latch each latch data structure 1204 that field 1248 has true value is set, end_batch () API routine is sent the calling of the PUTFAC () API 1414 of simulator 1410, and upgrades analogy model 1400 with the latch value that employing is included in the latch value field 1246.In addition, shown in piece 1844, end_phase () API carries out that latch is provided with the value of field 1248 and the logical OR that is provided with between the history field 1249 is operated, thereby history field 1249 stored results are being set.By this way, each is provided with the indication whether any stage that history field 1249 is maintained in the batch mode process is provided with corresponding configuration latch.
After piece 1844, end_batch API enters piece 1846, and it illustrates end_batch API routine and resets in preparing the next stage (if the words that have) that all Dial among the DIDS 1202 are provided with field 1239 and all latchs are provided with field 1248.Then, the end_phaseAPI routine ends at piece 1848.
In a word, end_phase () API routine puts on the configuration database 1404 of coupling qualification stage and instance_qualifier with the Dial default value, alternatively configuration latch value is as a result put on analogy model 1400 according to the apply parameter then.At last, the utilization of end_phase () API routine is provided with history field 1249 and follows the tracks of which latch data structure 1204 and has been set up, and resets that each is provided with field to prepare the next stage (if the words that have).
So far, the session information that only provides about the deviser of appointment in hdl file 800 or configuration specified file 802 has been described default value.For a lot of analogy models 1400, therefore the deviser has only the homing sequence and the corresponding hard-wired limited knowledge of analogy model 1400, realizes that for suitably initialization analogy model 1400 or corresponding hardware the stageization of required default value has only limited understanding.Therefore, expect downstream user such as analog subscriber, experiment user or implement the support staff specified control Dial is provided the ability of the session information that default value applies.
Shown in Figure 18 C, in one embodiment, allow the user to utilize program 1860 to provide and/or revise Phase I D in the Phase I D field 1227 that is stored in configuration database 1404 or corresponding hardware configuration database (following discussion).Program 1860 comprises one group of data base manipulation API routine 1862, when calling with suitable parameter, allows the user to read and write phase ID in configuration database 1404 (or corresponding hardware configuration database).
Referring again to Figure 14, provisioning API 1406 preferably also comprises find_unset_latch () API, in configuration database 1404, Dial or Dial group example is carried out after the batch mode setting, with reference to all the latch data structures 1204 in the latch array of pointers 1210 audit configuration databases 1404, so that detect as yet not by configuration latch (that is the configuration latch that history field 1249 is set that, has vacation of being made as (FALSE)) explicit or the default setting configuration.For each such configuration latch that is not set up, find_unset_latch () API preferably the latch name field 1244 from corresponding latch data structure 1204 and the latch that is not set up of control top layer Dial example limit the example of the qualification fully title that example body identifier returns configuration latch fully.Therefore, find_unset_latch () API provide a kind of auto-mechanism, allows user rs authentication need all Dial and latch example explicit or default setting correctly to be disposed, to carry out dry run.
Provisioning API 1406 preferably also comprises check_model () API, and when being called, it utilizes top layer array of pointers 1206 to be made as one of its legal value with reference to each top layer CDial and LDial example in the suitable mapping table 1224 checking analogy models 1400.Any top layer LDial or the CDial that are made as legal value return by check_model () API.
Dial that the present invention introduced and Dial group primitive can be used to not only dispose the analogy model of aforesaid digital Design, and configuration is used for the hardware realization of the digital Design of experiment test and client's use.According to an important aspect of the present invention, the hardware of digital Design is realized disposing by the reference hardware configuration database, and wherein hardware configuration database is as above-mentioned configuration database 814 and 1404, from specifying statement to obtain by the configuration of deviser's coding.By this way, from the design of digital Design, all there is the continuity of collocation method to its commercial enforcement by simulation and experiment test.
Referring now to Figure 19, it shows the high-level block diagram that is used to test and debug the hard-wired experiment test system of one or more digital Design according to the embodiment of the invention.As shown in the figure, experiment test system 1900 comprises the data handling system 1902 that is intended to commercial distribution and enforcement.For experiment test and debugging, data handling system 1902 test interface 1903 are coupled in workstation computer 1904, its test interface 1903 is communicated by letter with data handling system 1902, with each assembly of configuration data disposal system 1902 to carry out correct operation.When by commercial enforcement, assembly shown in data handling system 1902 comprises, but typically not test interface 1903 be coupled in workstation computer 1904.
Except its function logic separately, integrated circuit (IC) chip 1910 all also has test port controller 1912 separately, and its support utilizes a plurality of scan chains that integrated circuit (IC) chip is carried out exterior arrangement, describes in detail with reference to Figure 20 as following.In order to allow this exterior arrangement, each test port controller 1912 is coupled in service processor 1920 in the data handling system 1902 by test access port (TAP) 1914.
The software and the data that are stored in the flash ROM 1924 comprise system firmware 1930a.System firmware 1930a is carried out by the processing unit 1922a of service processor 1920 when energising, give integrated circuit (IC) chip 1910 with power supply, carry out various initialization procedures and test, the communication between the integrated circuit chips 1910, and the operation of startup functional clock.System firmware 1930a comes the startup behavior of control integrated circuit chip 1910 by the communication via test access port 1914.
Except system firmware 1930a, flash ROM 1924 is also stored hardware (HW) provisioning API 1934a and the HW configuration database 1932a that describes integrated circuit (IC) chip 1910.As described below, between commercial implementation period, processing unit 1922a calls each HW provisioning API 1934a with visit HW configuration database 1932a, so that by I/O interface 1926a and TAP 1914 collocating integrate circuit 1910 suitably.
The workstation computer 1904 that for example can be embodied as the data handling system 6 of multiprocessor computer system such as Fig. 1 is included in a lot of assemblies that are similar to service processor 1920 on the function.Therefore, identical Reference numeral is represented processing unit 1922b, volatile memory 1928b, I/O interface 1926b and is resided in system firmware 1930b, HW configuration database 1932b and HW provisioning API 1934b in the Nonvolatile memory devices 1934 (for example, disc memory device).Those skilled in the art is to be understood that, because the system firmware 1930b, the HW configuration database 1932b that reside in the Nonvolatile memory devices 1940 are become initialization and configuration data disposal system 1902 in the context of experiment test and debugging with HW provisioning API 1934b by specific design, therefore with flash ROM 1924 in corresponding software compare with data, they can have littler, bigger or simple different feature set and abilities.
Between experiment test and limber up period, workstation computer 1904 is taked most of function of service processor 1920.For example, workstation computer 1904 comes initialization and configuration data disposal system 1902 by executive system firmware 1930b and each HW provisioning API 1934b, thereby generates each I/O order.Then, test interface 1903 and I/O interface 1926a and 1926b are sent to data handling system 1902 with these I/O orders.Under most of forbidden " bypass " pattern of its local function, the system firmware 1930a that carries out in service processor 1920 sends to integrated circuit (IC) chip 1910 by test access port 1914 that these exterior I/O order responds these orders, thus initialization and collocating integrate circuit chip 1910.
Referring now to Figure 20, it shows the more more detailed block diagram according to example integrated circuit chip 1910 of the present invention.As mentioned above, integrated circuit (IC) chip 1910 comprises test port controller 2000, the I/O interface 1926 of the service processor 1920 of its support and Figure 19 carries out each built-in function of PERCOM peripheral communication and control integrated circuit chip 1910, comprises the operation of functional clock 2002 and scan clock 2010.Integrated circuit (IC) chip 1910 also comprises function logic (not explicit illustrating), and it comprises in response to the time clock of functional clock 2002 carries out " work " that integrated circuit is designed to be done, for example, and the process software instruction.A plurality of function latchs 2004 are distributed in the functional logic circuit, normal function operating period of function logic (promptly, when 2002 pairs of function logics of functional clock carry out timing), these function latchs 2004 are preserved the dynamical state of presentation function logic and the bit of data and/or instruction.These function latchs 2004 comprise that preserving the configuration that is used for expectation comes the function latch of the pattern and the configuration bit of configuration feature logic.
As shown in the figure, function latch 2004 in groups is interconnected, to form a plurality of test scan chain 2006 and a plurality of SCOM (scanning is communicated by letter) chain 2008.Though for the sake of brevity and not shown, some function latchs 2004 in fact be the member of test scan chain 2006 be again the member of SCOM chain 2008.Test scan chain 2006 is used for scanning bit in function latch 2004 in response to the pulse of scan clock 2010, and SCOM chain 2008 is used for scanning bit in function latch 2004 in response to the pulse of functional clock 2002.Functional clock 2002 and scan clock 2010 are not exported pulse simultaneously, to prevent to be loaded into the conflict between the value in the function latch 2004.
As shown in the figure, each the function latch 2004 in the test scan chain 2006 comprises at least two data inputs, i.e. scanning input (scanin) and function input (D
In), and two clock inputs, i.e. scan clock input (sclk) and functional clock inputs (fclk).Each function latch 2004 also comprises at least two data outputs, i.e. scanning output (scanout) and function output (D
Out).In order to form test scan chain 2006, test port controller 2000 is coupled in the scanning input of the first function latch 2004 and the scanning output of last function latch 2004, and the scanning input that (except last) is connected to next function latch 2004 is exported in the scanning of each function latch 2004 in the test scan chain 2006.
Go up the pulse of scan clock 2010 in response to sclk, data bit on each function latch 2004 input (latch in) its scanin, and output (latch out) its preceding value on scanout, and in response to the pulse that on fclk, receives functional clock 2002, input D
InOn data bit, and export its preceding value.Therefore, repetition pulse by scan clock 2010 takes place, the function latch 2004 that forms test scan chain 2006 imports data bit into and to its outgoi8ng data bit in the mode of " bit group bucket (bit-bucket brigade) " from test port controller 2000, thus the one or more function latchs 2004 that allow test port controller 2000 to read or write in the test scan chain 2006.
SCOM chain 2008 be used for when functional clock 2002 effectively and scan clock 2010 read and write-in functions latch 2004 when invalid.Each SCOM chain 2008 comprises a plurality of SCOM unit 2012 that are linked in sequence, wherein first is connected to test port controller 2000 with last, scans data bit to allow test port controller 2000 that data bit is scanned 2012 neutralizations of SCOM unit from SCOM unit 2012.As shown in the figure, in the exemplary embodiment, each SCOM unit 2008 comprises the function latch 2004 of the part of formation " SCOM register ", and the video latch 2014 that forms the part of " shadows register (shadow register) ".If all shadows register 2014 also belong to test scan chain 2006 as function latch 2004, then be preferred.
As shown in the figure, each the function latch 2004 in each SCOM unit 2012 is connected to related multiplexer 2020, and its scanning input (scomin) is coupled in the output of corresponding video latch 2014, and its data input (D
In) be coupled in the data output (D of correlation function latch 2004 by storing path
Out).Multiplexer 2020 is selected data input (D in response to selecting signal sel2
In) and one of scomin on data bit, as the input of function latch 2004.Function latch 2004 latchs the selected data bit in response to functional clock fclk.
Video latch 2014 in each SCOM unit 2012 is connected to similarly has data input (D
In), preserve the related multiplexer 2022 of input and scanning input (scomin), its data input (D
In) be coupled in the data output (D of function latch 2004
Out), and it preserves input is coupled in video latch 2014 by storing path output.In a SCOM unit 2012, the scanning input is connected to test port controller 2000, and in all the other SCOM unit 2012, the scanning input is connected to the output of the video latch 2014 in the last SCOM unit 2012.The output of the shadows register 2014 of last SCOM unit 2012 is connected to test port controller 2000 in each SCOM chain.Multiplexer 2022 is selected the data bit from its input in response to selecting signal sel1, as the input of related video latch 2014.Video latch 2014 latchs the selected data bit in response to functional clock fclk.
The shadows register chain is used for from related SCOM register read value with to its value of writing.For example, for the SCOM register is set, test port controller 2000 by safeguard (asserting) select sel1 appropriate value, via the scomin input of multiplexer 2022 with new scan value in video latch 2014.In case all video latchs 2014 all are loaded, test port controller 2000 just control is selected input sel2, so that function register 2004 is from video latch 2014 loading values.For from SCOM register read value, test port controller 2000 drives sel1, reads the video latch 2014 will be worth from function latch 2004, scans value in the video latch 2014 by the appropriate value of safeguarding selection sel1 then.
In the exemplary embodiment, SCOM chain 2008 adopts video latchs 2014 reading and write-in functions latch 2004, thereby avoids destroying integrated circuit (IC) chip 1910 or or even the correct feature operation of data handling system 1902.By loaded all video latchs 2014 before upgrading any function latch 2004, all functions latch 2004 in the SCOM chain 2008 can be updated immediately, and can not destroy its value in a plurality of cycles of functional clock 2002.Should be understood that, realize that the present invention does not require the specific implementation of SCOM chain 2008 shown in Figure 20, and can take other optional designs, comprise some designs that do not contain video latch 2014.
Like this, by appropriate value being loaded in the function latch 2004, and suitable control by functional clock 2002 and scan clock 2010, each test port controller 2000 can be according to the input from service processor 1920 and/or workstation computer 1904, with expectation mode initialization and its integrated circuit (IC) chip 1910 of configuration.
For configure hardware function latch 2004 in the above described manner, must generate the HW configuration database 1932 of considering the difference between simulation and the hardware environment.Generally speaking, at least two key distinctions of reflection of the structure of HW configuration database 1932 and content and the above-mentioned configuration database that is used to simulate 814.
First difference is to adopt the mode of latch being carried out addressing in hardware.Particularly, replace as in simulation, utilize the example of the qualification fully body identifier of configuration latch, come each interior hardware capability latch 2004 of the specific integrated circuit (IC) chip of addressing and visit 1910 by the ordered pair of forming by the skew of the bit position of latch in the scan chain of specifying fc-specific test FC scan chain 2006 (or ring) identifier and the expression test scan chain 2006, to carry out test scan.SCOM ring 2008 interior function latchs 2004 use the similar ordered pair of (ring identifier, skew) to be addressed similarly and visit, and to carry out SCOM scanning, wherein this ordered pair is specified the skew of the video latch 2014 of specific SCOM chain 2008 and correspondence.Importantly, not identical with the skew value of the skew of SCOM ring identifier and specific function latch 2004 with corresponding test scan ring identifier.In fact, in optional SCOM realizes, can use different SCOM hardware, and skew can be expressed as polynary group: (ring ID, register, skew).Therefore, should be understood that function register 2004 can utilize multiple access method to be addressed and visit, wherein each access method all can have its oneself addressing scheme, the scheme that all these schemes will be different from simulation to be adopted equally.
Second important difference between HW configuration database 1932 and the configuration database 814 that adopted in simulation is the conceptual data library structure.As mentioned above, configuration database 814 is the single databases that can be used to represent by layering nested designs entity the arbitrarily selected digital Design of any size or complexity.New configuration database 814 is generated by configuration compiler 808 at each different digital design of being simulated.Though this method is gratifying in simulated environment, the single database structure that is adopted in simulation does not correspond to the actual physics mechanism that visits and be provided with the hardware latch in the hardware digital Design.And, be desirably in and avoid in the experimental situation arranging and complete new system firmware 1930 and the HW configuration database 1932 of exploitation at each different hardware.For example, expectation is by re-using some or all of specific HW configuration database 1932 and system firmware 1930, each server computer with in the server product line of initialization and configuration 8 to 32 processing units of support and 1 to 4 different memory controller minimizes development time and cost.
Therefore, discussed in more detail below, HW configuration database 1932 preferably is configured to the association than small database, and wherein each is than the particular type (but not example) of small database corresponding to the integrated circuit (IC) chip in the hardware digital Design.This database structure is supported from identical " structure piece " the HW configuration database 1932 by the hardware system of any desired size of chip type database construction and complexity.And, this database structure reflection hardware latch by chip ground by system firmware 1930 this fact that conducts interviews.
Referring now to Figure 21, its analog configuration database 814 that shows each integrated circuit (IC) chip of conversion is used for constructing the high-level flow of the example process of the chip HW database that is suitable for experiment test and debugging and the commercial HW configuration database of implementing 1932 with acquisition.Shown in process can realize by executive software on the data handling system 6 of Fig. 1.
This process starts from carrying out scan chain testing tool 2100.The analogy model 1400 of each integrated circuit (IC) chip 1910 in scan chain testing tool 2100 processing target hardware systems such as the data disposal system 1902 thinks that integrated circuit (IC) chip 1910 interior latchs produce each output file corresponding to each function latch access path/method.For example, in this exemplary embodiment, scan chain testing tool 2100 produces corresponding to the test scan defined file 2104 of test scan and the SCOM defined file 2102 that scans corresponding to SCOM.Each of these files 2102,2104 provide the scan cycle identifier and the skew (perhaps other hardware addresss of associated access method) of latch for the latchs in the analogy model 1400 and be used to simulate purpose its limit the corresponding relation of latch Instance Name between being referred to as fully.
Then, test scan defined file 2104 and SCOM defined file 2102 and analog configuration database 814 by database crossover tool 2106 processing integrated circuit chips, to generate chip HW database 2108, it can be used as the structure piece, has the HW configuration database 1932 of the hardware system of any system size and the component list with acquisition.
Referring now to Figure 22 A, it shows database crossover tool 2106 with reference to test scan defined file 2104 and SCOM defined file 2102, produces the logic high level process flow diagram of the example process of chip HW database 2108 from the corresponding analog configuration database 814 of integrated circuit (IC) chip.As shown in the figure, this process starts from piece 2200, enters piece 2201 then, and it illustrates analog configuration database 814 is loaded into the volatile memory from nonvolatile data storage, and increase its field with top with reference to the described mode of Figure 13, with the configuration database 1404 that obtains to launch.Test scan defined file 2104 and SCOM defined file 2102 also are loaded onto in the volatile memory.
Next step at piece 2202, determines whether all latch data structures 1204 of being quoted by latch array of pointers 1210 are all processed.If then this process ends at piece 2204.Yet, all processed if not all latch data structures 1204, then this process passes to piece 2206 from piece 2202, and it illustrates selects to handle the latch data structure 1204 by 1254 sensings of the next latch pointer in the latch array of pointers 1210.Next step, at piece 2208, the content of the example name field 1234 of the Dial example by using parent pointer 1242 these latchs of access control also appends to the content of latch name field 1244 with these contents, forms the latch of the qualification fully title with the latch data structure 1204 corresponding latchs of current consideration.
Then, in test scan defined file 2104, search for this and limit the latch title fully, shown in piece 2210.If do not find this to limit the latch title fully in test scan defined file 2104, then in piece 2212 sign mistakes, because in this exemplary embodiment, all configurable latchs must scan.Otherwise database crossover tool 2106 calls API routine add_access_method at piece 2214, and (method_id method_name), thereby forms new latch data structure 2230 to enlarge latch data structure 1204.The method_id of this API Calls (method ID) parameter identification particular access method (for example, adopt character string or integer), and method_name (method name) parameter is specified by the associated access method and is used in hardware visit corresponding to " title " of the latch of new latch data structure 2230.Shown in Figure 22 B, at piece 2214, by increase the method id field 2232a (being conveniently " 0 ") of the method identifier of specifying this access method to latch data structure 1204, with the test scan ring identifier of specifying latch and the method name field 2234a of off-set value, create new latch data structure 2230.
This process enters piece 2216 from piece 2214, and the defined file of next access method is used in its expression, be SCOM defined file 2102 in this example, repeat piece 2210 execution to limiting the search of latch example title fully.If in SCOM defined file 2102, do not find and the coupling that limits latch example title fully, misregistration not then, because not all latch all belongs to the SCOM chain, and this process passes to the piece 2220 that describes below simply, on the other hand, if the coupling of finding, then call add_access_method () API routine once more, to increase the method id field 2232n of the method identifier of specifying this access method to latch data structure 2230 and to specify the SCOM scan cycle identifier of latch and the method name field 2234n of off-set value at piece 2218.
At last, at piece 2220, call API routine delete_latch_name () and come deletion latch name field 1244 from latch data structure 2230.Because ring identifier and skew to any latch in the unique identification integrated circuit (IC) chip 1910, therefore no longer need latch name field 1244.Then, this process turns back to the piece of having described 2202.
Like this, the method for Figure 22 A changes the analog configuration database of each integrated circuit (IC) chip, can be used for the information of latch " method name " (being identifier) of access method and every kind of available access methods of each hardware capability latch to comprise expression.Revise the analog configuration database supporting two kinds of particular access method though shown process illustrates, shown in method can be used to handle the access method of any number or type.
In case handled all analog configuration databases of each integrated circuit in the system, then can make up the chip hardware database 2108 that draws, to form HW configuration database 1932 shown in Figure 19 in the mode shown in Figure 21 and the 22A.In a preferred embodiment, come from chip HW database 2108 structure HW configuration databases 1932 by creating chip pointer data structure 2320 (Figure 23 B), its chips pointer data structure 2320 comprises each chip database pointer 2322 of the chip HW database 2108 of every kind of chip type in the reference data disposal system 1902.For example, if data handling system 1902 comprises 32 identical integrated circuit processor chips, then chip pointer data structure 2320 (except with corresponding other chip database pointers 2322 of other integrated circuit (IC) chip types) will only comprise a chip database pointer 2322, it point to describe the single chip HW database 2108 of the digital Design of being implemented by 32 integrated circuit processor chips.Then, this HW configuration database 1932 is stored in the Nonvolatile memory devices, as Nonvolatile memory devices 1940 or flash ROM 1924, as shown in figure 19.
In order to utilize HW configuration database 1932 configure hardware digital Design,, HW configuration database 1932 is loaded into the volatile memory from Nonvolatile memory devices at first according to the example process shown in Figure 23 A.Process shown in Figure 23 A can be by by processing unit 1922b executive system firmware 1930b, be for example carried out in experimental situation by workstation computer 1904.Similarly, when commercial implementation data disposal system 1902, service processor 1920 is according to the process executive system firmware 1930a of Figure 23 A, so that HW configuration database 1932a is loaded into volatile memory 1928a from flash ROM 1924.
As shown in the figure, the process of Figure 23 A starts from piece 2300, enters piece 2302 then, and it illustrates determines target data disposal system such as the type of data disposal system 1902 interior integrated circuit (IC) chip and every type number.In the exemplary embodiment, carry out determining shown in the piece 2302 by system firmware 1930, it seeks advice from one group of so-called Vita product data (VPD), any with in thousands of kinds possible machines configurations of specified data disposal system 1902 expressions.
Then, this process enters piece 2306-2310, and it forms circulation together, wherein walks about (walk) in chip pointer data structure 2320, to handle the chip HW database 2108 of the integrated circuit (IC) chip of forming data handling system 1902.At first, at piece 2306, whether the chip HW database 2108 of every kind of integrated circuit (IC) chip type is all processed in the specified data disposal system 1902.If finish that then HW configuration database 1932 is loaded in the volatile memory, and this process ends at piece 2312.Yet,, next chip HW database 2108 is loaded in the volatile memory 1928 of workstation1 904 to deal with at piece 2308 if with not processed as yet by the every kind of corresponding chip HW of integrated circuit (IC) chip type database 2108 of VPD sign.
As illustrate shown in Figure 23 B of storer internal view of HW configuration database 1932, the loading of chip HW database 2108 is created aforesaid storer internal data structure, as the example array of pointers 1226 (seeing Figure 12) in Dial array of pointers 1208, latch array of pointers 1210 and each DDDS 1200.In addition, establishment latch value field 2324, latch are provided with field 2326 and history field 2325 are set in each latch data structure 2230, and establishment Dial is provided with field 2328 in each DIDS 1202.Each of these three fields is implemented as array, wherein each clauses and subclauses corresponding to the particular instance of current chip HW database 2108 corresponding integrated circuit (IC) chip 1910.At last, create hollow sheet mapping table 2325.
Next step, at piece 2310, each example at corresponding to the integrated circuit (IC) chip type of current chip HW database 2108 is increased to chip mapping table 2325 with corresponding clauses and subclauses.This step is preferably by carrying out calling by system firmware 1930 of HW provisioning API 1934, wherein this calls visit VPD, to determine to have comprised how many examples corresponding to the integrated circuit (IC) chip type of current chip HW database 2108 in current hardware digital Design.By convention, the clauses and subclauses order in the chip mapping table 2325 is provided with the order that field 2328, latch value field 2324 and latch are provided with array clauses and subclauses in the field 2326 corresponding to Dial.
Shown in Figure 23 B, related two values that firmware provides of each clauses and subclauses in the chip mapping table 2325: (1) chip example title, it as the character string of the character string of the design entity of sign expression integrated circuit (IC) chip example in the analogy model of data handling system 1902 (for example is, a.b.c.d), (2) chip id, specified services processor 1920 is by the identifier of the test access port 1914 of itself and that integrated circuit (IC) chip instance communications.Like this, any latch in the data handling system 1902 now can be easily by polynary group of (chip id, scan cycle, skew) come addressing, this polynary group chip identification part correlation that limits the latch title fully that is adopted by chip mapping table 2325 and HW provisioning API 1934 joins.Then, this process turns back to the piece of having described 2306.
Like this, process shown in Figure 23 A allows to utilize single HW configuration database 1932 to be the data handling system of arbitrary dimension or configuration to make up HW configuration database in the storer, is each possible system size and configuration exploitation and the storage needs of single configuration database independently thereby eliminated.
Under HW configuration database 1932 is loaded onto situation in the volatile memory 1928, system firmware 1930 can be carried out by the processing unit 1922b of the processing unit 1922a of service processor 1920 or workstation computer 1904 then, reads or be provided with the configuration of one or more integrated circuit (IC) chip 1910 of data handling system 1902 to call HW provisioning API 1934.As in simulation, HW provisioning API 1934 preferably includes independent API routine, to read Dial and Dial group in mutual and batch mode.As simulation, the API Calls of system firmware 1930 is organized example given instance qualifier (for example, a.b.c.d or a.b.c.[X]) and Dial title qualifier (for example, entity .Dial title) for each Dial that will be provided with or read or Dial.
Owing to can utilize multiple access method to be provided with or to read Dial or Dial group, the API Calls that therefore is used for being provided with or reading Dial or Dial group example preferably includes additional parameter access_method (access method).In a preferred embodiment, but access_method parameter value: SCAN, the expression test scan; SCOM, expression SCOM scanning; And AUTO, expression HW provisioning API 1934 will be selected access method.AUTO value in response to the access_method parameter, HW provisioning API 1934 according to API Calls at latch data structure 2230 in represented support access method of method ID 2232 and in functional clock 2002 and the scan clock 2010 which move, select access method.As mentioned above, when SCOM scanning only can be used for functional clock 2002 and moving, and test scan is when only can be used for scan clock 2010 and moving.
Before any HW provisioning API 1934 can be provided with or read Dial or Dial group example, HW provisioning API 1934 must determine at first that the example qualifier of appointment in API Calls and Dial title qualifier have identified which Dial or Dial group example.Referring now to Figure 24, show according to the present invention, HW provisioning API 1934 is located the logic high level process flow diagram of the example process of specific Dial or Dial group example in HW configuration database 1932.Shown in process be similar to process shown in Figure 15 and recited above.
As shown in the figure, this process response in HW provisioning API 1934 receive with the example qualifier of one or more Dial or Dial group example and Dial title qualifier be parameter, start from piece 2400 from the API Calls of firmware 1930, as mentioned above.In response to this API Calls, provisioning API 1934 enters HW configuration database 1932 in chip array of pointers 2320, and shown in piece 2402, enter circulation, wherein the process chip database pointer 2322, till in certain chip HW database 2108, having located one or more coupling Dial examples, perhaps till all chip database pointers 2322 are all processed.Do not locate any coupling Dial example in response to determining at piece 2402 that all chip database pointers 2322 are all processed, then this process with error ending in piece 2403.Yet,, from chip pointer data structure 2320, select next chip database pointer 2322 to deal with, shown in piece 2406 if it is processed to be less than all chip database pointers 2322.Utilize selected chip database pointer 2322 to locate related chip HW database 2108.
After piece 2406, this process enters piece 2408 and following piece, it represents cycle of treatment, wherein handle each the Dial pointer 1252 in the Dial array of pointers 1208 of current chip HW database 2108, till the specific Dial that has located the coupling API Calls, perhaps all Dial pointers 1252 (Figure 12) are all processed and do not find till any coupling Dial example.Do not locate any coupling Dial entity in response to determining at piece 2408 that all Dial pointers 1252 are all processed, this process turns back to piece 2402 from piece 2408, thereby the next chip database pointer 2322 in the process chip array of pointers 2320 (that is, handling next chip HW database 2108).On the other hand, if determine it is not that all Dial pointers 1252 Dial array of pointers 1208 in are all processed at piece 2408, then this process enters piece 2410, and it illustrates from Dial array of pointers 1208 the next Dial pointer 1252 of selection to deal with.
Next step determines whether have the name field 1222 that accurate coupling is specified Dial title qualifier by the DDDS 1200 that current Dial pointer 1252 is quoted at piece 2412.1222, two kinds of realizations are possible about name field.The first, can forbid re-using of Dial title, so that each Dial title is not only in its oneself integrated circuit (IC) chip but also all be unique in total system (for example, data handling system 1902).The second, still less Xian Zhi method is that each Dial title of requirement is unique in its integrated circuit (IC) chip 1910 only, and allows repeatedly to use in different integrated circuit the Dial title.In order to support second method, name field 1222 is taked the form of " chiptype (chip type) .Dial name (title) ", wherein " chip type " is the unique string of the type of sign integrated circuit (IC) chip 1910, thereby eliminates the ambiguity that is applied to the identical Dial title of the Dial entity of instantiation in different integrated circuit (IC) chip 1910.
Specify Dial title qualifier in response to determining that at piece 2412 name field 1222 does not match, this process turns back to piece 2408, to handle next Dial pointer 1252 (if the words that have), as mentioned above.Yet, if the coupling of finding, then this process enters the circulation that comprises piece 2420-2434, example pointer 1228 in the example array of pointers 1226 of the DDDS 1200 of wherein utilization coupling Dial entity, inspection is mated with the example qualifier with API Calls by the Dial example of each DIDS 1202 expressions.In this cycle of treatment, at first determine at piece 2420 whether all the example pointers 1228 in the current DDDS 1200 are all processed.If then further determine whether to find at least one coupling example corresponding to the Dial entity of current DDDS 1200 at piece 2434.This determines only to guarantee maximum coupling Dial (but not Dial example) in the chip HW database 2108 and will mate that the example qualifier of appointment in API Calls and Dial title qualifier carry out owing to the structure of HW configuration database 1932.Therefore, if find the coupling example of specific Dial entity, then need not to search for other Dial entity or chip HW database 2108.Thereby, if determine that then this process passes to piece 2438 from piece 2434, and stops for finding the Dial example of at least one coupling with current DDDS 1200 corresponding Dial entities.Yet if determine not find couplings at piece 2434, this process is by a page or leaf connector A, and with error ending in piece 2403.
Turn back to piece 2420, in response to determining it is not that all example pointers 1228 of current DDDS 1200 are all processed, then this process enters piece 2422, and it illustrates selects next example pointer 1228 and related DIDS 1202 thereof to deal with.Then, piece 2424 determine by each clauses and subclauses in the process chip mapping table 2326 for current chip HW database 2108 corresponding each integrated circuit (IC) chip 1910 in the Dial example, whether DIDS 1202 processed.If then this process passes to the piece 2436 that describes below.Processing as all clauses and subclauses in the fruit chip mapping table 2325 is not finished as yet, and then this process enters piece 2426.
Each clauses and subclauses in the chip mapping table 2325 are repeated the cycle of treatment represented by piece 2424-2432.After all clauses and subclauses are all processed, this process passes to piece 2436 from piece 2424, it illustrates determines whether Dial title qualifier is to utilize not to be with the grammer of square bracket to come appointment, and if then determine in Dial example, whether to find the coupling of specifying Dial title qualifier by current DIDS 1202 expressions.If it is fixed to determine whether, then might be able to there be the other coupling Dial example that is associated with another DIDS 1202.Thereby this process turns back to piece 2420, to handle the next example pointer 1228 of current DDDS 1200.Yet determining of if block 2436 is sure, and known all coupling Dial examples all are positioned, and are identified with related chip vector with interim result pointer.Therefore, this process ends at piece 2438.
After the Dial or Dial group example that have determined by process shown in Figure 24 by example qualifier and the appointment of Dial title qualifier, to be provided with or to read Dial or Dial group example with reference to Figure 16 A (in interactive mode, reading the Dial example), Figure 16 B (in interactive mode, reading Dial group example), Figure 17 A (the Dial example is set), Figure 17 B (Dial group example is set) and the described roughly the same mode of Figure 18 A-18B (Dial example or Dial group example is set) in interactive mode in interactive mode in batch mode with top.Yet, need some to distinguish and consider to use single chip HW database 2108, to express possibility a plurality of integrated circuit (IC) chip 1910 and with the availability of a plurality of different access methods that visit integrated circuit (IC) chip 1910.These differences are described in detail below.
When reading Dial example or Dial group example, verify the latch value by in configuration database, propagating the latch value, as described in the piece 1624 of reference Figure 16 A along Dial tree " making progress ".On the contrary, when Dial example or Dial group being set during example, in configuration database along Dial tree " downwards " propagation Dial value to the latch data structure, as top with reference to as described in the piece 1714 of Figure 17 A.In simulation, once only a latch value " downwards " propagates into any one latch data structure 1204 or from its propagation that " makes progress ".Yet, because HW configuration database 1932 adopts a plurality of integrated circuit (IC) chip 1910 of single chip HW database 2108 expression same types, so the chip HW database 2108 of a plurality of physics integrated circuit (IC) chip 1910 of referential expression reads or is provided with Dial or Dial group example need be along a plurality of elements of the parallel set of propagation values up or down of Dial tree, and wherein each element of this value set is the value by the certain chip example of interim result pointer of constructing in Figure 24 and chip vectorial.
Similarly, in simulation, the Dial in the configuration database 1404 be provided with that field 1239, latch value field 1246, latch be provided with field 1248 and history field 1249 is set each only comprise single value.On the contrary, the corresponding Dial in the HW configuration database 1932 are provided with field 2328, latch value field 2324, latch and field 2326 are set and history field 2325 is set and be implemented as wherein each element corresponding to the array of the Dial separately or the latch example of specific integrated circuit (IC) chip 1910.Thereby, when Dial, Dial group or latch example are set, according to interim result pointer of in Figure 24, constructing and chip vector, upgrade corresponding to the Dial that example is set field 2328, latch value field 2324, latch to be set and field 2326 to be set and element in the history field 2325 is set.
Because the experiment of HW configuration database 1932 or commercial use need utilize and a plurality ofly may access methods visit physical hardware (that is, integrated circuit (IC) chip 1910), therefore note three differences in addition with simulated environment in a preferred embodiment.First, if determining to be included in the represented access method of access_method parameter in the API Calls, HW provisioning API 1934 is not useable for any Dial example that interim result pointer that the process by Figure 24 obtains and chip vector are identified, the setting or the read operation of then in API Calls, asking preferably fail (promptly not being performed).As mentioned above, can be provided with or read of method id field 2232 expressions of the access method of each latch by each latch data structure 2230.
Second, best, have only HW provisioning API 1934 determine API Calls institute at each integrated circuit (IC) chip 1910 in functional clock 2002 and scan clock 2010 appropriate state that is in the access_method parameter that is included in the API Calls, setting of asking in API Calls or read operation are just successfully.Just, if the access_method parameter has the SCAN value, then functional clock 2002 must be disabled, and scan clock 2010 must be activated.On the contrary, if the access_method parameter has the SCOM value, then functional clock 2002 must be activated, and scan clock 2010 must be disabled.If the access_method parameter has the AUTO value, then comprise by API Calls at the functional clock 2002 of each integrated circuit (IC) chip 1910 of latch and scan clock 2010 state that must be at least one access method that allows to adopt each such latch.
The 3rd, be used for reading and being provided with the HW provisioning API 1934 of hardware latch, read (reading) _ latch (latch) () and write (writing) latch () preferably by in volatile memory 1928, realize video scan chain impact damper and may the time replace scan chain in the scan IC chip 1910 to scan this scan chain impact damper minimizing scanning visit to integrated circuit (IC) chip 1910.For example, latch value in volatile memory 1928 is known as under the up-to-date situation, with GETFAC () the corresponding read_latch of API1412 () the HW provisioning API 1934 that in simulation, adopts preferably the corresponding video scan chain impact damper from volatile memory 1928 obtain the latch value.In addition, by repeatedly upgrading in the video scan chain impact damper that is preferably in the volatile memory 1928 of latch value being cushioned with PUTFAC () the API 1414 corresponding write_latch () that in simulation, utilize.In this way, can once carry out by only scanning specific scan chain repeatedly writing of the latch in the specific scan chain of integrated circuit (IC) chip 1910.
The similar check_chip of check_model (inspection model) () API (inspection chip) () API during HW provisioning API 1934 preferably also comprises and can be used for simulating.When being called, checK_chip () API utilizes the top layer array of pointers 1206 of specifying in the chip HW database 2108, is made as one of its legal value with each top layer CDial and LDial example in the proofing chip HW database 2108.Specifically, check_chip () API upwards propagates bottom hardware latch value by the mapping table 1224 with reference to any low layer Dial example in its mapping table 1224 and its Dial tree along the Dial tree of each top layer CDial and LDial example.Return any top layer LDial or the CDial example that is made as illegal value by check_chip () API.
Referring again to Figure 19, in a lot of commercial embodiment of data handling system 1902, Nonvolatile memory devices in the service processor 1920 (for example, flash ROM 1924) memory capacity is significantly less than being used for the memory capacity of Nonvolatile memory devices 1940 (for example, harddisk storage device) of workstation computer 1904 of storage system firmware 1930b and HW configuration database 1932b.Thereby, usually expectation maybe needs to reduce the system firmware 1930b that develops and the size of HW configuration database 1932b in the experiment hardware test environment, to obtain the system firmware 1930a and the HW configuration database 1932a of commercial enforcement the flash ROM 1924 (or other Nonvolatile memory devices) of data handling system 1902 in.
Thereby, referring now to Figure 25, thereby it shows and can be compressed in the logic high level process flow diagram that the experimental development of system firmware 1930 and each chip HW database 2108 that test period is developed obtain to be suitable for the example process of the commercial HW configuration database 1932a that implements by eliminating unnecessary information.This process starts from generating Dial and uses information 2500, the value which Dial example has been set up and/or has read and the Dial example has been set up in the particular type of its expression integrated circuit (IC) chip 1910.
The value of which determining the Dial example being set up or reading and the Dial example has been set up can adopt a lot of methods as well known to those skilled in the art to finish.For example, but hand inspection system firmware 1930 uses information 2500 to produce Dial.Perhaps, system firmware 1930 can be carried out in may machines configurations a plurality of, and these may machines configurations cover all settings that the Dial example in the type of integrated circuit (IC) chip 1910 of current consideration can be set up.The value that Dial example that is set up and reads and Dial example are set up can be registered as Dial then and use information 2500.
In a preferred embodiment, the Dial at the IDial example uses all information of record in the information 2500 are whether the IDial example is set up or reads.Not having Record ID ial example value, is because use the purpose of information 2500 and suppose if the IDial example is set up in order to generate Dial, then can utilize all its probable values.Yet, exist the specific ID ial example known to the developer will only be made as single value.In order to allow to eliminate these IDial from HW configuration database 1932a, these IDial and relating value thereof can be specified in overlay file 2502 by the developer alternatively.Overlay file 2502 can comprise also that the developer expects that explicitly keeps in HW configuration database 1932a and whether be set up or read irrelevant Dial example list (if having) with the Dial example.
Like this, for each chip HW database 2108, preferably obtaining to comprise together at least, the Dial of following message uses information 2500 and overlay file 2502:
The tabulation of the non-IDial example of all top layers that 1) is set up in any example of integrated circuit (IC) chip in any configuration, and the tabulation that is made as any top layer IDial of any value in any configuration in any example of integrated circuit (IC) chip;
2) tabulation of all values of the non-IDial example of each that is set up;
3) be made as the independent tabulation of the IDial of single value; And
The tabulation of all Dial examples that 4) are read.
Shown in Figure 25 is further, then, utilize this information to come from related chip HW database 2108, to eliminate unnecessary information by software tool of compression 2504 (for example, carrying out) by workstation computer 1904.Tool of compression 2504 produces two outputs: (1) forms the compression chip HW database 2506 of the part of HW configuration database 1932a; And (2) are used for being created in the preliminary sweep chain-mapping 2508 of the scan chain reflection that the term of execution the test scan chain 2006 in the integrated circuit (IC) chip 1910 of system firmware 1930a is initialised.As shown in, these preliminary sweep chain-mappings 2508 can non-destructive ground make up with other scan chain input 2510, to obtain final scan chain reflection 2512.
Referring now to Figure 26 A-26C, it shows the logic high level process flow diagram according to the method for tool of compression 2504 compression chip HW databases 2108 of the present invention.As following in detail as described in, shown in method realize at least three kinds of optimised.
The first, if the Dial example will never be provided with or read by system firmware 1930a, then can eliminate the information relevant from chip HW database 2108 with the Dial example.Because this Dial example never is provided with or reads by system firmware 1930a, therefore in HW configuration database 1932a, will never quote DIDS 1202 corresponding to this Dial example, therefore can delete it.It should be noted that system firmware 1930a be not provided with or read the Dial example do not mean that the simulation or experimental debugging during be not provided with or read this Dial example.A lot of Dial examples (for example, mode switch) never are provided with by system firmware 1930a, but tested during simulating, if later firmware revision needs, mode switch is operate as normal also to guarantee.
The information relevant with the Dial example may be that the second unnecessary reason is if the Dial example only is made as a value in all configurations.In this case, can from chip HW database 2108, delete DIDS 1202 corresponding to this Dial example, can be because the effect of Dial example is set by the final scan chain reflection 2512 that scans in the integrated circuit (IC) chip 1910 is set replaces realizing so that latch value that the Dial example obtains to be set.The interior code of system firmware 1930b that the Dial example is set can be eliminated equally, to reduce from the size of experiment test and the final system firmware 1930a that obtains of debugging.
The 3rd, the mapping table 1224 among the DDDS 1200 can never be optimized by the value that system firmware 1930a is provided with by eliminating Dial.
In carrying out aforementioned optimization, give special consideration to the Dial example that is read.Generally speaking, when reading the Dial example, suppose that in following exemplary compression method comprising the whole Dial tree that is read the Dial example must remain in its chip HW database.In addition, suppose all clauses and subclauses in the mapping table that must keep comprising Dial in the Dial tree that is read the Dial example, because in commerce was implemented, hardware can be made as the bottom latch and be different from the value that is read by system firmware.Therefore, can not to need determine which mapping table clauses and subclauses to read the Dial example inferentially.Though these suppose limit compression, they guarantee that each the Dial example that is read can easily be visited, and no matter the Dial example is top layer Dial example or low layer Dial example.
At first with reference to Figure 26 A, this process starts from piece 2600, enters piece 2602 then, and it illustrates tool of compression 2504 chip HW database 2108 is loaded among the volatile memory 1928b, and create storer internal data structure 1208,1210 and 2325, as mentioned above.In addition, shown in piece 2604, tool of compression 2504 is created only by some the additional interim fields in the storer of tool of compression 2506 uses explicitly with each DIDS 1202.These interim fields comprise Dial example value structure (DIVS), and it is used to be stored in Dial and uses the value that related Dial example is set up in the information 2500 (if the words that have).For the IDial example, must special processing DIVS.Particularly, DIVS will be sky, comprise the token (token) that expression IDial example is set up, and perhaps only for top layer IDial example, comprise the single value (if being fit to) that the IDial example is set up.The interim field of creating for each DIDS 1202 at piece 2604 comprises that also the Dial example keeps field (DIPF), if related DIDS should be held (promptly not deleting) from the chip HW database of compression, then it is made as very, otherwise it is made as vacation.The DIPF that is listed in each DIDS 1202 (if having) in the overlay file 2502 as the DIDS explicitly that will keep is initialized to very, and every other DIPF is initialized to vacation.
Then, this process enters piece 2606 from piece 2604, it illustrates tool of compression 2504 and enters circulation, wherein handles each the top layer pointer 1250 in the top layer array of pointers 1206, to use information 2500 to be input to the DIPF and DIVS of each DIDS 1202 from Dial relevant information.If all top layer pointers 1250 are all processed, then this process by page or leaf connector B to Figure 26 B that describes below.Yet if all top layer pointers 1250 are all not processed as yet, the next top layer pointer 1250 in piece 2608 selection top layer array of pointers 1206 is to deal with.
Then, this process passes to piece 2610 and 2612 from piece 2608.Piece 2610 illustrate tool of compression 2504 handle with Dial tree headed by the DIDS 1202 corresponding Dial examples of quoting by current top layer pointer 1250 in each non-IDial.Tool of compression 2504 adds the value that is included in the corresponding Dial example in the Dial use information 2500 to the DIVS of each such DIDS 1202.In addition, shown in piece 2612, tool of compression 2504 handle with Dial tree headed by the DIDS 1202 corresponding Dial examples of quoting by current top layer pointer 1250 in each IDial.For each such IDial, 2500 expression IDial are set up if Dial uses information, and then tool of compression 2504 adds DIVS to token is set.
Next step, at piece 2614, if Dial uses any Dial in the information 2500 expression Dial trees to be read, then tool of compression 2504 be provided with Dial tree headed by the DIDS 1202 corresponding Dial examples of quoting by current top layer pointer 1250 in the DIPF of each DIDS 1202.In other words, if any Dial example in the Dial tree is read, then each DIPF in the Dial tree is made as very.Then, this process enters piece 2616, and it illustrates tool of compression 2504 and checks whether represent that to determine overlay file 2502 IDial only is made as single value with DIDS 1202 corresponding each the top layer IDial that quoted by current top layer pointer 1250 (if the words that have).If then tool of compression 2504 adds the value that is included in the overlay file 2502 DIVS of these top layers IDial to, and if exist, deletes token is set.
Then, this process turns back to piece 2606, its illustrate continue cycle of treatment all top layer pointers 1250 in top layer array of pointers 1206 all processed till.In case all top layer pointers 1250 are all processed, then this process is by page or leaf connector B to Figure 26 B.
Referring now to Figure 26 B, this process enters piece 2620 from page or leaf connector B, and it illustrates second cycle of treatment, wherein handles each the top layer pointer 1250 in the top layer array of pointers 1206.If determine in current cycle of treatment at piece 2620, all the top layer pointers 1250 in the top layer array of pointers 1206 are all processed, and then this process continues by page or leaf connector C and in Figure 26 C.Otherwise this process enters piece 2622, and it illustrates the next top layer pointer 1250 selected in the top layer array of pointers 1206 to deal with.
After piece 2622, by one of decision block 2624,2630 and 2,640 three kinds of conditions representing, check the DIVS and the DIPF that are associated with the DIDS 1202 that quotes by current top layer pointer 1250 at respectively.If determine that at piece 2624 DIPF has true value, if the 1220 expression DIDS 1202 of the type field among the perhaps related DDDS 1200 organize corresponding to Dial, then this process turns back to piece 2620 from piece 2624 simply, to handle next top layer pointer 1250 (if the words that have).
Yet, if determine that at piece 2630 DIPF that is associated with the DIDS 1202 that is quoted by current top layer pointer 1250 has falsity, and related DIVS is empty, then tool of compression 2504 can be deleted DIDS 1202 from chip HW database 2108, because corresponding Dial example all is not set up or reads.Thereby shown in piece 2632, tool of compression 2504 is deleted these DIDS 1202 from chip HW database 2108, and with each the low layer DIDS 1202 in the tree of the Dial headed by the deleted top layer DIDS 1202 (if the words that have).In addition, tool of compression 2504 is from the related top layer pointer 1250 of top layer array of pointers 1206 deletion, and the example pointer 1228 that will point to each deleted DIDS 1202 is made as sky.Then, determine at piece 2634 whether the parent pointer 1233 of deleted DIDS 1202 is made as sky.If then this process turns back to the piece of having described 2620.On the other hand, if parent pointer is not empty, then the top layer Dial example corresponding to deleted DIDS 1202 belongs to Dial group example.Because top layer Dial example never is set up or reads, so each such top layer Dial example can be deleted from its Dial group example separately safely.Thereby shown in piece 2636, tool of compression 2504 is from pointing to the output pointer 1238 of the deleted DIDS 1202 of top layer Dial example corresponding to deletion the DIDS 1202 of Dial group example.If deletion output pointer 1238 has removed the last member of Dial group from the DIDS 1202 of Dial group example, then also from chip HW database 2108, delete DIDS 1202 corresponding to Dial group example.This process continues, and if possible, thereby disintegrates the layering that Dial organizes.After piece 2636, this process turns back to the piece of having described 2620.
Turn back to piece 2640, tool of compression 2504 determines whether that the DIPF that is associated with the DIDS 1202 that is quoted by current top layer pointer 1250 has falsity, and related DIVS comprises single value.If not, then this process turns back to the piece of having described 2620.If then determine further by the father field 1232 of reference DIDS1202 whether the Dial example belongs to the Dial group at piece 2642.If then this process preferably turns back to piece 2620 and is not for further processing, thereby notice DIDS 1202 will be held.DIDS 1202 preferably is held, and is atomic little (atomic) because the operation of Dial group is set, and if in set_Dial_group () API Calls, quote deleted Dial example, then will fail.Do not belong to the Dial group in response to determining at piece 2642 with the DIDS 1202 corresponding Dial examples of being quoted by top layer pointer 1250, this process enters piece 2644.
Referring now to Figure 26 C, processing starts from a page connector C, and enter piece 2660, it illustrates cycle of treatment, wherein handle all the Dial pointers 1252 in the Dial array of pointers 1208, from chip HW database 21 08, to eliminate any unnecessary DDDS 1200 and any unnecessary clauses and subclauses in the mapping table 1224.After all Dial pointers 1252 in Dial array of pointers 1208 were all processed, this process passed to the piece 2690 that describes below.Yet if it is processed to be less than all Dial pointers 1252, this process enters piece 2662 from piece 2660, and it illustrates selects next Dial pointer 1252 to deal with.
After selecting next Dial pointer 1252, whether tool of compression 2504 all example pointers 1228 in the example array of pointers 1226 of piece 2664 definite DDDS 1200 that quoted by current Dial pointer 1252 are empty.If then whole DDDS 1200 is unnecessary, and deleted from chip HW database 2108, shown in piece 2666.After piece 2666, this process turns back to the piece of having described 2660.
Not for empty, then determine further at piece 2670 whether type field 1220 represents that DDDS1200 has defined IDial in response to all the example pointers 1228 in the DDDS 1200 that determines to quote at piece 2664 by Dial pointer 1252.If then the optimization to mapping table 1224 is impossible, and this process turns back to piece 2660.If tool of compression 2504 determines that at piece 2670 DDDS that is quoted by current Dial pointer 1252 does not define IDial, then this process enters piece 2672.Piece 2672 illustrates any DIPF that is associated with any DIDS 1202 that is quoted by example pointer 1228 and whether has true value.If then this condition is represented to be read by at least one Dial example of the Dial of DDDS 1200 definition, therefore needs complete mapping table 1224.Therefore, this process turns back to piece 2660, and does not carry out any optimization to mapping table 1224.
Yet if tool of compression 2504 determines that at piece 2672 all DIPF that are associated with the DIDS1202 that is quoted by example pointer 1228 have falsity, this process enters the cycle of treatment shown in piece 2674,2676 and 2678 from 2672.This cycle of treatment represents that tool of compression 2504 handles each the example pointer 1228 in the example array of pointers 1226 of the DDDS 1200 that is quoted by current Dial pointer 1252, thereby makes up the Dial value set that comprises all values that is provided with by system firmware 1930 corresponding to the Dial example of DIDS 1202.Shown in piece 2678, obtain the Dial value from the DIVS that is associated with each DIDS 1202.By handling after each example pointer 1228 made up the Dial value set, this process passes to piece 2680 from piece 2674.Piece 2680 illustrates each clauses and subclauses in the mapping table 1224 of the DDDS 1200 that tool of compression 2504 deletion quoted by the current Dial pointer 1252 that does not find its Dial input value in the Dial value set.This process continues downwards along the Dial tree, and elimination need not generate the mapping table clauses and subclauses of Dial value set.Therefore, by deleting the mapping table 1224 that unwanted clauses and subclauses are optimized each Dial.Then, this process turns back to piece 2660.
In response to determining that at piece 2660 all the Dial pointers 1252 in the Dial array of pointers 1206 are all processed, tool of compression 2504 is carried out last compression at piece 2690 by the common ground of the example title in the pointer alternate example name field 1234 that complete example title " dictionary " partly is provided with sensing.This compress technique as well known to those skilled in the art is with pointer alternate example title (or its part), and wherein pointer typically significantly is shorter than example title or the example title part that it substituted.As the step in the process among the volatile memory 1928a that HW configuration database 1932a is loaded into service processor 1920, these pointers then can be replaced in example name field 1234.After piece 2690, tool of compression 2504 is in piece 2692 terminations.
After having compressed all chip HW databases 2108, then can utilize the chip HW database 2108 of compression, construct the hardware configuration database 1932a that is stored in the flash ROM 1924 by simple structure chip pointer data structure 2320 according to the method shown in Figure 26 A-26C, by tool of compression 2504.Should be noted in the discussion above that the compression method of being realized by tool of compression 2504 is not an exclusiveness.HW provisioning API 1934b preferably includes and allows the developer to delete the cover API that clauses and subclauses in each DIDS 1202, the deletion mapping table 1224 and execution are similar to other optimizations shown in Figure 26 A-26C.
In the embodiment of the invention described above, supposed that each Dial (being LDial or IDial) that logically is coupled in analog configuration latch or hardware latch can be provided with the value that is included in analog configuration latch or the hardware latch.Yet in fact, often expectation can be read such latch, and does not allow system firmware or simulator setting (or change) latch value.
In view of the front, the preferred embodiments of the present invention support is referred to herein as the configuration entity of the additional categories of read-only Dial or RDial.Preferably there is read-only configuration entity corresponding to above-mentioned every kind of Dial and Dial set type, just, read-only LDial, CDial, IDial and Dial group.For the purpose of easy to understand, each read-only configuration entity at this by (for example in Dial or Dial set type title, LDial, CDial, IDial and Dial group) beginning to have expression configuration entity be that read-only " R " represents (for example, RLDial, RCDial, RIDial and RDial group).
RDial and RDial group are followed a plurality of rule sets.The first, RDial and RDial group are read-only, and can not simulated device or system firmware setting according to definition.Therefore, RDial and RDial group can not be assigned with default value.
The second, except the key word of definition configuration entity with " R " beginning, in statement is specified in configuration the grammer of definition RDial or RDial group preferably with on to regard to corresponding non-read-only configuration entity described identical.For example, the exemplary configuration of RLDial specifies statement followingly to provide:
RLDial?state_machine(state_vector(0..1)，
)＝
{idle＝＞0b00；
start＝＞0b01；
wait＝＞0b10；
end＝＞0b11
}；
The exemplary configuration that provides above specifies statement with key word " RLDial " beginning, and it specifies the type of just declared RDial is RLDial, and is the RDial title of " state_machine (state machine) " in this example.Next step, this configuration specifies statement to enumerate the signal name that its state is read by RLDial.After enumerating signal identifiers, this configuration specifies statement to comprise to list that allowing of RLDial enumerated " input " value (or setting) and each enumerates the mapping table of respective signal (i.e. " the output ") value of input value.What should note once more is, for the signal condition of all enumerator appointments is unique, and represents the only legal pattern of signal condition together.
The 3rd, RDial has about interconnecting with Dial and RDial and Dial and/or RDial being organized into groups to form the Different Rule collection of RDial group.Elaborate these rules below with reference to Figure 27, wherein Figure 27 is the diagram of the part of exemplary configuration database 2700, and it comprises having Dial and the RDial that is connected with the appointment logic of the latch 2760-2778 of analogy model or hardware system.
As primary thing, RDial follow to as top Dial about correspondence is described, with the similar restriction of the interconnection of other RDial and latch.Just, in a preferred embodiment, RDial or RLDial but not the output of RCDial can be coupled directly to latch, and RCDial but not the output of RIDial or RLDial can be connected to the input of low layer RDial.Therefore, for example, RCDial 2740 has the output of the input that is connected to RCDial 2742, and RCDial 2742 has two outputs that are connected respectively to the input of RLDial2744 and RIDial 2746.RLDial 2744 and RIDial 2746 have the output that is connected respectively to latch 2770 and 2772.
In addition, RCDial can have the output of the input of the Dial that is connected to any kind, but does not have Dial to be allowed to have the output of the input that is connected to any RDial.For example, RCDial 2740 has the output of the input that is coupled in CDial 2724.Though not explicit illustrating in Figure 27 should be noted in the discussion above that RDial can have the output of the input of RDial on a plurality of different layers that are connected to identical subtree and/or Dial.
For the setting of avoiding a conflict, Dial defined above and Dial group allows each latch, Dial and Dial group to have maximum Dial or Dial group, as in n road Dial tree, occupy with layered mode its " on " the father.For example, each of CDial 2722 and CDial 2724 only has a Dial father (promptly, CDial 2720), each of LDial 2726 and IDial 2728 only has a Dial father (promptly, CDial 2724), and each of LDial 2730 and IDial 2732 all has a Dial father (being CDial 2724).Yet because RDial and RDial group are read-only according to definition, therefore any Dial or RDial can have one or more RDial or RDial group father, and do not have any possibility of conflict between Dial is provided with.Just, if following under other regular situations and do not forming closed loop, then the output of RDia can be connected to latch, Dial or the RDial that another RDial or Dial also are attached thereto.In other words, each latch and Dial are allowed to have Dial father at the most, but each latch, Dial and RDial can have one or more RDial fathers, and no matter whether this latch or Dial also have Dial father.For example, in the configuration database 2700 of Figure 27, the output of each of RCDial 2740 and RCDial2750 is connected to the input of RCDial 2742.Similarly, CDial 2720 and RCDial 2740 have the output of the input that is connected to CDial 2724 separately.In addition, RLDial 2752 and LDial 2754 have the output that is connected to latch 2776 separately.
The structure of the relevant RDial group of last rule.With reference to as described in Figure 11 A, in a preferred embodiment, the Dial group comprises top layer Dial and/or the nested Dial group of other layerings only as top.On the contrary, RDial organizes RDial or Dial and/or Dial group or the RDial group on any layer that can comprise hierarchy.Allow this additional flexibility, because the RDial group never simulated device or system firmware setting as RDial.
In configuration database, realize that according to described Dial of above-mentioned rule and Dial group RDial and RDial group allow the tree of structure three kinds in conjunction with the front.The first, as Dial tree 2702 and 2708 was demonstrated, tree can comprise Dial and latch but not RDial.The second, RDial for example sets RDial tree 2706 can comprise RDial and latch but not Dial.The 3rd, the mixed type tree can be configured to comprise one or more RDial, one or more Dial and one or more latch, shown in mixed type tree 2704.
In order to support RDial and RDial group, analog configuration database and HW configuration database are carried out some modifications.At first, increase the value set of type field 1220 in each DDDS 1200, to comprise that sign RDial organizes and the added value of the addition type of RDial.For example, can increase RL, RC, RI and RG value, to identify DDDS 1200 respectively corresponding to RLDial, RCDial, RIDial and RDial group to this value set.Increase these new values and guarantee that set_Dial () or set_Dial_group () API Calls will not attempt to be provided with RDial or RDial organizes, wherein set_Dial () or set_Dial_group () API Calls are preferably in the type field 1220 of attempting to test before any example is set related DDDS 1200.
In addition, shown in Figure 28 A, launch each DIDS 1202 to comprise read-only father field 2800, it comprises zero or a plurality of read-only parent pointer 2801.Being connected between the input of the example that 2801 definition of the read-only parent pointer of each non-NULL are represented by DIDS1202 and the output of high-rise RDial, perhaps in the RDial group, comprise the example of representing by DIDS 1202.As mentioned above, except Dial or Dial group father (if the words that have), the example of being represented by DIDS 1202 can have a plurality of RDial fathers and/or belong to a plurality of RDial groups.
Shown in Figure 28 B, (for example enlarge the interior latch data structure of configuration database similarly, the latch data structure 2230 of HW configuration database or the latch data structure 1204 of analog configuration database), to comprise read-only father field 2802, it comprises one or more read-only parent pointers 2803.Being connected between the input of the latch example that 2803 definition of the read-only parent pointer of each non-NULL are represented by the latch data structure and the output of RIDial or RLDial.As mentioned above, in simulation, the latch title in the latch name field 1244 (Figure 12) is preferably with reference to being specified by the LDial of parent pointer 1242 expressions or the scope of IDial.If parent pointer 1242 is empty, its expression does not have Dial father corresponding to the configuration latch of latch data structure 1204, then preferably with reference to specifying the latch title that is included in the latch name field 1244 with DIDS 1202 corresponding RLDial that identified by the first read-only parent pointer 2803 in the read-only father field 2802 or the scope of RIDial.
At last, top layer array of pointers 1206 (Figure 12) though structurally do not change, increases on length, to support RDial and RDial group.Specifically, top layer array of pointers 1206 comprise the DIDS 1202 that points to each top layer RDial group top layer pointer 1250, be included in the RDial group each top layer RDial (promptly, have the read-only father field 2800 of non-NULL) and be not included in interior each the top layer RDial (that is, having empty read-only father field 2800) of RDial group.
Must be accompanied by the aforementioned modifications of the data structure in the configuration database in order to support RDial and RDial group and with reference to Figure 13 is described configuration database to be loaded into the volatile storage and to the modification of its method of launching from Nonvolatile memory devices top.To be the configuration database that will comprise RDial and/or RDial group according to the preferred embodiment of the present invention be loaded into the logic high level process flow diagram of the illustrative methods the volatile memory from Nonvolatile memory devices to Figure 29.As use shown in the identical Reference numeral, method shown in Figure 29 and top described substantially similar with reference to Figure 13 wherein has some to replenish in addition, and is only once processed to guarantee each data structure.
As apostrophe (') shown in, carry out first of preceding method is revised at piece 1308 '.In the method for Figure 13, whether the DIDS 1202 that piece 1308 expressions are determined to be quoted by current top layer pointer 1250 is corresponding to Dial that belongs to the Dial group or Dial group.Piece 1308 ' among Figure 29 is determined to increase further to this and is determined, whether the DIDS 1202 that promptly determines to be quoted by current top layer pointer 1250 is corresponding to the Dial, the RDial that belong to the RDial group, Dial group or RDial group.If arbitrary definite acquisition positive response then turns back to shown in the piece 1304 as processing, the processing of current top layer pointer 1250 stops, because when handling Dial group or RDial group, will handle the DIDS 1202 that is quoted by current top layer pointer 1250.This determines to guarantee that the DIDS 1202 of top layer Dial and RDial is only once processed.
Also only once processed in order to ensure low layer data structures during the process that configuration database is loaded in the volatile memory, determine further at piece 2900 whether the DIDS1202 that is quoted by current top layer pointer 1250 organizes corresponding to RDial or RDial.If not, just, if with DIDS 1202 be the tree of root corresponding to Dial or Dial group, then " child " in this tree can not be that RDial or RDial organize.Thereby, can handle the subtree under the current DIDS 1202 as previously mentioned, pass to shown in the piece 1316 from piece 2900 as this process.
Yet, organize corresponding to RDial or RDial in response to the DIDS 1202 that determines at piece 2900 to quote by current top layer pointer 1250, this process passes to piece 2902 and following piece, and the subtree of its expression processing RDial or RDial group is only once processed to guarantee each data structure in the configuration database.Processed in order to follow the tracks of which data structure, at first at piece 2902, current DIDS 1202 is labeled as handles.Then, shown in piece 2904, this process enters cycle of treatment, wherein handles each output pointer 1238 in the output pointer array 1236 of current top layer DIDS 1202.In case all output pointers 1238 are all processed, then this process withdraws from cycle of treatment, and turns back to piece 1304, and its expression determines whether to also have any other top layer pointer processed.
If determine that at piece 2904 not all output pointer 1238 is all processed, then the next output pointer 1238 in piece 2906 selection output pointer arrays 1236 is to deal with.Then, this process enters piece 2910 and 2912, it illustrates respectively determines whether selected output pointer 1238 points to the DIDS 1202 corresponding to Dial or Dial group, and perhaps whether the DIDS 1202 that is quoted by output pointer is RDial or the RDial groups that have been marked as first pre-treatment.If obtain positive result, then located the interface between RDial or RDial group and Dial or the Dial group at piece 2910.Because the subtree headed by select another top layer pointer 1250 will handle when dealing with to organize with this Dial or Dial, so the processing of this subtree termination, and this process turns back to piece 2904.The processing of subtree is similarly in response to determining that at piece 2912 being marked as first pre-treatment by the DIDS 1202 that current output pointer 1238 (corresponding to RDial or RDial group) is quoted crosses and stop.
On the other hand, shown in the if block 2910 and 2912 really fixed output quota give birth to negative decision, then at piece 2914 marks and handle DIDS 1202 or the latch data structure of quoting by current output pointer 1,238 1204.The processing of carrying out at piece 2914 is with shown in piece 1310,1312,1314 and 1316 and recited above identical.As piece 2914 further shown in, follow two conditions shown in piece 2912 and 2914, similarly mark and handle up to and comprise each low layer data structures in the subtree of the latch that stops subtree.Just, if detect the interface of organizing with Dial or Dial, if perhaps detect the data structure (for example, corresponding to the latch data structure 1204 or the DIDS 1202 of RDial or RDial group) that has been labeled, then the processing of any subtree is ended.After piece 2914, this process turns back to the piece of having described 2904.
The realization of RDial and RDial group also need be carried out some adjustment on the mode that reads Dial, Dial group, RDial and RDial group at the simulation and the hardware realization of digital Design.Specifically, when for example piece 1620 (Figure 16 A) and 1660 (Figure 16 B) traverse tree, with create the final institute of read_Dial () or read_Dial_group () API Calls at latch interested when gathering, preferably record or mark are traveled through with " branch " of creating the latch set (that is, corresponding to Dial or RDial DIDS 1202).By this way, when for example shown in piece 1624 (Figure 16 A) and 1664 (Figure 16 B), when the latch value of upwards propagating latch in the latch set along " tree " is provided with to obtain Dial and RDial, upwards travel through correct branch from latch data structure 1204, be provided with to obtain interested Dial or RDial.In other words, because except single Dial father, Dial or RDial also can have one or more RDial fathers (if having), therefore must write down or the downward parent pointer that travels through with the branch that obtains the latch value of mark, to guarantee upwards to travel through the Dial or the RDial setting of same branches to obtain to expect.
Best, the packing routine shown in Figure 26 A-26C is also adjusted.In described embodiment, the piece 2632 of Figure 26 B illustrates the whole Dial tree that deletion Dial uses the top layer DIDS 1202 that information 2500 (DIPF then) represents that it is not set up or reads.Realize allowing as shown in figure 27 tree under the situation of the RDial of top set and RDial group, if revise any low layer DIDS 1202 of this step, then be preferred with the subtree that keeps also belonging to the RDial example that is read.In this is revised, after deletion top layer DIDS 1202, test the DIPF of each low layer DIDS 1202 in the subtree of deleted DIDS 1202, whether have true value to determine it, its expression low layer DIDS 1202 also belongs to the tree that is read.If not, then also can delete low layer DIDS 1202, and delete procedure continues downwards along subtree.Yet, have the low layer DIDS 1202 that is made as genuine DIPF if located, do not delete that low layer DIDS 1202 and subtree thereof.Yet its parent pointer 1233 is made as sky, to reflect the deletion of the father DIDS 1202 that is quoted by parent pointer 1233.
When in experimental situation or the fault of the response hardware system of implementing and when debugging with the testing hardware digital Design, analysis of failure is a mission critical with definite its reason.Traditionally, in order to help to determine failure cause, obtain the scanning dump (dump) of all test scan chain in the hardware digital display circuit.Then, the analysis scan chain-mapping is to determine failure cause.Frequently, the specific scan chain bit of manual selection, and be entered in the analogy model of digital display circuit, to attempt in simulation, reproducing fault.The single-step debug ability that the simulation of hardware fault makes it possible to improve the signal observability and improves simulator is to help to determine failure cause.
This tradition fault analysis is loaded down with trivial details and error-prone, because which bit in " bit ocean " that the user must at first attempt to determine to be provided by the scanning dump is important, to transplant (port) thereby to simulation system reconstruction errors state.Then, the user must manually browse the scanning dump with reference to the paper spare document that might make mistakes, so that determine interested bit value.At last, the user must programme to RTX or other software programs, loads suitable bit value with the latch to analogy model.
The present invention improves the analytical technology of the prior art by the characteristic of supporting above-mentioned configuration appointed language and hardware and analog configuration database.Referring now to Figure 30, it shows and is used to utilize analogy model to analyze the logic high level process flow diagram of example process of malfunction of selected state, the particularly hardware system of hardware system.As shown in the figure, this process starts from moving chip analyzer instrument 3004, and it preferably includes the software of carrying out on the data handling system 6 of computer system such as Fig. 1.Chip analyzer instrument 3004 acceptance test scan chains reflection 3000 is as input, wherein system failure state is represented in test scan chain-mapping 3000 together, and the latch value of all latchs of each integrated circuit (IC) chip in each self-contained hardware digital Design (for example, the server computer system under the test).In addition, chip analyzer instrument 3004 receive every kind of integrated circuit (IC) chip type in the hardware digital Design by chip type chip HW database 2108.At last, provide selected Dial tabulation 3002 to chip analyzer instrument 3004, its which Dial that identifies in each chip HW database 2108 is considered to be relevant to approximate hardware fault state in simulation.
Chip analyzer instrument 3004 reference chip HW databases 2108 are handled scan chain reflection 3000 and selected Dial tabulation 3002, with respective chip configuration report 3006 and the simulation that generates each integrated circuit (IC) chip in the hardware digital Design file 3008 are set.Each chip configuration report 3006 comprises Gong the people reading and the printable inventory of all Dial examples that are associated with specific integrated circuit in the hardware digital Design, and the setting (if legal value is available) that is in each Dial example of trouble spot.For the disabled Dial example of legal value, report bottom latch value.It is to specify the tabulate machine readable file of setting (if legal value is available) of each Dial of being identified in 3002 with selected Dial that corresponding integrated circuit (IC) chip is associated that each simulation is provided with file 3008.As mentioned above, RTX 1420 (Figure 14) utilizes simulation that file 3008 is set, and is configured to the state of the malfunction of approximate hardware digital Design with the analogy model 1400 with the hardware digital display circuit.
Referring now to Figure 31, the chip analyzer instrument 3004 that shows according to Figure 30 of the present invention generates the chip configuration report 3006 and the logic high level process flow diagram of simulating the illustrative method that file 3008 is set that is used for analyzing hardware fault.As shown in the figure, this process starts from piece 3100, enters piece 3102 then, and it illustrates chip analyzer instrument 3004 and determines whether the scan chain reflection 3000 of each integrated circuit (IC) chip in the hardware digital Design is all processed.If the scan chain of all integrated circuit (IC) chip reflection 3000 is all processed, then this process ends at piece 3130.Yet,, select the scan chain reflection 3000 and the chip HW database 2108 of next integrated circuit (IC) chip to be processed at piece 3104 if it is processed to be less than all scan chain reflections 3000.
Then, process shown in Figure 31 enters cycle of treatment at piece 3106-3110, and wherein the latch pointer 1254 in the latch array of pointers 1210 of reference chip HW database 2108 is handled from interested each latch value of current integrated circuit (IC) chip scanning.Specifically, chip analyzer instrument 3004 determines at piece 3106 whether all latch pointers 1254 are all processed.If then this process passes to the piece 3120 that describes below from piece 3106.Yet all processed if not all latch pointers 1254, the next latch pointer 1254 in piece 3108 selection latch array of pointers 1210 is to deal with.Next step, at piece 3110, chip analyzer instrument 3004 utilization is included in test scan ring identifier among the method name field 2234a (Figure 23 B) of the latch data structure of being quoted by current latch pointer 1,254 2230 and off-set value to locate the latch value corresponding to the hardware latch of latch data structure 2230 in scan cycle reflection 3000.Then, this latch value is stored in the suitable clauses and subclauses of latch value field 2324, it is the position of chipID of the current integrated circuit (IC) chip in the reference chip mapping table 2325 and definite.Then, this process turns back to piece 31 06.
All processed in response to all the latch pointers 1254 in the latch array of pointers 1210 of determining current chip HW database 2108 at piece 3106, this process enters piece 3120.Piece 3120 illustrates chip analyzer instrument 3004 and upwards propagates the set that is included in the latch value in each latch value field 2324 with reference to mapping table 1224, all branches along DIDS tree in chip HW database 2108, so that obtain the setting (being input value) of each Dial and RDial, if possible.Suppose that latch value in the latch value field 2324 is corresponding to the hardware fault state, then recurrent situation is, attempts at least one " output " value in the legal output valve of tree appointment in travelling over to the mapping table 1224 that fewer latch values will cause not being in Dial or RDial example.In this case, Dial or RDial example (and identical tree meta any RDial or Dial thereon) are flagged as and have illegal value.This illegal value often hints the reason of hardware fault.
Should be noted in the discussion above that the ability that obtains Dial and RDial value from the latch value depends on the reversibility of the configuration appointed language that the present invention introduces.Just, do not have the mapping one by one between Dial (and RDial) input and output, just can not determine that clearly Dial (and RDial) is provided with, shown in piece 3120 from the latch value.
After piece 3120, this process enters piece 3122, and it illustrates the chip configuration report 3006 that chip analyzer instrument 3004 is created current integrated circuit (IC) chip.As mentioned above, chip configuration report 3006 is files of reading for the people, and it comprises all Dial and the inventory of RDial and its corresponding setting (if the words that have) of determining at piece 3120 in the current chip HW database 2108.Sign has the Dial and the RDial example of illegal value in chip configuration report 3006, and the latch value of listing the bottom latch is analyzed helping.Shown in piece 3124, the compatible simulation of RTX that chip analyzer tool 3004 is also created current integrated circuit is provided with file 3008.Simulation is provided with file 3008 and preferably includes the only Dial setting of the Dial example of appointment in selected Dial tabulation 3002, if and the Dial example of appointment in selected Dial tabulation 3002 has illegal value, then comprise latch value by the bottom latch in the latch set of this Dial control.Then, can these Dial example settings and latch value automatically be put on analogy model 1400 by the RTX 1420 that in simulated environment, moves, as described below.
Should be understood that, because the latch number by Dial control typically only is the sub-fraction of total number of latches in the integrated circuit, therefore the configuration appointed language of deviser's the application of the invention of digital display circuit is associated Dial with the customized configuration latch, significantly reduced the number of the latch value that in the reconstructing system malfunction, will consider, and identified to reproducing those latchs that hardware fault state most probable needs.Selected Dial tabulation 3002 has further reduced and will transplant the amount of getting back to the hardware status information in the analogy model 1400 by the appointment selected Dial example of interested specific user (but not RDial example).
After piece 3124, process shown in Figure 31 turns back to piece 3102 with the next integrated circuit (IC) chip in the processing hardware digital Design (if the words that have).After all integrated circuit (IC) chip in the hardware digital Design were all processed, this process ended at piece 3130.
Referring again to Figure 30, be that each integrated circuit (IC) chip in the hardware digital Design has been created after corresponding simulation is provided with file 3008 in process according to Figure 31, by carrying out RTX 1420, the analogy model 1400 of digital Design in, be similar to the hardware fault state.In addition, should be noted in the discussion above that, therefore be not desirably in usually and reproduce accurate hardware fault state in the simulation because digital Design can not correctly be worked from malfunction according to definition.
For approximate hardware fault state in simulation, the standard A PI that RTX 1420 at first sends the API that is provided by simulator 1410 calls, so that carry out the normal initialization process of initialization analogy model 1400 to simulate that be used for.Next step, the customization initialization revised file 3010 that RTX 1420 can provide according to the user alternatively carries out the customization of user's appointment separately to the configuration of analogy model 1400.For example, can carry out these custom-modification, thereby adjust parameter, perhaps improve the observability of specific fault type to expose the specific fault pattern.At last, RTX 1420 applies to be included in and simulates setting of Dial example and the latch value that is provided with in the file 3008.As top with reference to Figure 14 and 17A in detail as described in, RTX 1420 is provided with the Dial example by the set_Dial () API Calls to provisioning API 1406, it reflects after the setting of Dial example in analog configuration database 1404, call PUTFAC () API 1414, so that corresponding latch value to be set in analogy model 1400.RTX 1420 utilizes API Calls similarly, is included in simulation corresponding to illegal Dial value with employing the interior latch value of file 3008 is set, and the latch value field 1246 (Figure 12) of the configuration latch and the configuration database 1404 of analogy model 1400 is set.Under the situation that analogy model 1400 is disposed like this, RTX 1420 guiding are carried out one or more test cases by 1410 pairs of analogy models of simulator 1400, so that attempt to reproduce the hardware fault state in simulation.
Although specifically described the present invention with reference to its preferred embodiment, it will be understood by those of skill in the art that under the situation that does not break away from the spirit and scope of the present invention, can carry out the various modifications of form and details to it.For example, should be appreciated that notion disclosed herein can be expanded or be modified as the configuration entity of the other types that are applied to have the rule different with certain exemplary embodiments disclosed herein.In addition, though each side of the present invention has been made description about the computer system of carrying out the software that guides function of the present invention, should be appreciated that the present invention can be implemented as the program product that uses with data handling system alternatively.Define functional programs of the present invention and can pass to data handling system by various signal bearing mediums, wherein these signal bearing mediums include but not limited to (for example can not rewrite storage medium, CD-ROM), rewritable storage medium (for example, floppy disk or hard disk drive) and communication media such as numeral and analog network.Therefore, should be appreciated that this signal bearing medium represents optional embodiment of the present invention when the computer-readable instruction of carrying or coding guiding function of the present invention.
Claims (20)
1. method of specifying configurable digital display circuit, described method comprises:
In at least one hardware definition language file, specify at least one to comprise the design entity of the funtion part of digital display circuit, described at least one design entity logically comprises the configuration latch with a plurality of different possible configuration values, and described a plurality of different possible configuration values are separately corresponding to the difference configuration of the described funtion part of described digital display circuit; And
Adopt the statement in described at least one hardware definition language file, the dial entity is associated with described at least one design entity, described dial has the dial input, dial output, mapping table, default input value in a plurality of possibility input values, and Phase I D, described mapping table represent can receive in the input of described dial a plurality of may input values each with corresponding separately output valve that described dial is exported between mapping, in described a plurality of different possible configuration values which be wherein said output valve control and be loaded in the described configuration latch, and described Phase I D indicates to apply the stage of default input value.
2. the method for claim 1, wherein:
Described dial entity comprises control dial entity; And
Described method also comprises: at least one statement middle finger calibration scale tree in described at least one hardware definition language file, described dial tree comprises the dial entity of a plurality of layering couplings, comprising described control dial, the lowermost layer dial entity in the wherein said dial tree directly in the described a plurality of different possible configuration values of control which is loaded in the described configuration latch.
3. the method for claim 1, wherein said related dial entity comprises: specify in the statement in the configuration of specifying described dial, the dial entity is associated with described at least one design entity.
4. the method for claim 1, wherein said related dial entity comprises: adopt the configuration file reference statement that the dial entity is associated with described at least one design entity, described configuration file reference statement is quoted and is comprised the separate configurations file that statement is specified in the configuration of specifying described dial.
5. the method for claim 1, also comprise: compile described hardware definition language file, to generate the analogy model of described digital display circuit, described analogy model comprises described design entity and described configuration latch.
6. method as claimed in claim 5, described compiling also comprises: generate the configuration database that comprises at least one data structure that defines described dial entity.
7. method as claimed in claim 6 also comprises:
Utilize described analogy model simulate described digital display circuit during, according to Phase I D described default input value is put on the one or more selected example of described dial entity, so that determine the latch value of described configuration latch; And
Described configuration latch in described analogy model loads described latch value.
8. data handling system comprises:
Be used for specifying the device of the design entity of at least one funtion part that comprises digital display circuit at least one hardware definition language file, described at least one design entity logically comprises the configuration latch with a plurality of different possible configuration values, and described a plurality of different possible configuration values are separately corresponding to the difference configuration of the described funtion part of described digital display circuit; And
The device that is used for adopting the statement of described at least one hardware definition language file that the dial entity is associated with described at least one design entity, described dial has the dial input, dial output, mapping table, default input value in described a plurality of possibility input value, and Phase I D, described mapping table represent can receive in the input of described dial a plurality of may input values each with corresponding separately output valve that described dial is exported between mapping, in described a plurality of different possible configuration values which be wherein said output valve control and be loaded in the described configuration latch, and described Phase I D indicates to apply the stage of default input value.
9. data handling system as claimed in claim 8, wherein:
Described dial entity comprises the control dial; And
Described data handling system also comprises: the device that is used at least one statement middle finger calibration scale tree in described at least one hardware definition language file, described dial tree comprises the dial entity of a plurality of layering couplings, this dial entity comprises described control dial, and the lowermost layer dial entity in the wherein said dial tree directly in the described a plurality of different possible configuration values of control which is loaded in the described configuration latch.
10. data handling system as claimed in claim 8, the wherein said device that is used for related dial entity is specified statement in the configuration of specifying described dial, and the dial entity is associated with described at least one design entity.
11. data handling system as claimed in claim 8, the wherein said device that is used for related dial entity adopts the configuration file reference statement that the dial entity is associated with described at least one design entity, and described configuration file reference statement is quoted and comprised the separate configurations file that statement is specified in the configuration of specifying described dial.
12. data handling system as claimed in claim 8 also comprises: be used to compile described hardware definition language file, with the device of the analogy model that generates described digital display circuit, described analogy model comprises described design entity and described configuration latch.
13. data handling system as claimed in claim 12, the described device that is used to compile also generates the configuration database that comprises at least one data structure that defines described dial entity.
14. data handling system as claimed in claim 13 also comprises:
Be used for utilize described analogy model simulate described digital display circuit during, according to Phase I D described default input value is put on the one or more selected example of described dial entity so that determine the device of the latch value of described configuration latch; And
Be used for loading the device of described latch value to the described configuration latch of described analogy model.
15. the method for operating of a control figure system, this digital display circuit comprises the configuration latch with a plurality of different possible configuration values, corresponding to the difference configuration of the funtion part of described digital display circuit, described method comprises described a plurality of different possible configuration values separately:
Set up the configuration database of a plurality of examples of definition dial entity, wherein the dial entity has the dial input, dial output, mapping table, described mapping table represent can receive in the input of described dial a plurality of may input values each with corresponding separately output valve that described dial is exported between mapping, in described a plurality of different possible configuration values which be described output valve control and be loaded in the described configuration latch, each of wherein said a plurality of examples has default separately input value and the Phase I D separately in described a plurality of possibility input value, and wherein said Phase I D indicates to apply the stage of default input value; And
In response to the order of specifying one or more Phase I D, apply its Phase I D and be matched with default input value by at least one example of the Phase I D of this order appointment; And
In response to applying of default input value, obtain the output valve of this example by the mapping table of reference scale dish entity, and adopt Configuration Values corresponding to this output valve that configuration latch in the digital display circuit is set.
16. method as claimed in claim 15, wherein said digital display circuit comprises hardware system.
17. method as claimed in claim 15, wherein said digital display circuit comprises the analog hardware system.
18. data handling system that is used for the operation of control figure system, this digital display circuit comprises the configuration latch with a plurality of different possible configuration values, corresponding to the difference configuration of the funtion part of described digital display circuit, described data handling system comprises described a plurality of different possible configuration values separately:
The configuration database of a plurality of examples of definition dial entity, wherein the dial entity has the dial input, dial output, mapping table, described mapping table represent can receive in the input of described dial a plurality of may input values each with corresponding separately output valve that described dial is exported between mapping, in described a plurality of different possible configuration values which be described output valve control and be loaded in the described configuration latch, each of wherein said a plurality of examples has default separately input value and the Phase I D separately in described a plurality of possibility input value, and wherein said Phase I D indicates to apply the stage of default input value; And
Be used to respond the order of specifying one or more Phase I D, apply its Phase I D and be matched with device by the default input value of at least one example of the Phase I D of this order appointment; And
Be used to respond applying of default input value, obtain the output valve of this example, and adopt the device that the configuration latch in the digital display circuit is set corresponding to the Configuration Values of this output valve by the mapping table of reference scale dish entity.
19. data handling system as claimed in claim 18, wherein said digital display circuit comprises hardware system, and the wherein said device that is used for being provided with configuration latch comprises the device of the configuration latch that is used to be provided with hardware system.
20. data handling system as claimed in claim 18, wherein said digital display circuit comprises the analog hardware system, and the wherein said device that is used for being provided with configuration latch comprises the device of the configuration latch that is used to be provided with the analog hardware system.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/750,112 US7039894B2 (en) | 2003-04-28 | 2003-12-31 | Method, system and program product for specifying and using dials having phased default values to configure a simulated or physical digital system |
| US10/750,112 | 2003-12-31 |
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| CN1637746A CN1637746A (en) | 2005-07-13 |
| CN100378735C true CN100378735C (en) | 2008-04-02 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020108092A1 (en) * | 2000-08-03 | 2002-08-08 | Hiroshi Yasuda | Digital circuit design method using programming language |
| US20030182642A1 (en) * | 1999-11-30 | 2003-09-25 | Schubert Nils Endric | Hardware debugging in a hardware description language |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030182642A1 (en) * | 1999-11-30 | 2003-09-25 | Schubert Nils Endric | Hardware debugging in a hardware description language |
| US20020108092A1 (en) * | 2000-08-03 | 2002-08-08 | Hiroshi Yasuda | Digital circuit design method using programming language |
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| CN1637746A (en) | 2005-07-13 |
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