CN100369040C - Variable deviation etching simulating method under sub wavelength light etching condition - Google Patents
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Abstract
The present invention discloses a variable deviation etching simulation method under the condition of sub wavelength photo-etching. The present invention comprises the procedures that an etching process in a photo-etching process is etched by calculating the strong gradient of line marginal light and shortening the parameter of the density of patterns, the density of long range patterns, etc., and each factor of empirical equations is determined through statistical optimization. The method provides and uses the strong gradient of light and the density of patterns to etch sensitizing strength in the etching process, considers the influence of the effects of the concentration, etc. of local etching reaction to a final pattern, and uses measured data to correct model parameters. Thereby, the light intensity distribution of silicon surface in a photo-etching fabricating process of integrated circuits can be exactly calculated, and the contours of imaging patterns after etching can be predicted. The present invention can be used for the verification of the manufacturability of the design of integrated circuits and the OPC correction of layouts under the condition of sub wavelength photo-etching.
Description
Technical Field
The invention relates to a variable deviation etching simulation method under the condition of sub-wavelength photoetching, belongs to the field of integrated circuit computer aided design, and particularly relates to the field of integrated circuit photoetching simulation and manufacturability check.
Background
The etching process is an important process in the manufacturing process of the integrated circuit, and is a process after the circuit layout finishes the photoresist transfer from the mask to the surface of the silicon wafer, and the circuit layout is transferred from the photoresist to the circuit layer to be etched on the surface of the silicon wafer in the process.
In the manufacturing process of integrated circuits, when exposure of a mask layout is performed, a layer of manufacturing material of a layer of other integrated circuits, such as silicon dioxide or aluminum, is usually covered on the surface of a silicon wafer to serve as a substrate of a photoresist, and etching is to transfer the circuit layout from the photoresist to the layer by an etching method. The transfer process must ensure the complete transfer of the pattern characteristics on the photoresist, and must also ensure the verticality of the edge of the connecting line and the surface of the silicon wafer, the smoothness of the connecting line and the residue-free property of the channel between the lines. In order to achieve the purpose of completely transferring the pattern characteristics, it is obvious that substances which can quickly corrode a substrate layer but hardly corrode a photoresist are used for etching the exposed silicon wafer, and the etching process must have good vertical corrosion property and small horizontal corrosion property so as to ensure the perpendicularity of the connecting line edge and the silicon wafer surface. At the beginning of the integrated circuit fabrication process, the etch is performed using an etchant in a liquid state. The etching of the silicon chip surface is difficult to make the edge of the channel vertical, especially under the process of wet etching by using liquid corrosive such as hydrofluoric acid, the corrosive agent can not only vertically etch downwards, and after the surface is not corroded by the part of the photoresist protection circuit layout, the corrosive agent can transversely etch the channel wall while continuously etching vertically downwards. However, the etching method can sufficiently cope with the manufacturing process that the integration degree is relatively low at the beginning of the manufacturing of the integrated circuit, the aspect ratio of the characteristic line is relatively large, and the requirement on the width-height ratio of the channel is low (about 2: 1). However, as the circuit integration degree is continuously increased and the feature line width is continuously reduced, the width and the height of a channel are increased to 25: 1, and the wet etching process using the liquid corrosive agent is not applicable, so that a dry etching method is required. The dry etching method is an etching gas for generating plasma with the relevant chemical substances (fluorine, chlorine, oxygen, carbon), and is called ion etching. Ion etching is capable of achieving much higher aspect ratios than wet etching.
The plasma etching process of integrated circuit manufacturers is currently facilitated by a low pressure, viscous plasma gas stream. The manufacture of integrated circuits now requires the etching process to operate on large (150-300 mm) areas of silicon, so that the process can only operate one at a time under the equipment conditions of current integrated circuit production. Aiming at the existing manufacturing equipment and process, the integrated circuit manufacturer invents a deviceHigh concentration plasma gas with high etching capability (etching rate greater than 1 micron per minute). Of course, for each different circuit layer to be etched, there is a plasma gas of corresponding composition to etch it. The plasma gas for etching silicon dioxide consists essentially of a fluoride containing CF 4 、C 2 F 6 Mixed gas of He, ar, O, etc., further containing He 2 And the like. Albeit much like CF 4 、SF 6 Such fluoride plasma gases have also been used successfully to etch silicon, but the most prevalent plasma gases currently used to etch silicon consist mostly of chloride or bromide. This is because fluorine atoms react spontaneously with the edges of the silicon circuit lines, resulting in a loss of anisotropy in the silicon. The etching of metal is not as great as that of silicon dioxide and silicon because the etching agent for metal is very corrosive to the mask. Therefore, some skill is required to improve the etching quality when performing the metal layer etching process. Generally, the etching temperature is lowered, and the corrosion resistance of the photoresist is improved at a low temperature. In addition, only necessary places are selected for corrosion so as to avoid damaging other circuit layouts. Current integrated circuit fabrication also places further constraints on photoresist formulation, requiring photoresist thicknesses of less than 250nm, in order to ensure the speed and quality of the etching process.
Lithographic imaging simulation is indispensable in modern integrated circuit production in order to correctly evaluate the imaging on silicon wafers and guide the use of OPC techniques under the conditions of sub-wavelength lithography. As a very important component of lithographic imaging simulation, accurate and fast etching process simulation is also essential.
Disclosure of Invention
The invention aims to provide a variable deviation etching simulation method under the condition of sub-wavelength photoetching.
The technical solution of the invention comprises the following steps in sequence:
1) Is provided with
Basic parameters of the lithography machine: wavelength lambda of a light source, numerical aperture NA of an optical system, coherence coefficient s of illumination, object/image magnification M of the optical system, and spatial influence range A of a photoetching system;
2) Establishing an optical model
Establishing a fast photoetching manufacturing model based on a convolution kernel through photoetching machine parameters, and reading in test data to correct model parameters; the optical model building process is described in the article entitled "kernel-based correlation method to focus spatial image intensity for lithography simulation" published in semiconductor science 4 of 2003, shi Zheng, wang, yan Xiaolang, and in the article entitled "study of optical imaging algorithm for lithography resolution enhancement" published in semiconductor technology 9 of Wang Guoxiong, wang Xuejie, and the second article refers to the first article and describes the optical modeling portion of the first article in more detail.
3) Determining a pattern contour edge
Firstly, a sampling line placement rule is read in. The rules specify that sampling lines are placed densely in a pattern region where the pattern itself changes and the surrounding environment changes, and that sampling lines are placed sparsely in a region where the pattern is single.
And then analyzing each layout graph, identifying the graph environment, and placing a sampling line perpendicular to the edge at the edge of the layout graph according to the sampling line placement rule.
Then, searching points with imaging light intensity equal to the photosensitive domain value on each sampling line of each graph through photoetching simulation, generally searching by a halving method until the calculated points reach the required precision, wherein the points are imaging contour points on the sampling line;
4) Calculating an offset
For each imaged contour point, the offset of the post-etch contour is calculated by the following formula, the offsets each being along the direction of the sample line:
bias=α+β/g+x/g 2 +δ·l+ε·l 2 +φ·s+·s 2
------------(1)
wherein g is light intensity gradient, s is short-range pattern density, l is long-range pattern density, bias is offset of contour lines before and after etching, and alpha, beta, x, delta, epsilon, phi and are coefficients;
wherein the light intensity gradient is calculated by the following formula:
------------(2)
in the formula, Δ x and Δ y are lattice points for light intensity calculation.
The long-range pattern density value is calculated by the following formula:
------------(3)
------------(4)
the geodesic density value is calculated by the following formula:
------------(5)
------------(6)
d in the formulae (3), (4), (5), (6) l 、d s Is the calculated long-range and short-range pattern densities, M (x, y) is the mask pattern distribution function, the coefficient sigma of the Gaussian function l 、σ s Determined by practical experience;
5) Determining a pattern profile edge after etching
And adding the calculated offset of the contour points to obtain the contour points of the etched graph, and connecting the contour points of all the etched graphs of the graph to obtain the etched imaging contour of the graph.
And 3) searching points with the imaging light intensity equal to the photosensitive threshold value in the step 3), and searching by adopting a halving method until the calculated points reach the required precision.
The coefficients alpha, beta, x, delta, epsilon, phi and of the step 4) are determined as follows:
determining by a multivariate linear regression method by using a test layout and measured data provided by a user:
setting:
------------(7)
------------(8)
------------(9)
wherein bias 1 ,bias 2 ,...,bias n Is the offset, g, of the measured data i ,l i ,s i The light intensity gradient and the long-range and short-range figure density values obtained by calculating each point of the test layout are solved by a least square methodThe values of the coefficients α, β, x, δ, ε, φ, are determined.
The variable deviation etching simulation method under the sub-wavelength photoetching condition has the following advantages:
(1) The influence of etching on photoetching imaging can be accurately predicted;
(2) The calculation speed is high;
(3) The method is compatible with the optical model manufactured by the existing photoetching, and can be easily combined with the optical model to further improve the prediction precision of the photoetching model;
(4) The method can be well applied to the manufacturability verification of the integrated circuit design under the condition of sub-wavelength photoetching and the OPC correction of the layout.
Drawings
FIG. 1 is a flow chart of a simulation method of the present invention;
fig. 2 is an illustration of an example of the simulation method of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
Referring to the flow chart of the simulation method of fig. 1, the present invention comprises the following steps in sequence:
1) Is provided with
Basic parameters of the lithography machine: wavelength lambda of a light source, numerical aperture NA of an optical system, coherence coefficient s of illumination, object/image magnification M of the optical system, and spatial influence range A of a photoetching system;
2) Establishing an optical model
And establishing a fast photoetching manufacturing model based on a convolution kernel through photoetching machine parameters, and reading in test data to correct model parameters. The optical model building process is described in the article entitled "a Kernal-based connected method to a focus spatial image intensity for lithography simulation" signed by Shi Zheng, wang dynasty, yan Xiaolang, in the book "semiconductor article" 4 of 2003, and the article entitled "study of optical imaging algorithm for improving lithography resolution" signed by Wang Guoxiong, wang Xuejie, in the book "semiconductor technology" 9 of 2005, and the second article refers to the first article and describes the optical modeling portion of the first article in more detail. The following equation describes the entire optical system from the light source to the image plane, including the illumination system and the imaging system, i.e. the lithographic fabrication model T:
in the formula: f, g are the two components of the spatial frequency, respectively.
Substituting parameters of the photoetching machine to obtain a model which accords with the photoetching machine;
3) And placing a sampling line vertical to the edge at the edge of the layout graph according to the graph environment. By analyzing the layout graph, the sampling lines are more densely placed in the graph area where the graph changes and the surrounding environment changes, and are more sparsely placed in the area where the graph is single. As shown in fig. 2, a thin dotted line 2 is a layout pattern, and a black short line 1 is a sampling line placed, and in this example, the end points and corners of the pattern are regions where the sampling lines are placed more densely. Specific sampling line placement rules may be specified by a script.
The points with imaging light intensity equal to the photosensitive threshold value are searched on each sampling line through photoetching simulation, and generally, the points can be searched by a halving method until the calculated points reach the required precision, and the points determine the outline of the graph optical imaging.
4) Calculating an offset
i) Calculating the light intensity gradient by the following calculation formula for each contour point, wherein Δ x and Δ y are lattice points of light intensity calculation, namely the minimum step length:
for example, if Δ x = Δ y =1nm, i (x, y) =0.3, i (x, y + Δ y) =0.305, i (x + Δ x, y) =0.30001, then g (x, y) =0.005nm.
ii) calculating the long-range pattern density and short-range pattern density values by integrating the product of the gaussian function and the mask pattern for each contour point. Is represented by the formula, wherein d l 、d s Is the calculated long range and short range pattern densities, and M (x, y) is the mask pattern distribution function, where the contour point is the center point of the mask pattern.
Coefficient sigma of the gaussian function l 、σ s Determined by practical experience. If it is desirable to l =400nm,σ s If the distance is 100nm, the pattern at 400nm from the center point has the weight of 0.6065 and 0.0004 for short distance effect on the offset.
iii) Calculating the offset of the profile of the imaged pattern before and after etching
The amount of shift of the line edge before and after etching is along the direction of the sampling line, and the value thereof is calculated by the following formula:
bias=α+β/g+x/g 2 +δ·l+ε·l 2 +φ·s+·s 2
wherein g is the light intensity gradient, s is the short-range pattern density, l is the long-range pattern density, and α, β, x, δ, ε, φ, are the coefficients of each item. The calculated result bias is the amount of displacement of the contour before and after etching. 5) Determining a pattern profile edge after etching
The original imaging graphic profile is the final profile after the offset correction of each point. Fig. 2 also shows an example of the offset calculation, in which a thick solid line 3 is a pre-etch pattern profile and a thick dotted line 4 is a post-etch pattern profile.
Extracting specific parameters alpha, beta, x, delta, epsilon, phi and of the variable deviation model from the test layout
For each practical variable bias model, it must be corrected in advance to obtain various parameters of the model. With the test layout and the measured data provided by the user, an equation of the offset and the light intensity gradient and the long-range and short-range pattern density values can be established for each test point, as shown in the following equation set,
wherein bias 1 ,bias 2 ,...,bias n Is the offset, g, of the measured data i ,l i .s i The light intensity gradient and the long-range and short-range figure density values are calculated for each point of the test layout. Order to
------------(7)
------------(8)
And order
------------(9)
The overdetermined system of equations can be solved by the least square methodThe optimum values for the coefficients α, β, x, δ, ε, φ, can be determined.
The coefficients being determined as a set of measured dataWhere 0.0296 is the coefficient of the short-range pattern density and 0.0128 is the coefficient of the long-range pattern density, the coefficient of the short-range pattern density representing the intensity of the short-range action is larger than the coefficient of the long-range pattern density representing the intensity of the long-range action, it can be seen that in this example, the short-range pattern density is largerCheng Zuoyong has a relatively large effect on the etch results.
Claims (2)
1. A variable deviation etching simulation method under the condition of sub-wavelength photoetching is characterized by sequentially comprising the following steps:
1) Is provided with
Basic parameters of the lithography machine: wavelength lambda of a light source, numerical aperture NA of an optical system, coherence coefficient s of illumination, object/image magnification M of the optical system, and spatial influence range A of a photoetching system;
2) Establishing an optical model
Establishing a fast photoetching manufacturing model based on a convolution kernel through photoetching machine parameters, and reading in test data to correct model parameters;
3) Determining a pattern contour edge
Firstly, reading in a sampling line placing rule: the method comprises the following steps of densely placing sampling lines in a graph area where the graph of the user changes and the surrounding environment changes, and sparsely placing sampling lines in an area where the graph is single;
then analyzing each layout graph, identifying a graph environment, and placing a sampling line perpendicular to the edge at the edge of the layout graph according to a sampling line placement rule;
then, searching points with imaging light intensity equal to the photosensitive threshold value on each sampling line of each graph through photoetching simulation, wherein the points are imaging contour points on the sampling line;
4) Calculating an offset
For each imaged contour point, the offset of the post-etch contour is calculated by the following formula, the offsets each being along the direction of the sample line:
bias=α+β/g+x/g 2 +δ·l+ε·l 2 +φ·s+·s 2
------------(1)
wherein g is light intensity gradient, s is short-range pattern density, l is long-range pattern density, bias is offset of contour lines before and after etching, and alpha, beta, x, delta, epsilon, phi and are coefficients;
wherein the light intensity gradient is calculated by the following formula:
in the formula, deltar and deltay are lattice points for calculating light intensity,
the coefficients alpha, beta, x, delta, epsilon, phi and are determined by a multivariate linear regression method by utilizing a test layout and actual measurement data provided by a user:
setting:
wherein bias 1 ,bias 2 ,…,bias n Is the offset, g, of the measured data i ,l i .s i The light intensity gradient and the long-range and short-range figure density values obtained by calculating each point of the test layout are solved by a least square methodDetermining the values of the coefficients α, β, x, δ, ε, φ, ;
the long-range pattern density value is calculated by the following formula:
the geodesic density value is calculated by the following formula:
d in the formulae (3), (4), (5), (6) l 、d s Is the calculated long-range and short-range pattern densities, M (x, y) is the mask pattern distribution function, the coefficient sigma of the Gaussian function l 、σ s Determined by practical experience;
5) Determining a pattern profile edge after etching
And adding the calculated offset of the contour points to obtain the contour points of the etched pattern, and connecting the contour points of all the etched patterns of the pattern to obtain the etched imaging contour of the pattern.
2. The method as claimed in claim 1, wherein the step 3) of searching points with imaging intensity equal to the threshold value of photosensitivity is performed by searching by a binary method until the calculated points reach the required accuracy.
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CN101750877B (en) * | 2008-12-22 | 2012-05-23 | 中芯国际集成电路制造(上海)有限公司 | Method of determining graphic outer contour for optical proximity correction |
CN102096309B (en) * | 2009-12-15 | 2012-07-11 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction method |
CN106372300B (en) * | 2016-08-30 | 2019-07-23 | 上海华力微电子有限公司 | Manufacturability determination method |
CN109360185B (en) * | 2018-08-28 | 2022-07-26 | 中国科学院微电子研究所 | Layout test pattern extraction method, device, equipment and medium |
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CN117454831B (en) * | 2023-12-05 | 2024-04-02 | 武汉宇微光学软件有限公司 | Mask pattern optimization method and system and electronic equipment |
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