CN100339823C - Program updating method and terminal device - Google Patents

Abstract

In the present invention, in updating a program stored in rewritable nonvolatile memory such as Flash ROM, a program portion in a block in the nonvolatile memory is expanded in RAM which includes a portion needing an update of the program stored, and only the portion needing the update is instructed from the outside and updated among the expanded program portion. Then, the block in the nonvolatile memory is erased, and the program portion updated in the RAM is recorded again in the erased block in the nonvolatile memory.

Description

Method for updating program and terminal device

Technical field

The present invention relates to the method for the program of a kind of rewritable nonvolatile memory that is used for upgrading terminal device such as flash ROM (flash ROM) stored, and relate to a kind of such terminal device.

Background technology

Traditionally, thereby terminal device, in order to the operation of indication CPU is controlled terminal device in rewritable nonvolatile memory (as flash ROM) stored Control Software (program).

In this terminal device, people have proposed a kind of method that can upgrade Control Software when the program error (bug) in finding Control Software.For example, (the 3-5 page or leaf Fig. 3) discloses a kind of like this method to JP2001-154838.

In the JP2001-154838 disclosed method, what at first produce is the new Control Software of program error through overcorrect.Then, in case the rewritable nonvolatile memory that is writing down program error is wiped, just should new Control Software record in this storer.Just upgraded Control Software thus.

In wiping the renewal Control Software method that rewritable nonvolatile memory (as flash ROM) writes down new Control Software in the above, under the constraint of nonvolatile memory (as flash ROM), storer is divided into a plurality of blocks, only divide on the block basis and delete old Control Software, write down new Control Software then at one.

Therefore, even in the time only need proofreading and correct 1 byte, if the block of nonvolatile memory is 16K byte or 64K byte, also must delete this whole 16K byte or 64K byte, then slave unit outside transmit its program error through overcorrect the 16K byte or the new Control Software of 64K byte, respectively they are recorded in the nonvolatile memory.

Therefore, in the Control Software process of upgrading terminal device, the data volume that the slave unit outside is imported into strengthens, so comprise that with regard to having produced data transmit the problem of the running time increase of required time.

Summary of the invention

An object of the present invention is to shorten the required terminal device running time of program updates of record in the terminal device.

Among the present invention, in the program process that in upgrading rewritable nonvolatile memory (as flash ROM), writes down, in RAM, the program part in that block that contains the part that needs renewal in the program stored of nonvolatile memory is expanded, according to external command, only need that part of upgrading in the program part that renewal is expanded then.Then, the block in the erasable nonvolatile memory will record in the erase blocks of nonvolatile memory through the program part that upgrades in the RAM once more.

Like this by in RAM the program part that includes the part that needs upgrade being expanded, just only refresh routine needs the part upgraded in partly.In this way, only need the part that needs upgrade is made indication, and need not to indicate the information of upgrading all program parts.In other words, owing to can reduce, therefore can reduce the program updates running time that comprises the data transmission required time from installing the outside rewritten instructions that transmits.

Brief description of drawings

Fig. 1 is the functional-block diagram of the terminal device in the first embodiment of the invention;

Fig. 2 is the synoptic diagram of the example of memory map figure (map) in the expression terminal device;

Fig. 3 is the process flow diagram of the processing procedure among first embodiment;

Fig. 4 is the synoptic diagram of the example of the rewritten instructions among expression first embodiment;

Fig. 5 is the synoptic diagram of another example of the rewritten instructions among expression first embodiment;

Fig. 6 is the synoptic diagram of the example of the rewritten instructions in the expression second embodiment of the present invention;

Fig. 7 is the process flow diagram of the processing procedure among second embodiment;

Fig. 8 is the synoptic diagram of the example of the rewritten instructions in the expression third embodiment of the invention;

Fig. 9 is the process flow diagram of the processing procedure among the 3rd embodiment;

Figure 10 is the synoptic diagram of another example of the rewritten instructions among expression the 3rd embodiment;

Figure 11 is the synoptic diagram of the another example of the rewritten instructions among expression the 3rd embodiment;

Figure 12 is the synoptic diagram of the example of the rewritten instructions in the expression fourth embodiment of the invention;

Figure 13 is the process flow diagram of the processing procedure among the 4th embodiment;

Figure 14 A is the synoptic diagram of the modular structure of software before correction in the expression fifth embodiment of the present invention;

Figure 14 B is the synoptic diagram of the modular structure of the software after proofreading and correct among the 5th embodiment;

Figure 15 is the synoptic diagram of the rewritten instructions example among expression the 5th embodiment;

Figure 16 is the process flow diagram of the processing procedure among the 5th embodiment;

Figure 17 is the synoptic diagram of another example of the rewritten instructions among expression the 5th embodiment;

Figure 18 is the synoptic diagram of an example again of the rewritten instructions among expression the 5th embodiment;

Figure 19 is the synoptic diagram of the modular structure after software is expanded in RAM among expression the 5th embodiment;

Figure 20 A represents that software is at the synoptic diagram of the modular structure before overcorrect in the sixth embodiment of the present invention;

Figure 20 B represents that software is at the synoptic diagram of the modular structure after overcorrect among the 6th embodiment;

Figure 21 A is the synoptic diagram of software data before correction in flash (Flash) ROM among expression the 6th embodiment;

Figure 21 B is the synoptic diagram of software data after correction in the flash ROM among expression the 6th embodiment;

Figure 22 is the synoptic diagram of the order that control CPU uses among the 6th embodiment;

Figure 23 is the synoptic diagram of the example of rewritten instructions among the 6th embodiment;

Figure 24 is the process flow diagram of the processing procedure among the 6th embodiment;

Figure 25 is the synoptic diagram of displacement (shift) record among expression the 6th embodiment;

Figure 26 is the synoptic diagram of part software data before address rewrite in the RAM among expression the 6th embodiment;

Figure 27 is that the part software data in the RAM is being indicated the synoptic diagram after the address rewrite among expression the 6th embodiment;

Figure 28 is that the part software data among the RAM is being indicated another synoptic diagram after the address rewrite among expression the 6th embodiment.

Preferred forms

Embodiments of the invention are described below with reference to accompanying drawings.

(first embodiment)

Fig. 1 represents the example of the block scheme of the terminal device in the first embodiment of the invention.In Fig. 1, " 1 " expression terminal device.

Terminal device 1 have can to/from the external connection interface section 11 of outside transmission/received signal, be used for the control CPU 12 of control terminal 1, as flash ROM 13, RAM and the data bus 15 (each functional block is all passed through it and linked to each other) of rewritable nonvolatile memory.

What can be considered as external interface 11 is cable wired connection interface and wireless connections interface.In addition, for external interface 11, also can use memory card interface.Under this situation, control CPU 12 reads various information from the storage card that inserts memory card interface.

In addition, when external interface 11 is wired connection interface or wireless connections interface and when linking to each other with network, can utilize HTTP, FTP, TFTP and other host-host protocol input data.In addition, also be the time by external interface such as wired connecting interface, wireless connections interface or memory card interface input information, input information is recorded among RAM 14 or the flash ROM 13 by control CPU 12.In addition, in this embodiment, data when allowing DMA to transmit, can utilize DMA to transmit the data of duplicating by control CPU 12 records.

Fig. 2 represents the example of the memory map figure in the terminal device 1.

As shown in Figure 2, the memory block 201 of the flash ROM 13 that links to each other with data bus 15 has sexadecimal tag addresses 00000000 (after this being expressed as 0x00000000) to 0x0005FFFF in the storage space by control CPU 12 controls.In addition, suppose that the memory block 202 of RAM 14 has 0x00100000 to 0x0015FFFF, the erase unit of flash ROM 13 is the 64K byte, i.e. 0x00000000～0x0000FFFF, 0x00010000～0x0001FFFF...

The operation of the end device 1 that makes up in a manner described below with reference to flow chart description shown in Figure 3.

At step S101, the control CPU 12 of end device 1 reads in rewritten instructions the optional zone (at this, supposing among Fig. 2 from the zone that 0x00100000 begins) of RAM 14 from external device (ED) (Fig. 1 is not shown) by external connection interface section 11.

In address that this hypothesis will rewrite in the Control Software of flash ROM 13 storage and data as shown in Figure 4.

In addition, indicate the rewriting portion of Control Software, just needn't utilize real data indication rewriting portion by utilizing address shown in Figure 4, then just can reduce the data volume of rewritten instructions, and shorten the program updates time.

Therefore, in step S102, the rewriting block that control CPU 12 determines among the flash ROM 13.For example, the rewriting address in control CPU 12 controlling charts 4 judges that then No.1 has specified the rewriting in the 0x0001FFFF of block 0x00010000 among the flash ROM 13 to the rewritten instructions of No.6.

In step S103, control CPU 12 is definite interior data of rewriting block in the reading in step S101 in the optional zone the rewritten instructions zone of RAM 14 (at this, suppose that 0x00110000 among Fig. 2 is to 0x0011FFFF) spread step S102.

In addition, in step S104, control CPU 102 data among the scheduler 0x00110030 in RAM, in this address, the data in the address 0x00010030 that will indicate at the rewritten instructions No.1 with Fig. 4 are extended to 0x43.

In step S105, whether all rewritten instructions on the rewriting block of determining in the control CPU 12 determining step S102 have obtained handling.Under this situation, o.2 arrive No.6, control the processing procedure that CPU 12 just enters step S104, and upgrade the Control Software through expanding among the RAM according to rewritten instructions No.2 to No.6 according to the mode identical with the front owing to stayed command N.

After the processing procedure of having finished rewritten instructions No.6, control CPU 12 can determine to rewrite rewritten instructions on the block all through processing in step S105, enter into the processing procedure of step S106 then.

Then, in step S106, the block 0x00010000 among the control CPU 12 erase flash Rom13 is to 0x0001FFFF.Then, control CPU 12 renewal Control Software that RAM 14 inner region 0x00110000 are gone up storage to 0x0011FFFF records in the erase blocks in the flash ROM 13.

In step S107, control CPU 12 has judged whether to handle all these rewritten instructions that read.Under this situation,, therefore control the processing procedure that CPU 12 enters step S102 owing to stayed rewritten instructions No.7.

Then, in step S102, the address of instruction No.7 and follow-up numeral in control CPU 12 controlling charts 4, and judge that No.7 has specified the rewriting in the 0x0002FFFF to block 0x00020000 among the flash ROM 13 to the rewritten instructions of No.19.

In step S103, control CPU12 is growth data in the block in other zone of all except that reading the rewritten instructions zone of RAM 14 (0x00110000 in this hypothesis Fig. 2 is to 0x0011FFFF).In addition, in step S104, control CPU 12 upgrades the data among the address 0x00110000 of RAM 14, and the data that wherein will be arranged in the address 0x00021000 that the rewritten instructions No.7 with Fig. 4 indicates expand to 0x1F.

After this, control CPU 12 upgrades in RAM Control Software through expand according to rewritten instructions No.8 to No.10 according to the mode identical with the front.In step S106, the block among the CPU 12 deletion flash ROM 13.Then, control CPU 12 is recorded in the renewal Control Software that the area 0 x00110000 of RAM 14 stores in the 0x0011FFFF in the block of deletion of flash ROM 13.

Above-mentioned processing procedure repeats, and reads the process of rewritten instructions up to judgement in step S107 and all finish in terminal device 1.

According to recited above, according to first embodiment, comprise the more program part of new portion by expansion in RAM14, only need the part of upgrading in the refresh routine part.So only need indicate the part that needs renewal, and need not to require to indicate the lastest imformation of upgrading the whole procedure part.In other words, can reduce the rewritten instructions that terminal device 1 is passed in the outside.Therefore, just can shorten the renewal running time of the control program of flash ROM 13 stored that comprise data transmission period.

In addition, can after the renewal of having finished the program part of RAM14 inner control program, flash ROM 13 is deleted processing, and the data after will upgrading write flash ROM 13.In this way, for example can obtain a kind of like this method, it can delete processing to flash ROM 13 only with among that part of preservation RAM 14 that does not need in the control program of flash RAM 13 to change, and the down loading updating program part is to write flash ROM 13 then.In the method, can avoid following situation: when communication is not got in touch with in the process that refresh routine information is write flash ROM 13, not only write the refresh routine failure, and the original program of storage among the flash ROM 13 is lost also.In other words, even communicate by letter in writing the refresh routine information process when not getting in touch with, also the program part before upgrading can be stayed in the flash ROM 13, therefore, be to recover.

In addition,, can utilize external interface 11 to provide rewritten instructions, therefore needn't delete (remove) flash ROM 13, and can realize shortening the program updates that upgrades the running time with refresh routine from the outside according to first embodiment.

In addition, storage space shown in Figure 2 can change corresponding to the data volume that provides in the type of controlling CPU 12, flash ROM 13 and/or RAM 14 or structure or the terminal device 1.

In addition, though used flash ROM 13 among this embodiment,, also can adopt the storer of EEPROM and so on as long as storer is rewritable nonvolatile memory.

In addition, the renewal unit of Control Software is 64 kilobyte among this embodiment, but also needs not be 64 kilobyte, and this will determine according to the erase blocks capacity that depends on nonvolatile memory (for example flash ROM 13) type of device.And though this embodiment has described 1 byte as rewriteeing byte number, overwriting data also needs not to be 1 byte, for example also can rewrite simultaneously with optional address designation method data designated amount as 2 bytes and 4 bytes.

Among Fig. 4, indicate with specific address target rewriting address among the flash ROM 13.But, as shown in Figure 5,, can only indicate first address, and these subsequent address are indicated with the relative value that is right after used address, front with specific address with respect to follow-up address.For example in example shown in Figure 5, represent to be positioned at the address 0x1 of the back, rewriting address of o.1 indicating with the rewriting address of rewritten instructions No.2 indication with command N.

In this way, just can rewrite, can reduce the data volume of rewritten instructions thus with the relative address indication of data volume less than the specific address data volume.

(second embodiment)

End device according to second embodiment of the invention is described below.

Identical with end device among first embodiment respectively according to the example of the example of the functional-block diagram of the end device of second embodiment of the invention and memory map, therefore also identical with shown in Fig. 1 and 2.

In first embodiment, rewritten instructions is constituted by rewriting destination address 401 in the nonvolatile memory shown in Figure 4 and overwriting data 402.In a second embodiment, as shown in Figure 6, rewritten instructions is by rewriteeing directive command 501 and being used to carry out the data 501 of this order and 502 constitute.In this way, the effect also can obtaining to resemble among first embodiment.

For example, the rewritten instructions No.1 among Fig. 6 is the instruction that is used in RAM 14 expansions.When control CPU 12 received rewritten instructions No.1, it utilized data 1 as extended source address 504,, as expansion destination address 505 program was expanded to the RAM 14 from flash ROM 13 with data 2.

In addition, the rewritten instructions No.8 among Fig. 6 is an instruction that writes back flash ROM 13.The control CPU 12 that receives rewritten instructions No.8 deletes among the flash ROM 13 from the block of data 2 beginnings of rewritten instructions back, utilize data 1 as extended source address 506 then,, as record object address 507 program among the RAM 14 is deposited among the flash ROM 13 with data 2.

Rewritten instructions No.2 is the data rewrite instruction to No.7 and No.10 to No.13.When control CPU 12 received the data rewrite instruction, it utilized data 1 as rewriteeing destination address 508,, as actual rewrite data 509 data among the RAM is rewritten with data 2.

Operation when having provided rewritten instructions shown in Figure 6 below with reference to flow chart description shown in Figure 7.

At first, in step S110, when the rewritten instructions that provides instruction shown in Figure 6 as flash ROM 13 program of depositing, control CPU 12 reads rewritten instructions No.1 shown in Figure 6 by external connection interface section 11, and it is existed in the optional zone of RAM 14.

In step S111, control CPU 12 checks o.1 whether command N be to rewrite command for stopping.Because o.1 this command N is not to rewrite command for stopping, control CPU 12 changes the processing procedure of step S112 over to.

In step S112, control CPU 12 checks that whether o.1 command N be to be used for the instruction expanded at RAM 14.Because o.1 command N is to be used for the instruction expanded at RAM 14, control CPU12 changes the processing procedure of step S115 over to.

In step S115, control CPU 12 is according to the data of instruction back, the 0x00110000 in RAM 14 in the 0x0011FFFF to start from the block of 0x00010000 among the flash ROM 13, promptly the 0x00010000 among second embodiment expands to the data of 0x0001FFFF.Then, control CPU12 changes the processing procedure of step S110 over to.

Then, in step S110, control CPU 12 reading command No.2.Control CPU 12 resembles the command content of command N being checked reading command No.2 o.1 in step S111 and S112.But command N is o.2 inconsistent with the jump condition (branch condition) of step S111 and S112.Therefore, control CPU 12 changes the processing procedure of step S113 over to.

In step S113, control CPU 13 decision instruction No.2 are data rewrite instructions, therefore, change the process of step S116 over to.

In step S116, the data that control CPU 12 stores in the 0x43 according to the data rewrite address 0x00110030 of this instruction back.

Then, control CPU 12 repeats the process identical with the front, up to command N o.7, and reading command No.8 in step S110 then.Control CPU 12 checks command content according to the mode identical with aforementioned process at step S111 in S113, change the processing procedure of step S114 then over to.

In step S114, control CPU 12 decision instruction No.8 are the instructions that write back flash ROM 13, change the processing procedure of step S117 then over to.

In step S117, according to the data of this instruction back, control CPU 12 changes over to and will be among the RAM 14 records the processing procedure of block 0x00010000 in the 0x0001FFFF through the program of expansion.At first, control CPU 12 once deletes block 0x00010000 among the ROM 13 to 0x0001FFFF.Then, control CPU 12 with the block 0x00010000 of RAM 14 block 0x00010000 to the content record of 0x0001FFFF to flash ROM 13 in 0x0001FFFF.

Then, control CPU 12 carries out aforementioned process for all rewritten instructions that Fig. 6 provided.

As mentioned above, according to second embodiment, the data updated that needs that can only flash ROM 13 in the terminal device 1 be deposited in the Control Software is read in the terminal device 1.Can shorten the time of in the terminal device 1 software that writes down in the flash ROM 13 being upgraded thus.

In addition, in a second embodiment, Fig. 6 rewritten instructions shown in the example of passing the imperial examinations at the provincial level can provide by external interface shown in Figure 1 11, in addition, also can sequentially provide command content for the executive routine process.Have again, the instruction among the RAM 14 that deposit terminal device 1 also can be provided together, so that carry out rewrite process according to the instruction of storage.

In addition, in aforementioned description, can carry out each process of checking the content that reads instruction according to the order of step S111, S112, S113 and S114 among Fig. 7, even but changed order in optional mode, also can obtain same effect.

(the 3rd embodiment)

In first embodiment, instruct constituting again by rewriting destination address 401 shown in Figure 4 in the flash ROM 13 (it is a nonvolatile memory) and overwriting data 402.In the 3rd embodiment, as shown in Figure 8, rewritten instructions is by rewriteeing start address 801, overwriting data item number 802 and constituting with overwriting data item number 802 corresponding actual rewrite data 803.In this way, just can obtain the effect identical with first embodiment.

In addition, identical with first embodiment shown in Fig. 1 and 2 respectively according to the example of the example of the functional block diagram of the terminal device of third embodiment of the invention and memory map figure.

Below with reference to process flow diagram shown in Figure 9, the operation of terminal device 1 when being described in the rewritten instructions that provides shown in Figure 8.

In step S121, when instruction shown in Figure 8 being offered terminal device 1 with the rewritten instructions of the program of being deposited in as flash ROM13, control CPU 12 reads in optional zone (at this, supposing that the 0x00100000 of this zone from Fig. 2 begins) among the RAM 14 by external connection interface section 11 with rewritten instructions shown in Figure 8.

In step S122, the rewriting start address among control CPU 12 couples of Fig. 8 checks, judges the rewriting in the 0x0001FFFF of block 0x00010000 among rewritten instructions No.1 and the No.2 indication flash ROM 13.

Then, in step S123, the data in the block of judging in to step S122 in the optional zone of control CPU 12 outside the zone of reading in rewritten instructions (at this hypothesis 0x00110000 to 0x0011FFFF) are expanded.

In addition, in step S124, control CPU 12 determines that according to the rewritten instructions No.1 among Fig. 8 the address 0x00010030 that among the RAM 14 0x00110030 among the flash ROM 13 has been carried out expanding rewrites start address, and the number that rewrites the number item is 0x04.

In step S125, control CPU 12 changes the content of address 0x00110030 to 0x43 according to the overwriting data of instruction No.1 among Fig. 8.

Then, in step S126, control CPU 12 will rewrite the address and add 1, become 0x00110031.In step S127, control CPU 12 subtracts 1 with overwriting data item number, becomes 0x03.In step S128, control CPU 12 checks whether overwriting data item number is 0, and when this number was not 0, it changed the processing of step S125 over to.

Then, control CPU 12 repeats the processing procedure of above-mentioned steps S125 to S128, becomes 0 up to overwriting data item number.

When overwriting data item number became 0, whether the rewritten instructions to rewriteeing block that control CPU 12 determines among the determining step S122 in step S129 was all handled.When the rewritten instructions on the block was untreated, control CPU 12 changed the processing of step S124 over to, and repeating step S124 is to the processing procedure of S129 then, and all rewritten instructions on block have been passed through processing.

Meanwhile, all through after handling, control CPU 12 deletes the block of determining in the flash ROM 13 to all rewritten instructions on rewriteeing block when step S122 in step S130.Then, control CPU 12 records deleting in the block of flash ROM 13 with area 0 x00110000 among the RAM 14 to the new Control Software of 0x0011FFFF stored.

Then, control CPU 12 judges whether to have finished the processing of the rewritten instructions that Fig. 8 is illustrated for example in step S131.Handle imperfect tense when this, control the processing procedure that CPU enters step S122.

Then, control CPU 12 repeats the processing procedure of above-mentioned steps S122 to S131, up to the processing of having finished all rewritten instructions.

As mentioned above, according to the 3rd embodiment, in the Control Software of the flash ROM of terminal device 1 13 stored, can only read the data that need be updated in the terminal device 1 and upgrade.

In the 3rd embodiment, as shown in Figure 8, rewritten instructions constitutes by rewriteeing start address 801, overwriting data item number 802 and actual rewrite data 803.In addition, as shown in figure 10, rewritten instructions can constitute by rewriteeing start address 1001, rewriting termination address 1002 and actual rewrite data 1003.Under this situation, for example, as shown in figure 10, make comparisons with rewriteeing termination address 0x00010033, overwriting data item number is derived as 0x04 by rewriteeing start address 0x00010030.Therefore, utilize rewritten instructions shown in Figure 10, also can obtain the effect identical with rewritten instructions shown in Figure 8.

Therefore, in the 3rd embodiment, as shown in Figure 8, rewritten instructions combines by rewriteeing start address 801, overwriting data item number 802 and actual rewrite data 803.In addition, as shown in figure 11, rewritten instructions can be made of the particular data 1103 that rewrites start address 1101, actual rewrite data 1102 and expression rewriting termination.Under this situation, for example in the rewritten instructions No.1 of Figure 11, be 0x43 with the Data Update that (wherein, rewrites program on the start address 0x00010030) among the address 0x00110030 in the RAM 14 through expansion.In addition, be 0xBF with the Data Update on the 0x00110031 of address, be 0x00 with the Data Update on the 0x00110032 of address, be 0x10 with the Data Update on the 0x00110033.

Therefore, rewrite the exclusive data that stops because the data of 0x10 back are expressions, next data that therefore can judge this particular data back are that next rewrites start address.In this manner, by repeating said process, rewritten instructions shown in Figure 11 can realize the effect identical with rewritten instructions shown in Figure 8.

In addition, in the 3rd embodiment, in step S126, will rewrite the address and add 1, in step S127, the overwriting data item number be subtracted 1 then.But, by earlier the overwriting data item number being subtracted 1, add 1 will rewriteeing the address then, also can obtain same effect.

(the 4th embodiment)

In the 3rd embodiment, as shown in Figure 8, rewritten instructions can be combined by the rewriting start address 801 in the nonvolatile memory, overwriting data item number 802 and actual rewrite data 803.In the 4th embodiment, as shown in figure 12, instruction by the instruction 1201 that comprises the rewritten instructions order and the data 1202 that are used to carry out this order combine.In this way, can obtain the effect identical with the 3rd embodiment.

In addition, identical with first embodiment shown in Fig. 1 and 2 respectively according to the example of the example of the functional-block diagram of the end device of fourth embodiment of the invention and memory map figure.

Below with reference to flow chart description shown in Figure 13 operation when providing rewritten instructions shown in Figure 12.

In addition, in the operation of the rewritten instructions of Figure 12, in the RAM expansion with write back ROM and second embodiment in the same.In addition, this rewriting expression utilization is write in the address of the data representation of using the instruction back corresponding to the follow-up real data of the data item number of the data representation of back, address.

In step S141, provide instruction shown in Figure 12 as flash ROM 13 in during rewritten instructions on the stored programme, control CPU 12 reading command No.1.

Then, in step S142, control CPU 12 checks whether reading command is to rewrite command for stopping.When this instruction is not when rewriteeing command for stopping, to control the processing procedure that CPU 12 enters step S143.

In step S143, control CPU 12 checks that whether reading command are the extended instructions among the RAM 14.When this instruction is extended instruction among the RAM 14, the processing procedure that control CPU 12 enters step S144, and when instructing when not being extended instruction among the RAM 14, it enters the processing procedure of step S145.

In step S144, when reading command is a command N among Figure 12 o.1 the time, instruction is the extended instruction among the RAM 14.Therefore, the address 0x00110000 of control CPU 12 in RAM 14 expands to the data on the 0x0001FFFF the address 0x00010000 among the flash ROM 13 to 0x0001FFFF.Then, control the processing procedure that CPU 12 enters step S141.

When reading command is a command N among Figure 12 o.2 the time, control CPU 12 reading command in step S141.Then, control CPU 12 enters S145 to the processing of S143 by step S142 processing procedure.

In step S145, control CPU 12 checks whether reading command is the data rewrite instruction.When reading command is the data rewrite instruction, the processing that control CPU 12 enters step S146.Therebetween, when reading command is not the data rewrite instruction, the processing procedure that control CPU 12 enters step S151.

O.12, command N among Figure 12 is the data rewrite instruction.Therefore, control the processing procedure that CPU 12 enters step S146.

In step S146, o.2 control CPU 12 determines that according to the command N among Figure 12 the address 0x00110030 among the RAM 14 rewrites start address, and overwriting data item number is 0x04.

Then, in step S147, CPU 12 is according to the overwriting data o.2 of the command N among Figure 12 in control, changes the content of address 0x00110030 into 0x43.Control CPU 12 then and in step S148, will rewrite the address and add 1, become 0x00110031.

In step S149, control CPU 12 subtracts 1 with overwriting data item number, becomes 0x03.

In step S150, control CPU 12 checks whether overwriting data item number is 0, and when these data are not 0, enters the processing procedure of step S147.

Then, control CPU 12 repeats the processing procedure of above-mentioned steps S147 to S150, becomes 0 up to overwriting data item number.When the number of overwriting data item is 0, the processing procedure that control CPU 12 enters S141.

Under command N in Figure 12 situation o.4, control CPU 12 reading command in step S141.Control CPU 12 enters S151 by the processing procedure of step S142, S143 and S145 processing procedure then.Then, in step S151, control CPU 12 checks whether this reading command is the instruction that writes back flash ROM13, when this instruction is when writing back the instruction of flash ROM 13, it enters the processing procedure of step S152, and when this instruction be not when writing back the instruction of flash ROM 13, it enters the processing procedure of S141.

O.4, command N among Figure 12 is the instruction that writes back flash ROM 13.Therefore, control the processing that CPU 12 enters step S152.

In step S152, the block of representing by the reading command that writes back ROM among the control CPU 12 erase flash ROM 13, promptly the 0x00010000 under the command N situation o.4 that Figure 12 illustrates for example is to 0x0001FFFF.Then, control CPU 12 is recorded in the new Control Software that the 0x00110000 of RAM 14 stores in the 0x0011FFFF in the block of having wiped of flash ROM 13.Then, control the processing procedure that CPU 12 enters step S141.

Control CPU 12 repeats the aforementioned processing process, and the instruction of reading in determination step S141 in step S142 is to rewrite command for stopping.

As mentioned above, according to the 4th embodiment, in the Control Software of the flash ROM of terminal device 1 13 storages, can only the needs data updated be read in terminal device 1.

In addition, in the 4th embodiment, the rewritten instructions that Figure 12 illustrates for example can provide by external interface shown in Figure 1 11, and, can sequentially be provided for carrying out the command content of this rewriting processing procedure.In addition, can give terminal together, handle so that carry out rewriting according to the instruction of being stored with the instruction of storage among the RAM 14.

In addition, the 4th embodiment has described according to the order of step S142, S143, S145 and S151 and has carried out the situation of the command content that reads among the step S141 being determined processing, determines order but can exchange in optional mode.

In addition, in the 4th embodiment, in step S148, will rewrite the address and add 1, in step S149, overwriting data item number be subtracted 1 then.But earlier the number with the overwriting data item subtracts 1, and then will rewrite the address and add 1, also can obtain same effect.

(the 5th embodiment)

Figure 14 A and 14B represent the modular structure of the program in the fifth embodiment of the invention, and Figure 14 A represents the structure before the correction program mistake, and Figure 14 B has represented to proofread and correct program error structure afterwards.

In other words, the program shown in Figure 14 A is made up of three modules, i.e. modules A 1401, module B1402 and module C1403.In the program shown in Figure 14 A, in the program before promptly proofreading and correct, modules A is positioned at 0x00000000 to 0x000001FF, and module B is positioned at 0x00000200 to 0x0000021F, and module C is positioned at 0x00000220 to 0x000005FF.

In addition, in the program shown in Figure 14 B, as correction to program result among Figure 14 A, variation has taken place in module B1402, and it is positioned at 0x00000200 to 0x0000022F, becomes module B ' 1404.Do not compare among modules A and Figure 14 A and change.The content of module C does not change, but it is displaced to 0x00000230 to 0x0000060F.

The example of supposing the example of the functional-block diagram of terminal device 1 in the fifth embodiment of the invention and memory map figure is identical with shown in Fig. 1 and 2 respectively.

Under the prerequisite of procedure stores in flash ROM 13 of hypothesis Figure 14 A, describe below in terminal device 1 method of the program updates among Figure 14 A for the program of Figure 114 B.At this, with reference to the operation of flow chart description when terminal device 1 is received rewritten instructions shown in Figure 15 shown in Figure 16.

In addition, when the instruction among Figure 15 1501 is extended instruction among the RAM 14, instruct the data 1502 of 1501 back to be start addresses 1503 of extended source, the data of start address 1503 back of extended source are the termination addresses 1504 of extended source, and the data of termination address 1504 back of extended source are expansion destination addresses 1505.Afterwards, control CPU 12 utilizes these data that the data of flash ROM 13 are expanded among the RAM 14.

Thus, can utilize address information rather than real data to carry out the appointment of growth data.Can reduce the data volume of rewritten instructions thus, shorten the program updates running time that comprises data transmission period.

It is identical to write back the operation of describing in ROM 13 and the second embodiment of the invention, and rewrites identical with the operation described in the fourth embodiment of the invention.

In step S161, when instruction shown in Figure 15 1501 being provided as among the flash ROM 13 stored program rewritten instructions by external connection interface section 11, control CPU 12 reading command No.1.

Then, in step S162, control CPU 12 checks whether reading command is to rewrite command for stopping.When this instruction is not when rewriteeing command for stopping, to control the processing procedure that CPU 12 enters step S163.

In step S163, control CPU 12 checks that whether reading command are the extended instructions among the RAM 14.Because this instruction is the extended instruction among the RAM 14, the processing procedure that control CPU 12 enters step S166.When reading command is not extended instruction among the RAM 14, the processing procedure that control CPU enters step S164.

O.1, command N among Figure 15 is the extended instruction among the RAM 14.Therefore, in step S166, control CPU 12 determines that according to command N data o.1 the start address of extended source is the 0x00000000 among the flash ROM 13, and termination address is 0x000001FF, and the expansion destination address is the 0x00110000 among the RAM 14.

Then, in step S167, control CPU 12 expands among the RAM 14 according to the data of the address of determining among the step S166 with flash ROM 13.

Under the command N situation o.1 that Figure 15 illustrates for example, with the data of 0x00000000 among the flash ROM 13 to the 0x000001FF, be that modules A 1401 among Figure 14 A expands to the 0x00110000 of RAM 14 in 0x001101FF.

Then, control the processing procedure that CPU 12 enters step S161.

O.2, command N among Figure 15 is the instruction of expanding among the RAM, and No.1 is identical for its and instruction.Therefore, control CPU 12 expands to data the RAM 14 from flash ROM 13 according to the identical processing procedure of and instruction No.1.

In this way, the module C1403 among Figure 14 A expands to 0x0011060F at the 0x00110230 of RAM 14.

Then, under the situation o.3 of the command N in Figure 15, CPU 12 is in step S161 reading command in control, enters the processing procedure of step S164 then via the processing procedure of step S162 and S163.

In step S164, control CPU 12 checks whether reading command is the data rewrite instruction.When this reading command is the data rewrite instruction, the processing procedure that control CPU 12 enters step S170.Therebetween, when this reading command is not the data rewrite instruction, the processing procedure that control CPU 12 enters step S165.

O.3, command N among Figure 15 is the data rewrite instruction.Therefore, control the processing procedure that CPU 12 enters step S170.In step S170, control CPU 12 determines that according to the rewritten instructions No.3 among Figure 15 the address 0x00110200 among the RAM 14 rewrites start address, and the number of overwriting data item is 0x30.

Then, in step S171, control CPU 12 changes the content of address 0x00110200 according to the overwriting data instruction of No.3 among Figure 15.

Then, in step S172, control CPU 12 will rewrite the address and add 1 and become 0x00110201.Then, in step S173, control CPU 12 subtracts 1 with the number of overwriting data item and becomes 0x2F.

In step S174, control CPU 12 checks whether the number of overwriting data items is 0, and is not 0 o'clock at this number, and it enters the processing procedure of step S171.

Then, control CPU 12 repeats the processing procedure of above-mentioned steps S171 to S174, becomes 0 up to the number of overwriting data item.When the number of overwriting data item becomes 0, the processing procedure that control CPU 12 enters S161.

Presumptive instruction No.3 provide with the corresponding follow-up data of 0x03 be module B ' 1403 among Figure 14 B, when among the step S174 number of overwriting data item being judged to be 0, to 0x0011022F, module B ' 1404 is expanded at the 0x00110200 of RAM 14.

As mentioned above, program shown in Figure 19 begins expansion by address 0x00110000 in RAM 14.

Be noted that because module B becomes module B ' because of renewal, and capacity increases, thus the position of module C to backward shift the capacity difference between module B and the module B '.In other words, displacement has taken place when expanding in module C in RAM 14, so that allow the relative value between the position of module C of the renewal object module B of storage among the flash ROM 13 and back increase.

In this way, though at module B owing to upgrading and capacity becomes when becoming module B ' greatly, can avoid also that module B ' and module C's is overlapping.

In addition, when the quantity (module B) of the program code (comprising immediate data) of a rewriting portion, can need not to rewrite and a part of code (module C) that is shifted, so can be under the situation of the information of the follow-up code (module C) that need not rewriting portion (module B ') rewriting program.Therefore, can reduce from the rewritten instructions of the external transmission of terminal device 1.In other words, can utilize less data volume shift module C.As a result, can shorten the renewal running time of the program that comprises data transmission period.

Then, under the command N situation o.4 of Figure 15, control CPU 12 has read in step S161 after the instruction, the processing procedure that enters step S165 by step S162, S163 and S164.

In step S165, control CPU 12 judges whether reading command is the instruction that writes back among the ROM, and when reading command be writing back among the ROM when instructing, it enters the processing procedure of step S168.

When this reading command is not that ROM writes back when instruction, the processing procedure that control CPU 12 enters step S161.

O.4, command N among Figure 15 is that ROM writes back instruction.Therefore, control the processing procedure that CPU 12 enters step S168.

In step S168, under the command N situation o.4 that Figure 15 illustrates for example, the ROM that control CPU 12 bases read writes back instruction, the new Control Software address 0x00110000 that determines storage among the RAM 14 is to 0x0O11FFFF, and flash ROM 13 write back block, promptly 0x00000000 is to 0x0000FFFF.

Then, in step S169, control CPU 12 deletes the block 0x00000000 of the flash ROM 13 that determines among the step S168 to 0x0000FFFF.Then, control CPU12 records RAM 14 stored in the block of deletion of flash ROM 13 to the new Control Software among the 0x0011FFFF at 0x00110000.

The processing procedure that control CPU 12 enters step S161.

Then, control CPU 12 sequentially repeats the aforementioned processing process, is judged to be the rewriting command for stopping up to the instruction of reading in step S161 in step S162.

As mentioned above, according to the 5th embodiment, need not to download under the situation of whole correction program shown in Figure 14 the Control Software of flash ROM 13 stored in the renewable terminal.As a result, because the minimizing of rewritten instructions has realized the shortening of software upgrading time.

In addition, according to the 5th embodiment, when the capacity of module B increases because of renewal, can be in the process that RAM 14 expands shift module C, with the relative value between the position of the module C of the module B that increases the more fresh target of storage among the flash ROM 13 and back.Thus, can reduce the outside rewritten instructions that transmits of slave unit.As a result, just can shorten the rewriting that comprises data transmission period and upgrade the running time.

In addition, though the 5th embodiment has described the situation that program is made up of three modules, number of modules and module capacity are not limited to number of modules recited above and capacity.

In addition, though " RAM expansion " among Figure 15 is by combining as the start address 1505 as the expansion purpose among the start address 1503 of extended source and termination address 1504, the RAM among the flash ROM 13, but as shown in figure 17, by the start address 1705 as the expansion purpose among the growth data item number 1704 of the start address 1703 of extended source and back and the RAM is combined, also can obtain same effect.

In addition, in Figure 15, utilize specific address to specify the zone of among the RAM 14 program in the flash ROM 13 being expanded.But because the zone among the RAM 14 only is used as operating area, so the control CPU 13 in the terminal device 1 can set the optional zone in the RAM 14.

Under this situation, in RAM 14, can utilize address when expanding with the shift value of optional regional start address specify or assignment procedure in the rewriting of RAM 14.In other words, in rewritten instructions shown in Figure 180, " expansion of RAM 14 " is by combining as the number 1804 of the start address 1803 of extended source, growth data item with the shift value 1805 of the start address in optional zone among the flash ROM 13.

For example, the start address that o.2 command N is illustrated in optional zone adds among the 0x00000230, that expansion begins with the address 0x00000220 among the flash ROM 13, with the corresponding follow-up data of 0x3E0.

In addition, " rewriting " combine by the number 1807 of the shift value 1806 of start address in the optional relatively zone, overwriting data item with the corresponding actual rewrite data 1808 of this data item number.For example, command N o.3 in, add that from the start address in optional zone the address of 0x0000200 begins to rewrite with the corresponding data of 0x30.

The instruction that writes back ROM 13 indicates the block of deleting based on flash ROM 13 to write back.Therefore, the head that writes back block is only indicated in this instruction.For example, command N o.4 in, 0x00000000 is designated as the head that writes back block, behind 0x0000FFFF, will write back flash ROM 13 to the zone that this optional regional head adds 0x0000FFFF at the block 0x00000000 that has deleted memory map figure shown in Figure 2 from the head the optional zone of RAM.

In addition, the 5th embodiment has described according to the order of step S162, S163, S164 and S165 the command content that reads among the step S161 has been determined the situation of processing, but also can change definite order in optional mode.

In addition, in the 5th embodiment, in step S172, will rewrite the address and add 1, in step S173, the number of overwriting data item be subtracted 1 then.But earlier the number with the overwriting data item subtracts 1, and then will rewrite the address and add 1, also can obtain same effect.

(the 6th embodiment)

Figure 20 A and 20B represent the modular structure of the program in the sixth embodiment of the invention, and Figure 20 A represents the structure before the correction program mistake, and Figure 20 B has proofreaied and correct program error structure afterwards.

In other words, the program shown in Figure 20 A is made up of three modules, i.e. modules A 2001, module B2002 and module C2003.Modules A is positioned at 0x00000000 to 0x000001FF, and module B is positioned at 0x00000200 to 0x0000021F, and module C is positioned at 0x00000220 to 0x000005FF.

In the program shown in Figure 20 B, as correction to program result shown in Figure 20 A, variation has taken place in the mould A2001 that determines.

Particularly, modules A 2001 becomes modules A, and ' 2004 are positioned on the 0x000001FF.Module B2002 becomes module B ' 2005 and is positioned at 0x00000200 to 0x0000022F.Module C content does not change, but its position moves on to 0x00000230 to 0x0000060F.

Figure 21 A represents the not partial content of the modules A 2001 of correction program mistake, and Figure 21 B has represented to proofread and correct the part of module A ' 2001 of program error.

Figure 22 represents the example that the transfer (branch) of the control CPU 12 of terminal device 1 among the 6th embodiment is ordered.

Making sign indicating number 2201 prepares and will shift (branch) as the address at the operand after the operational code 2,201 2202.

Particularly, prepare will be at operand 32 bit transitions (branch) of this operational code back as specific address for operational code 0xEA.In addition, operational code 0xE9 sets out 8 as relative value in this operational code back, and transfers to the address of representing with the summation of address stored in this operational code and this relative value.

In other words, shown in Figure 21 A, as address (2101) 0x00000010 (2103 data (2102)) when being 0xEA (2104), this part is the order that address 0x00000011 is translated into transferable 00000318 32 bit address to the data (2106) of 0x00000014 (2105) storage.

In addition, shown in Figure 21 A, when the content of address 0x000001F8 (2107) was 0xE9 (2108), it was that the data 0x38 on the address 0x000001F9 (2109) is set at relative value, shifts order as the 0x00000230 of the summation of 0x000001F8 and this relative value then.

The program error of control program is through the control program shown in Figure 20 of overcorrect B shown in Figure 21 B presentation graphs 20A.

Particularly, shown in Figure 20 B, the big 0x10 of the capacity position of the volume ratio module B2002 of module B ' 2005.As a result, the displacement of the module C2003 of module B2002 back the 0x10 position.Therefore, the transfer destination of the specific address transfer command of 0x00000010 (2103) stored becomes 0x00000328.In addition, the transfer destination of the relative address transfer command of storage becomes 0x00000240 among the 0x000001F8 (2109).

Terminal device among the 6th embodiment is described below.The example of the functional block diagram of the terminal device 1 of sixth embodiment of the invention and the example of memory map figure are respectively with first embodiment and respectively according to identical shown in Fig. 1 and 2.In addition, suppose that 0x00110000 proofreaies and correct the operating area of control program as control CPU 12 to 0x0011FFFF.

Describe below under the situation that has write down Figure 20 A program in flash ROM 13, terminal device 1 is the method for the program shown in Figure 20 B with the program updates shown in Figure 20 A.At this, the operation when providing rewritten instructions shown in Figure 23 for terminal device 1 with reference to flow chart description shown in Figure 24.

In addition, in the process that each instruction of Figure 23 is operated, rewriting is identical with the 5th embodiment's.

In addition, under the situation about expanding in RAM 14, data 2302 are positioned at the aft section of instruction 2301 No.1.Arranged the start address 2303 of extended source in the data 2302, expanded data item number 2304 is carried out in start address 2303 back in extended source, and the address 2305 of expanding purpose in expanded data item number 2304 back.

Control CPU 12 utilizes these information that data are expanded to the RAM 14 from flash ROM 13.

Under the situation that writes back ROM 13, instruct the head of data 2302 of 2301 No.6 back to indicate to record the start address 2306 of target block among the flash ROM 13.After having deleted the block initial, the data that are defined as in optional mode in the zone of RAM 14 operational zones are recorded in the flash ROM 13 with header addresses 2306 initial deleting in the block with header addresses 2306.

Variation in the relative address, the command N o.4 start-up portion of the data 2302 of back are the shift values 2307 of the head in the optional zone that extender is used among itself and the RAM 14.Its indication makes an explanation to the operational code of storing in the address of indicating with the summation of this start address and shift value 2307, and upgrades and the corresponding operand of this interpreter operation sign indicating number.

At first, in step S181, when instruction shown in Figure 23 being provided as among the flash ROM 13 stored program rewritten instructions by external connection interface section 11, control CPU 12 reading command No.1.

Then, in step S182, control CPU 12 checks whether reading command is to rewrite command for stopping.When this instruction is not when rewriteeing command for stopping, to control the processing procedure that CPU 12 enters step S183.

In step S183, control CPU 12 checks that whether reading command are the extended instructions among the RAM 14.If this instruction is the instruction of expanding in RAM 14, control CPU 12 processing procedure that enters step S186, and if this reading command when not being extended instruction among the RAM 14, it enters the processing procedure of step S184.

O.1, command N among Figure 23 is the extended instruction among the RAM 14.Therefore, in step S186, CPU 12 is based on command N data o.1 in control, the address of determining extended source is the 0x00000000 among the flash ROM 13, wanting expanded data item number is the 0x200 byte, the expansion destination address is 0x00110000, adds the summation of the 0x00000000 that is shifted as the start address 0x00110000 of last operating area among the RAM 14.

Then, in step S187, control CPU 12 expands to data the RAM 14 from ROM 13 according to address and the data item number determined among the step S186.

O.1, in command N is under the situation of instructing shown in Figure 23, in the 0x00110000 of RAM 14 data of expansion 0x00000000 in the 0x000001FF (being the modules A 2001 among Figure 20 A) to the 0x00110FF.

Then, in step S195, control CPU 12 is 0x00000000 at the area 0 x00000000 among the flash ROM 13 of writing down in the optional zone of operating area 0x00110000 to the 0x0011FFFF of RAM 14 to the shift amount of 0x000001FF, enters the processing procedure of step S181 then.

Afterwards, o.2 and instruction NO.1 is the same owing to the command N among Figure 23, is the instruction of expanding in RAM, so control CPU 12 carries out the expansion process of data from flash ROM 13 to RAM 14 according to the mode identical with aforementioned process.

In this way, the module C2003 among Figure 20 A expands to 0x0011060F at the 0x00110230 of RAM 14.

In addition, as above-described process, in step S195, area 0 x00000220 is 0x00000010 to the shift amount of 0x000005FF among the control CPU 12 record flash ROM13.

By aforementioned process, obtained the record of displacement zone start address 2501 shown in Figure 25 and termination address 2502 and shift amount 2503 that should the zone.

The start address 2501 in displacement zone and termination address 2502 are actually the start address and the termination address in this displacement zone.Just eliminated the requirement that utilizes real data to describe the displacement zone thus, so reduced data volume.

Then, under instruction was command N situation o.3 among Figure 23, control CPU 12 read this instruction in step S181, enter the processing procedure of step S184 then by the processing procedure of step S182 and S183.

In step S184, control CPU 12 checks whether reading command is the data rewrite instruction.When this reading command is the data rewrite instruction, the processing procedure that control CPU 12 enters step S190, and when this reading command was not the data rewrite instruction, it entered the processing procedure of step S196.

O.3, command N among Figure 23 is the data rewrite instruction.Therefore, control the processing that CPU 12 enters step S190.

In step S190, control CPU 12 utilizes the rewritten instructions No.3 among Figure 23 to determine that the address 0x00110200 that adds superior displacement 0x00000200 acquisition by the start address 0x00110000 with operating area among the RAM 14 rewrites start address, and the number of overwriting data item is 0x30.

Afterwards, in step S191, control CPU 12 changes the content of address 0x002202000 according to the overwriting data o.3 of the command N among Figure 23.

Then, in step S192, control CPU 12 should rewrite the address and add that 1 became 0x00110201.

In step 193, control CPU 12 cuts 1 with the number of this overwriting data item, becomes 0x2F.

In step S194, control CPU 12 checks whether the number of overwriting data item is 0, and when this number was not 0, it entered the processing procedure of step S191.

Then, control CPU 12 repeats the processing procedure of above-mentioned steps S191 to S194, becomes 0 up to the number of overwriting data item.

When the number of overwriting data item becomes 0, the processing procedure that control CPU 12 enters step S181.

At this, suppose that the corresponding follow-up data of 0x30 that and instruction No.3 provides is the module B ' 2005 among Figure 20 B, when the number of judging the overwriting data item in step S194 becomes 0, at the 0x00110200 of RAM 14 expansion module B ' 2005 to the 0x0011022F.

By the aforementioned processing process, program shown in Figure 19 address 0x00110000 from RAM 14 begins expansion.

Figure 26 represents to be in the state of the RAM 14 of this point.Address (2601) 0x00110010 (2603) and 0x001101F8 (2605) have peripheral data (2602), 0xEA (2604) and 0xE9 (2606) respectively.

Then, under instruction is command N situation o.4 among Figure 23, control CPU 12 reading command in step S181, the processing procedure that enters S196 then by the processing procedure of step S182, S183 and S184.

In step S196, control CPU 12 checks whether reading command is the address modification instruction.When this reading command is the address modification instruction, the processing that control CPU 12 enters S197.When this reading command is not the address modification instruction, the processing that control CPU 12 enters S185.

O.4, command N among Figure 23 is the address modification instruction.Therefore, control the processing procedure that CPU 12 enters S197.

In step S197, the address modification instruction that it is address 0x00110010 (it will be added on the start address 0x00110000 of operating area among the RAM 14) that control CPU 12 judges by this shift value 0x00000010 (2307) that reads address modification instruction expression.

In addition, control CPU 12 utilizes 4 positional operands of operational code shown in Figure 22 and 0x00110010 back, the operational code 0xEA (2604) in address 0x00110010 (2603) stored shown in Figure 26 is interpreted as the transfer command of address 0x00000318.

In addition, control CPU 12 utilizes module displacement information record shown in Figure 25, confirms to comprise that the block 0x00000220 of 0x00000318 has shift amount 0x00000010 to 0x000005FFF.Therefore, to calculate transfer destination address in the correction program be 0x00000328 by uncorrected transfer destination address 0x00000318 being added shift amount 0x00000010 obtains to control CPU 12.

Then, in step S198, control CPU 12 schedulers (2701) 0x00110010 (2703) are to the byte-oriented operand of operational code (data) (2702) 0xEA (2704) back of 0x00000328.

The processing procedure that control CPU 12 enters S181.

The command N of this external Figure 23 o.5 in, control CPU 12 reading command in step S181, the processing procedure that enters S197 then by the processing procedure of step S182, S183, S184 and S196.

In step S197, control CPU 12 judges that whether with reading shift value 0x000001F8 that the address modification instruction represents be the address modification instruction that will be added to the address 0x001101F8 on the start address 0x00110000 of operating area of RAM 14.

For example, control CPU 12 utilizes 1 positional operand of operational code shown in Figure 22 and 0x001101F8 back, to exist operational code (2702) 0xE9 (2706) among address (2701) 0x001101F8 (2705) of Figure 27 to be interpreted as transfer command for address 0x00000230, described address 0x00000230 goes up and obtains by 0x38 being added to 0x000001F8.In addition, the control CPU 12 block 0x00000220 that utilizes transposed recording shown in Figure 25 to identify to comprise 0x00000230 has shift amount 0x00000010 to 0x000005FF.

Therefore, control CPU 12 can judge that transfer destination address in the correction program is to go up the 0x00000240 that obtains by shift amount 0x0000010 being added to uncorrected transfer address 0x00000230, and the relative address of calculating the 0x00001F8 of operational code is 0x48.

Then, in step S198, control CPU 12 is according to the transfer destination address of determining among the step S197, and 1 byte-oriented operand of operational code (data) (2802) 0xE9 (2806) back of address shown in Figure 28 (2801) 0x001101F8 (2805) is updated to 0x48.

Therefore, when the used operand of operational code was shifted because of the volume change of module B, control CPU 12 can write down automatic correct operation number according to module displacement information shown in Figure 25.Therefore, just needn't indicate the calibration substance that obtains operand from the outside, thereby reduce the data volume of instruction.

Then, control CPU 12 enters process S181.

Afterwards, under instruction is command N situation o.6 among Figure 23, control CPU 12 reading command in step S181, the processing procedure that enters step S185 then via step S182, S183, S184 and S196.

In step S185, control CPU 12 checks whether reading command is the instruction that writes back ROM, when this reading command is that it enters the processing procedure of step S188 when writing back the instruction of ROM 13, and when this reading command be not when writing back the instruction of ROM 13, it enters the processing procedure of step S181.

O.6, command N among Figure 23 is the instruction that writes back ROM 13.Therefore, control the processing procedure that CPU 12 enters step S188.

In step S188, control CPU 12 determines to use among the flash ROM 13 block of the reading command indication that writes back ROM 13.For example, be under the command N situation o.6 that illustrates for example of Figure 23 in instruction, control CPU 12 is defined as this block with address 0x00000000 to 0x0000FFFF.

Then, in step S189, the block of the 0x00000000 that control CPU 12 deletes among the step S188 flash ROM 13 that determines to the 0x0000FFFF.Then, control CPU 12 will exist the operating area 0x00110000 of RAM 14 to record deleting on the block of flash ROM 13 to the new Control Software among the 0x0011FFFF.

The processing procedure that control CPU 12 enters step S181.

Then, control CPU 13 repeats the aforementioned processing processes, is judged to be the rewriting command for stopping up to the instruction of reading in step S181 in step S182.

As mentioned above, according to the 6th embodiment, can need not to download under the situation of the whole correction program shown in Figure 20 B, more the Control Software of flash ROM 13 stored of new terminal.

In addition, though the 6th embodiment has described the situation that program is made up of three modules, module number and module capacity are not limited to above-described module number and capacity.

Though with Figure 22 of illustrating example,, utilize to be different from operational code shown in Figure 22 and also can to obtain same effect among the 6th embodiment according to the type of the used control CPU 12 of terminal device 1 as the operational code of transfer command.

In addition, the 6th embodiment has described and has utilized module displacement information shown in Figure 25 to write down to proofread and correct absolute value to shift and the situation of relative value jump operation number.But, also applicable function call order and transfer command.

In addition, according to the 6th embodiment, when having adopted transfer command and function call order (each all has relative assigned address) and them all to surpass relative address to specify address realm available in the transfer command, cancelled to download by external interface be used to indicate from relative address specify transfer command or the call instruction of relative address specified function change into relatively specific address specify the data of transfer command or the call instruction of specific address specified function, to become the requirement of refresh routine.So reduced data volume by the external interface indication.As a result, can shorten the program updates running time that comprises data transmission period.

In addition,, can utilize module displacement information record shown in Figure 25, on question blank, proofread and correct the address that exists of processing module being provided with under the situation that has the question blank configuration that the address forms by incident such as alarm, key pressure and processing module of the present invention.

Under the situation of calibration look-up table, can or utilize the indication question blank position, address of packing in advance in the terminal device 1 by the outside.When packing the question blank address into, automatic calibration look-up table under the situation of external command can need not.

In addition, in the 6th embodiment, can utilize the instruction that is used to change the address of wherein storing order as the address (operand) of absolute value transfer and relative value transfer and so on.But, CPU 12 is in the process that receives the only instruction of presentation address in control, whether the order that can judge absolute value transfer or relative value transfer and so on automatically is present in this address, and when having this order, utilizes module displacement information record correct operation number shown in Figure 25.

So can save and obtain instruction from the outside.In addition, do not known to have stored absolute value shifts or the situation of the order that relative value shifts and so under, the operand that adopts in the corrective command automatically.

In addition,, can extract transfer (function call) order, and proofread and correct the address of use in this order by decomposing program from the outset.So reduced the instruction of obtaining from the outside.

Under this situation, when program and data division in conjunction with when very complicated owing to be difficult to program part is separated, therefore can only decompose this specified portions then in advance from outside designated program part, recomputate the address again.

In this way, just eliminated the needs of specifying the position of shifting (function call) order from the outside, therefore can reduce the instruction of obtaining from the outside.

In addition, the 6th embodiment has described according to the order of step S182, S183, S184, S196 and S185 and has carried out the situation of the command content that reads among the step S181 being determined processing, but can also optional mode change definite order.

In addition, in the 6th embodiment, in step S192, will rewrite the address and add 1, in step S193, the number of overwriting data item be subtracted 1 then.But the number with the overwriting data item subtracts 1 earlier, will rewrite the address then and add 1, also can obtain same effect.

Have again, among the 6th embodiment, in step S186, determined extended source the address, want expanded data item number, the expansion destination address after, in step S189, data are expanded to the RAM 14 from flash ROM 13, in step S195 the record this displacement.But record displacement earlier expands to data the RAM 14 from flash ROM 13 then and also can obtain same effect.

The application is based on the Japanese patent application 2002-294499 of application on October 8th, 2002 and the 2003-347561 of application on October 6th, 2003, and is by reference that its whole contents is incorporated specially at this.

Industrial applicability

According to the present invention, the software of storing in the nonvolatile memory of new terminal more is so that the mistake of proofreading and correct In the journey, can be in the situation that need not all correction softwares are downloaded in the terminal correction software, and favourable Be can be effectively the software in the new terminal more.

Claims (27)

1. method for updating program, it comprises:

In the program process that upgrades the rewritable nonvolatile memory stored, wherein said rewritable nonvolatile memory is made up of a plurality of blocks, and these blocks comprise the block of the more fresh target part of the program of storing, and in RAM the program part in the more fresh target block partly of storing described program are expanded;

According to rewritten instructions by the external interface indication, only be updated in the described more fresh target part of the described program part of process expansion in the described RAM,

The described program part that has upgraded is write back described nonvolatile memory together, and

When described more fresh target part when capacity changes along with renewal, described rewritten instructions is, when further part is spread over described RAM, move the instruction of the address location of described further part, change the relative position between the described further part of described more fresh target part when being stored in described nonvolatile memory and described more fresh target part thus.

2. method for updating program according to claim 1, wherein when described more fresh target part has increased capacity owing to renewal, described rewritten instructions is that the described further part that is used to be shifted in the expansion process of described RAM is so that increase the described more fresh target part of described nonvolatile memory stored and the instruction of the relative position relation between the described more fresh target further part partly.

3. method for updating program according to claim 2, wherein said rewritten instructions comprise the address information of determining described further part and expand the start address of described further part in described RAM.

4. method for updating program according to claim 3, the address information of wherein determining described further part comprise that described further part is in described nonvolatile memory or start address among the described RAM and data item number.

5. method for updating program according to claim 3 determines that wherein the address information of described further part is included in the start address and the termination address of described further part in described nonvolatile memory or the described RAM.

6. method for updating program according to claim 2, the displacement information of wherein said further part in described RAM is recorded in another zone that is different from the program extended area among the described RAM, when the address of described nonvolatile memory or described RAM is indicated by programmed instruction, according to the specific address value of the indicated described addressed memory storage of described displacement information correction.

7. method for updating program according to claim 6, wherein said displacement information comprise the address information of determining described further part position and the start address of expanding described further part in described RAM.

8. method for updating program according to claim 7, the address information of wherein determining described further part comprises start address and the data item number of described further part in described nonvolatile memory or described RAM, start address and the termination address of perhaps described further part in described nonvolatile memory or described RAM.

9. method for updating program according to claim 7, the start address of the described further part when wherein expanding described further part in described RAM are the relative addresses of choosing the start address in zone with basis in described nonvolatile memory or described RAM wantonly.

10. method for updating program according to claim 6, wherein rewritten instructions is indicated the address in described nonvolatile memory or described RAM, the specific address value that the specific address that the described addressed memory that should indicate according to described displacement information correction stores up specifies transfer command to use.

11. method for updating program according to claim 6, wherein rewritten instructions is indicated the address in described nonvolatile memory or described RAM, the specific address value that the specific address specified function call instruction that the described addressed memory that should indicate according to described displacement information correction stores up is used.

12. method for updating program according to claim 6, wherein rewritten instructions is indicated the address in described nonvolatile memory or described RAM, the relative address value that the described addressed memory that should indicate according to described displacement information correction stores up.

13. method for updating program according to claim 6, wherein rewritten instructions is indicated the address in described nonvolatile memory or described RAM, and specifies the relative address value of transfer command use according to the relative address that the described addressed memory that described displacement information correction is indicated stores up.

14. method for updating program according to claim 6, wherein rewritten instructions is indicated the address in described nonvolatile memory or described RAM, the relative address value that the relative address specified function call instruction that the described addressed memory of indicating according to described displacement information correction stores up is used.

15. method for updating program according to claim 12, wherein in process according to the relative address value of the described program of described displacement information correction, when the described relative address value of being proofreaied and correct has surpassed the scope of permission relative address appointment, convert described relative address value to the specific address value.

16. method for updating program according to claim 13, wherein be corrected in the process of specific address value, utilizing not calibrated described relative address value to specify transfer command to convert specific address to relative address and specify transfer command according to the relative address value of the described program of described displacement information correction and with the described relative address value of being proofreaied and correct.

17. method for updating program according to claim 14, wherein converting in the process of specific address value, utilizing not calibrated described relative address value to convert the call instruction of relative address specified function the call instruction of to specific address specified function according to the relative address value of the described program of described displacement information correction and with the described relative address value of being proofreaied and correct.

18. method for updating program according to claim 1, wherein said rewritten instructions comprise start address, the data item number that will rewrite and follow-up actual rewrite data that described program part is expanded in described nonvolatile memory or described RAM.

19. method for updating program according to claim 1, wherein said rewritten instructions comprise described program part in described nonvolatile memory or the start address of in described RAM, expanding, follow-up actual rewrite data and expression rewrite the particular data that stops.

20. method for updating program according to claim 3 wherein in the assignment procedure of the address of described rewritten instructions, utilizes absolute value to carry out the address earlier and specifies, and utilizes then to carry out follow-up address according to the relative address of the address of front appointment just and specify.

21. method for updating program according to claim 3, wherein in the assignment procedure of the address of described rewritten instructions, utilize absolute value to carry out the address earlier and specify, afterwards when having finished follow-up rewriting by assigned address and handle, utilize and carry out follow-up address according to the relative address of address and specify.

22. method for updating program according to claim 3, wherein in the assignment procedure of the address of described rewritten instructions, utilize the address of determining in advance to carry out the address as a reference earlier and specify, follow-up appointment is to utilize the relative address of address appointment just, as a reference, front to specify.

23. method for updating program according to claim 3, wherein in the assignment procedure of the address of described rewritten instructions, utilizing absolute value to carry out the address earlier specifies, utilize the address of determining in advance as a reference to carry out subsequent address then and specify, it is that relative address according to the address when being finished follow-up rewriting by specified address and handle is specified that subsequent address is specified.

24. a terminal device, it comprises:

Rewritable nonvolatile memory, its a plurality of block stored program;

RAM；

Be used to receive the external interface of the rewritten instructions of described program; And

Controller, it will spread over RAM to the program part in the more fresh target described block partly of storing described program, only the described more fresh target of the described program part of process expansion in the described RAM is partly upgraded according to described rewritten instructions, described program part after will upgrading is together then write nonvolatile memory described time

Wherein, when described more fresh target part when capacity changes along with renewal, described rewritten instructions is, when further part is spread over described RAM, move the instruction of the address location of described further part, change the relative position between the described further part of described more fresh target part when being stored in described nonvolatile memory and described more fresh target part thus.

25. terminal device according to claim 24, wherein said external interface are the wired connection interfaces.

26. terminal device according to claim 24, wherein said external interface are the wireless connections interfaces.

27. terminal device according to claim 24, wherein said external interface is a memory card interface, and described controller is read rewritten instructions from the storage card that inserts memory card interface.

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