CL2016002294A1 - Arquitectura de procesador de árbol de decisión paralelo. - Google Patents

Arquitectura de procesador de árbol de decisión paralelo.

Info

Publication number
CL2016002294A1
CL2016002294A1 CL2016002294A CL2016002294A CL2016002294A1 CL 2016002294 A1 CL2016002294 A1 CL 2016002294A1 CL 2016002294 A CL2016002294 A CL 2016002294A CL 2016002294 A CL2016002294 A CL 2016002294A CL 2016002294 A1 CL2016002294 A1 CL 2016002294A1
Authority
CL
Chile
Prior art keywords
decision tree
processor architecture
tree processor
parallel decision
chip
Prior art date
Application number
CL2016002294A
Other languages
English (en)
Inventor
Douglas C Burger
James R Larus
Andrew Putnam
Jan Gray
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of CL2016002294A1 publication Critical patent/CL2016002294A1/es

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00Computing arrangements using knowledge-based models
    • G06N5/02Knowledge representation; Symbolic representation
    • G06N5/022Knowledge engineering; Knowledge acquisition
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90Details of database functions independent of the retrieved data types
    • G06F16/901Indexing; Data structures therefor; Storage structures
    • G06F16/9027Trees
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90Details of database functions independent of the retrieved data types
    • G06F16/903Querying
    • G06F16/90335Query processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00Machine learning
    • G06N20/20Ensemble learning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Data Mining & Analysis (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computational Linguistics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Complex Calculations (AREA)

Abstract

Sistema de hardware de calificación de árbol de decisión en chip, que comprende una pluralidad de procesadores de árbol de decisión, implementados como circuitería en el chip para acceder a un vector de característica común y para ejecutar uno o más árboles de decisión con respecto al vector de característica común; método.
CL2016002294A 2014-03-17 2016-09-13 Arquitectura de procesador de árbol de decisión paralelo. CL2016002294A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/216,990 US10332008B2 (en) 2014-03-17 2014-03-17 Parallel decision tree processor architecture

Publications (1)

Publication Number Publication Date
CL2016002294A1 true CL2016002294A1 (es) 2017-03-24

Family

ID=52774572

Family Applications (1)

Application Number Title Priority Date Filing Date
CL2016002294A CL2016002294A1 (es) 2014-03-17 2016-09-13 Arquitectura de procesador de árbol de decisión paralelo.

Country Status (14)

Country Link
US (1) US10332008B2 (es)
EP (1) EP3120262A1 (es)
JP (1) JP6605573B2 (es)
KR (1) KR102376117B1 (es)
CN (1) CN106133721B (es)
AU (1) AU2015231828A1 (es)
CA (1) CA2939959A1 (es)
CL (1) CL2016002294A1 (es)
IL (1) IL247166A0 (es)
MX (1) MX2016011670A (es)
PH (1) PH12016501639A1 (es)
RU (1) RU2016136985A (es)
SG (1) SG11201607431XA (es)
WO (1) WO2015142595A1 (es)

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JP7069898B2 (ja) * 2018-03-16 2022-05-18 株式会社リコー 学習識別装置および学習識別方法
WO2019183868A1 (en) * 2018-03-29 2019-10-03 Intel Corporation Methods, systems, articles of manufacture and apparatus to improve resource utilization for binary tree structures
CN109086815B (zh) * 2018-07-24 2021-08-31 中国人民解放军国防科技大学 基于fpga的决策树模型中的浮点数离散化方法
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CN109376590A (zh) * 2018-09-07 2019-02-22 百度在线网络技术(北京)有限公司 基于无人车的障碍物分类方法、装置、设备以及存储介质
JP7176359B2 (ja) * 2018-11-05 2022-11-22 株式会社リコー 学習装置および学習方法
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US20200160450A1 (en) * 2018-11-19 2020-05-21 Jpmorgan Chase Bank, N.A. Systems and methods for decision tree-based management of market risk stress scenarios
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US11615827B2 (en) * 2020-10-15 2023-03-28 Hewlett Packard Enterprise Development Lp Hardware accelerator with analog-content addressable memory (a-CAM) for decision tree computation
CN117851399A (zh) * 2022-09-30 2024-04-09 戴尔产品有限公司 数据读取方法、数据更新方法、电子设备和程序产品

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Also Published As

Publication number Publication date
CN106133721A (zh) 2016-11-16
KR20160132853A (ko) 2016-11-21
US10332008B2 (en) 2019-06-25
WO2015142595A1 (en) 2015-09-24
SG11201607431XA (en) 2016-10-28
EP3120262A1 (en) 2017-01-25
PH12016501639A1 (en) 2016-10-03
US20150262064A1 (en) 2015-09-17
CA2939959A1 (en) 2015-09-24
RU2016136985A (ru) 2018-03-20
RU2016136985A3 (es) 2018-10-24
CN106133721B (zh) 2019-10-01
AU2015231828A1 (en) 2016-09-08
KR102376117B1 (ko) 2022-03-17
JP2017517082A (ja) 2017-06-22
MX2016011670A (es) 2016-11-07
JP6605573B2 (ja) 2019-11-13
IL247166A0 (en) 2016-09-29

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