CH711566A2

CH711566A2 - Inverter for exchanging electrical energy between a DC system and an AC system.

Info

Publication number: CH711566A2
Application number: CH01389/15A
Authority: CH
Inventors: Walter Kolar Johann; Bortis Dominik; Knecht Oliver; Krismer Florian; Neumayr Dominik
Original assignee: ETH Zürich
Priority date: 2015-09-24
Filing date: 2015-09-24
Publication date: 2017-03-31
Also published as: CH711566B1

Abstract

An inverter according to the invention is used for exchanging electrical energy between a DC system and an AC system, the inverter having a plurality of bridge branches, each bridge branch having a center point (I, II) (L_1, L_2) of an output filter (L_1, C_1, L_2, C_2) which is assigned to the bridge branch, and an output terminal (1, 2), which is assigned to the bridge branch, is connected to the AC system by means of a bridge branch current (i_1, i_2) An output filter capacitance (C_1, C_2) is connected to the output terminal (1, 2) for smoothing a corresponding output partial voltage (u_1, u_2). The inverter has a control for the control of the switches of the bridge branch,

Description

[0001] The invention relates to the field of power electronic converter or converter.

[0002] Single-phase DC / AC converters (hereinafter brief inverter circuits or inverters) are typically implemented in full-bridge structure, with a first bridge branch and a second bridge branch being arranged between the positive and negative input DC voltage rail. A DC source, for example a battery store with a DC voltage or input voltage or battery voltage U_DC is provided for feeding the system, the positive pole of which is connected to the positive DC voltage bus and the negative pole of which is connected to the negative DC voltage rail. Each bridge branch is formed by a series connection of transistors with antiparallel freewheeling diodes. Both bridge branches are operated pulse width modulated, This operation for each bridge branch corresponding to that of a change-over switch between the positive and negative DC voltage rail. A pulse-width-modulated voltage is then tapped from respective circuit points I and II between the transistors of the respective first and second bridge divisions, and are each connected via a respective filter inductor L_1 or L_2 to a respective output filter capacitance C_0. Since the inductances and the output filter capacitance form a low-pass filter, a smooth voltage u_0 occurs at terminals 1 and 2 of the output filter capacitance C_0, which in the simplest case, ie without further filtering, forms the output alternating voltage (hereinafter brief output voltage) This voltage also have the frequency zero, ie To a DC voltage); The two ends 1 and 2 of the output filter capacitance thus simultaneously constitute the output terminals.

Due to the low-pass filter described above, only the voltage difference of the switching points I and II, ie, the differential-mode component, short DM component, of the bridge divider output voltages is filtered. In addition to this DM component, however, the bridge-branch output voltages also have a common-mode component or common-mode component, in short CM component. If all voltages and also the bridge excitation voltages ul and ull (at the switching points I and II) are related to the negative voltage rail, this voltage is to be obtained as the average value of ul and ull, ie 1/2 (uj + ull). If the CM component is also to be filtered low-pass, In accordance with the prior art, a first CM filter capacitor C_1 is arranged branching off from the output terminals 1, and a second CM filter capacitor C_2 has to be connected to the negative direct voltage rail in a branching manner from the output terminal 2; Capacitors C_1 and C_2 then have output voltage voltages u_1 and u_2, also called buffer capacitor voltages. Alternatively, C_1 and C_2 can also be switched against the positive voltage rail, or CM filter capacitors can be arranged both against the positive and negative direct voltage rail. If C_1 and C_2 are provided, the output filter capacity can also be omitted,

If a sinusoidal alternating voltage is generated between the output terminals 1 and 2 by the inverter circuit and, for example, an ohmic load is fed, the time profile of the output power has the fluctuation, which is characteristic for single-phase systems, with a dif- ferent mains frequency by a mean value designated as active power. Due to the fact that the filter inductances and the filter capacitances are only designed for switching-frequency processes, ie have no significant energy storage capability, this power fluctuation occurs essentially at the DC voltage input side of the full bridge Negative d.c. voltage buffer in combination with an inductance in the supply lines to the battery store, So that the current from the DC source resp. Only a small fluctuation, ie, covers only the equal proportion of the instantaneous power of the load or the real power. A clear disadvantage of this solution is the high construction volume of the buffer capacitor and a fluctuation of the current taken from the battery store with a difler network frequency due to the finite buffer capacitor capacity.

Alternatively, instead of the buffer capacitor, an active power electronic unit with internal energy storage can also be used, ie, it can be switched between the positive and negative DC voltage rail, which ideally suppresses a fluctuation of the battery storage current entirely by means of the appropriate regulation and pilot control by means of the alternating portion of the load-related power , Such a solution is described together with the corresponding control method, for example, in the patent application CH 0151/15 with application date 4.2.2015. Disadvantages of this solution are the relatively high implementation complexity and the relatively high complexity. In addition to the full bridge generating the actual output voltage, a further active unit is to be arranged and regulated according to the load conditions.

[0006] It should be noted that the above description for power flow on the load, ie the change chip nungs- (AC) applies side to the DC side of the full bridge, so for rectifier operation. Here, a Einphasenwechselspannungsnetz takes the place of the load is thus connected to the terminals of the output filter capacitance in the simplest case; DC voltage side current respectively to the DC source. powered battery memory, so the battery is charged. Such systems are referred to as A-phase PFC rectifier due to the typical sinusoidal guiding the drawn from the mains current and for example, as on-board charger for electric vehicles use.

It should also be noted that, in principle, a photovoltaic module (in the following PV module) can basically also be used for inverter operation, ie for DC / AC conversion, instead of the battery store, whereupon the grid is again switched on when the photovoltaic power is applied The output terminals 1 and 2 are placed. In order to keep the PV module in the operating point of maximum power output (maximum powerpoint), a constant DC voltage is to be applied again, ie a fluctuation of the power output from the PV module should be avoided as far as possible.

[0008] As mentioned above, however, the technical solutions hitherto known for this purpose are, however, space-intensive, or complex and cost-intensive.

SUMMARY OF THE INVENTION The object of the invention is therefore to provide an inverter and a corresponding control which permit buffering of the power variation and which can be implemented with less power components and / or with a lower construction volume than conventional solutions.

DISCLOSURE OF THE INVENTION [0010] This object is achieved by an inverter according to the patent claims, as well as by a regulation for the inverter and a control method performed by the control.

The inverter is for exchanging electrical energy between a DC system and an AC system, the inverter having a plurality of bridge branches, each bridge branch having a center point (I, II) which is connected via an upper switch to a positive DC voltage rail (p (I_1, i_2) through a filter inductor (L_1, L_2) which is assigned to the bridge branch, is connected to a negative dc rail (n) via a lower switch, Wherein an output filter capacitance (C_1, C_2) is provided at the output terminal (1, 2) for smoothing a corresponding output part voltage (L_1, C_1, L_2, C_2) and over the bridge branch, u_1,U_2) is connected.

[0012] Here, the inverter a control or a regulator to control the switches of the bridge branches on, respectively, resulting a corresponding control procedure. The control respectively, the control method is adapted to the bridge branches for generating voltages at their midpoints (I, II) corresponding to the respectively associated reference values of the bridge branch output voltages (U_L * U_LL *) to control, and these setpoints of bridge branch output voltages (uj * ujl *) to determine such a way that a low-frequency alternating component of a replaced with the AC system power is absorbed by the output filter capacitors (C_1, C_2) respectively issued.

[0013] Here, "low frequency" is to be understood as "switching frequency" and corresponds to a fundamental frequency of the AC system. The low-frequency alternating component oscillates, for example, at twice the frequency of a fundamental frequency of the AC system, especially when an ohmic load is present at the AC system.

Thus, in contrast to the prior art, a buffer capacitor is not arranged between the positive and negative DC voltage rail on the DC side, but two output filter capacitances are arranged on the AC side from the output terminals, for example, against the negative DC voltage rail, and the full- That the total power flux taken from the two output filter capacitances covers the low-frequency alternating portion of the load-related power, so that only a constant instantaneous power flux occurs at the DC side of the full-bridge except switching frequency fluctuations.

[0015] There are thus provided with other words, the CM filter capacitors or output filter capacitors with particularly high capacity, so as buffer capacitors advantageous same capacitance value executed and the time course of the CM component of the output voltage u_CM = 1/2 (u_1 + u_2) is so set that a total output flow from the two output filter capacitors occurs so that on the one hand the low-frequency alternating component of the related by the load and on the other hand, according to the AC output voltage u_0, that is, the DM-component u_DM = (u1-u2) covered = u_0 occurring reactive power of the output filter capacitors is so that only a constant instantaneous power flow occurs on the DC side of the full bridge except schaltfrequenter fluctuations.

The capacitance of the output filter capacitances is, for example, 10 times higher than the usual capacitance values of output filter capacitors for an inverter with otherwise identical parameters with respect to voltages and power.

Thus, it is possible to restrict the power electronic components to the DC / AC converter base structure, ie the full bridge and the AC-side low-pass filter, and to prevent the occurrence of a low-frequency instantaneous oscillation oscillation on the DC side by appropriate regulation of this system.

[0018] In principle, various control methods are conceivable which reach the defined target. Aspects of a possible rule structure are described below.

[0019] In one embodiment, the control to be adapted to a temporal average value (u_CMquer) of a common-mode component (u_CM) of the output partial voltages (U_1, U_2) (transverse u_CM *) to regulate to a predetermined desired value, and in particular one over the time constant value.

[0020] In one embodiment, the control to be adapted to a differential-mode portion (u_DM) of the output partial voltages (U_1, U_2) to regulate to a predetermined output voltage set value (u_0 *), and in particular an over time sinusoidally varying value ,

[0021] In one embodiment, the inverter in no buffer capacitor, or an active power electronic unit between the positive and negative DC voltage rail (p, n) to compensate for load fluctuations.

[0022] In one embodiment, the output filter capacitors (C_1, C_2) are all connected between the respective output terminal (1, 2) and the positive DC voltage rail (p) or all between the respective output terminal (1, 2) and the negative DC voltage rail (s) ,

[0023] In one embodiment, each of the output terminals (1,2) each have an upper output filter capacitance element to the positive DC voltage rail (p) and a lower output filter capacitance element to the negative DC voltage rail (s) is connected.

This results in a balancing of the circuit function with respect to energy storage as a function of the CM voltage, since, as the CM voltage increases, half of the battery voltage U_DC results in the same energy change as at the lowering of the CM voltage from half the battery voltage U_DC.

In one embodiment, at least one of the output terminals (1,2) is connected via a first output filter capacity to the positive DC voltage rail (p) and at least one other of the output terminals (1,2) via a further output filter capacity to the negative DC voltage rail (n) ,

[0026] Thus balancing of the circuit function with respect to energy storage is achieved with minimal effort.

[0027] In one embodiment, the filter inductances (L_1, L_2) of the output filters are magnetically coupled to one another.

[0028] This reduces the overall size and increases the effective switching frequency to be filtered. For example, the bridge bridges of the full bridge are clocked phase-shifted by a half clock period.

[0029] In one embodiment, the control to be established, a storage of energy in the output filter capacitors (C_1, C_2) • by defining a common-mode component (i_CM *) of the bridge branch streams (i_1, i_2) to settle so that an alternating component of the exchanged with the AC power system, which may comprise an active and a reactive power is compensated for and is thus exchanged with the DC system has a substantially constant instantaneous power; and • by specifying a differential mode component (i_DM *) flowing the bridge branch streams (i_1, i_2) to settle so that on the one hand, an AC-side load current (i_0) is covered and on the other hand, a charge-reversal current for the output filter capacitors (C_1, C_2) which is a difference of the output partial voltages (U_1, U_2) adjusts to the output filter capacitors (C_1, C_2) to a predetermined output voltage set value (u_0 *).

It is to be understood that the "substantially constant" instantaneous power exchanged with the DC system with respect to a frequency of the low-frequency AC system can be regarded as constant. It can still exhibit high-frequency or switching-frequency fluctuations. The output filter capacitances typically have the same capacitance value. The output filter capacitances, viewed from the output terminals, act as a series circuit of two capacitances.

[0031] Here, the target value u_CM can be * set transversely of the temporal mean value of the common-mode component of the output voltages, for example by a superimposed control loop so that the maximum value of the output partial voltages (both have output partial voltages stationary same maximum value) u_1 and u_2 the value the voltage U_DC of the DC system, respectively, the battery storage same distance as the minimum value of the output partial voltages u_1 and u_2 (both voltages have stationary same minimum value) from the value zero has, the time course of u_1 and u_2 so in the middle of, or by the battery voltage U_DC . input voltage of the full bridge and the value is zero voltage band defined. Alternatively, the setpoint can u_CM * cross also equal to the energy center of the voltage range be selected, with the energy of all capacitors branching off from the output terminals and connected to the negative or positive DC voltage rail is considered here. Another option is a default in such a way that the maximum value of the output partial voltages u_1 and u_2 a defined distance from the battery voltage U_DC, or the minimum value of u_1 u_2 and maintains a defined distance from zero.

In one embodiment, a multi-phase, in particular three-phase AC system is provided, and the control is configured to determine CM components and DM components from phase magnitudes of currents and / or voltage.

For example, in the case of a three-phase system, the common-mode component i_CM can be formed as i_CM = 1/3 (i_1 + i_2 + 1-3) by bridge branch currents i_l, i_2, i_3. Furthermore, the formation of DM components can take place in a manner known per se, for example, the DM components are Lalpha, i_beta, and are determined as Lalpha = i_1-i_CM and i_beta = l / sqrt (3) · (i_2-i_3 ) In the application, the DC side is designated as the input side and the AC side is the output side. This is merely for simplicity of explanation. The invention can be implemented for an inverter operation, with a power flow from the DC side to the AC side, as well as for a rectifier operation, with a power flow from the AC to the DC side.

[0035] In the following, the subject invention will be described with reference to preferred exemplary embodiments which are illustrated in the accompanying drawings. There are shown schematically:

1 shows an inverter circuit with a control.

Figure 2 shows a formation of a pilot control value for a common-mode component of output currents.

Fig. 3 shows a time course of characteristic values of the circuit.

[0036] The physical possibility of compensation of power fluctuations can clearly based on a decomposition of the currents i_1 and i_2 in the filter inductors L_1 and L_2 (both in direction of the associated output terminal counted positively 1 or 2) in a DM-component i_DM = 1 / 2 (i_1-i_2) and a common mode component i_CM = 1/2 (i_1 + i_2) and the cutting mentioned above, the output partial voltages u_1 and u_2 with u_CM = 1/2 (u_1 + u_2) and u_DM = (u1 u2) = u_0 be understood. here is important to note that the currents i_ 1 and i_ 2 are preassigned independently, so do not i_ 1 = -i_2 must apply; in other words, that is, the DM and CM-component of flows and i_1 i_2 is independently specifiable as on the negative voltage rail there is a possibility of backflow of the sum current. Furthermore, it should be noted that the output partial voltages, because u_DM must be made equal to the required output voltage u_0 only regarding the difference, that is, the DM-share u_DM defined u_1 and u_2. The voltage u_DM generated by i_DM, which current one hand, the load current i_0 over the lying between the terminals 1 and 2 Lastwidertand and about C_1 and back over C_2 flowing from output terminal 1 power to the memory of a DM-voltage component or difference of u_1 must cover and u_2 equal to the required output voltage u_0 * (output voltage setpoint). A result that is, as the sizes and u_CM i_CM remain as not directly to the formation of the output voltage setpoint u_0 * (the index "*" means each reference value or setpoint) bound.

[0037] By i_CM be both capacitors are charged identically C_1 and C_2 and formed a CM voltage u_CM. i_CM and u_CM are so coupled, that represent de facto only one degree of freedom. This degree of freedom can now be used for effecting a power flow u_CM.i_CM from the buffer capacitors such that without the buffer mechanism occurring on the DC side of the full bridge dual power frequency power fluctuation by the power flow from the buffer device, ie from the buffer capacitors C_1 and C_2 is exactly compensated. For this purpose, the power flow from the buffer capacitors is adjusted such that the twice line-frequency AC component of the purchased by the load and for setting the difference of the output division voltage or buffer capacitor voltage u_1 and u_2 equal to the output voltage command value, u_0 * = u_1-u_2 required reactive power exactly is covered.

[0038] The required course of i_CM can be adjusted in a real system by the apparatus shown in Fig. 1 regulating device.

[0039] The invention is explained below with reference to Fig. 1 and Fig.2.

[0040] Fig. 1 shows the performance of part of an inverter circuit with a single-phase output is realized by a full bridge circuit with AC-sided low-pass filter formed by the root points I and II of the first and second bridge branch branching filter inductances L1, L2 and one as a CM filter capacitors or output filter capacitors C_1 and C_2 executed output filter capacitance. Preferably C_1 and C_2 are designed as buffer capacitors with high capacity. The control shown provides a DM content and CM-portion of the output partial voltages u_1 u_2 and so ensure that a low-frequency fluctuation of, the DC system resp. Battery storage to the DC side of the full bridge prevented extracted power except schaltfrequenter fluctuations, that is, the DC-side power flow is held stationary constant, ie not low, and in particular no double ausgangsfrequente power fluctuation occurs.

[0041] For this purpose, the output partial voltages measured u_1 and u_2 and by addition and weighting of the CM-portion, u_CM = 1/2 (u_1 + u_2), and by subtracting u_1 and u_2 the DM content, u_DM = (u1-u2 ), certainly. u_DM must now be guided by a voltage regulation so that the course follows the output voltage setpoint u_0 *. For this, the control difference u_0 * -u_DM is formed and fed to a DM-voltage regulator. 5 The controller output is advantageously pre-controlled by the measured load current i_0 so is to form part of the controller only required for the charge reversal of the series circuit of C_1 and C_2 current iC_DM respectively its setpoint iC_DM *. Overall, the setpoint i_DM result * of DM component of M and i_ 2.

It is to be noted that optionally iCJDM can also be pre-controlled, since the curve of the voltage to be formed over the series circuit of C_1 and C_2 is known with the output voltage set point value u_0 * yes. If the buffer capacitors each have a capacitance C, then, in addition to the load current pre-control by i_0,

Claims

Pilot component C / 2du_07dt the regulator output of the DM-voltage regulator 5 are added, whereby the controller only needs to compensate for a measurement error of more i_0 or by non-idealities of the components deviations caused stationary. [0043] The target value of the CM component i_CM * AC currents i_ 1 and i_ 2 is determined directly by, for compensation of twice ausgangsfrequenten fluctuation of related by the load and the time required for recharging of the series connection of C_1 and C_2 reactive power. The corresponding circuit is shown in Fig. 2 and described below. [0044] In addition, to ensure, through a system that maintains an average value u_CM such that a symmetrical dynamic range of u_1 u_2 and for forming the difference voltage u_1-u_2 = u_0 * is given. This can be done by low pass filtering of 3 u_CM such that sufficient averaging over the fluctuations occurring during operation with double output frequency is given. It follows as a result of low-pass filtering of the actual value u_CMquer 3, which is cross-compared with a set value u_CM *. The difference between the two quantities is supplied to a CM-chip voltage regulator 4, which forms a complementary i_CM * AC current component i_CM * DC. The addition of both current components will ultimately lead to the total nominal value i_CM * = i_CM * AC + DC * iCM. * The setpoints i_ 1 * and * i_ 2 can be the currents i_ 1 and i_ 2 formed by the filter inductors from the current nominal values i_DM * and i_CM now by addition and subtraction; So i_ 1 * = * + i_CM i_DM *, i_ 2 * = * i_CM -i_DM *. [0045] These target values are subordinated current control loop is supplied which detect the actual values i_1 and i_2, and form the via the filter inductances L_1 and L_2 for impressing i_1 * and i_2 * voltages to be applied by means of regulators 6, 7, wherein the controller outputs advantageously by the measured values be pre-controlled by the output partial voltages u_1 and u_2, whereby the set values to be issued by the bridge branches of the full bridge branch of the bridge output voltages ul * and Uli * results, which are set by means of pulse width modulator stages in consideration of the current value of the DC voltage or the voltage of the battery storage. Alternatively, other power control methods can be used, and / or the full bridge with a triangular, the zero line slightly unterschreitendem output current, ie operating mode in Triangular Current and so soft switching of the bridge branches are ensured, in which case the triangle streams are set so that a clock period, the required local averages in the amount of setpoints i_ 1 * and * i_2 occur. [0046] Said controller 4, 5, 6, 7 can be realized for example by P, PI, PID or other controller. [0047] Figure 2 shows a block diagram of the generation of the pilot control value i_CM * AC of the CM component of flows i_1 and i_2 such that the two-fold ausgangsfrequente alternating component of the related by the load (formed by high-pass filtering 8 of the related from the load instantaneous power u_0 i_0) and the u_1-u_2 for the formation of the voltage difference = u_0 * across the series circuit of C_1 and C_2 required reactive power (formed by differentiation 9 of the output voltage setpoint u_0 * and subsequent multiplication by C / 2 u_0 * where C / 2 as a capacitance the series circuit of C_1 and C_2 follows if C_1 and C_2 same capacitance C have) by a corresponding power flow from the buffer capacitors C_1 and C_2 are covered and also a ev. due to remaining of non-idealities of the feedforward control low-frequency alternating component of the DC-side input of the full bridge ( formed by high-pass filtering 10 of the DC-side Leistungsa Recording is regulated to the full bridge) to zero. [0048] Figure 3 shows when using the described control for typical load cases resulting time curves of the two output partial voltages u_1 and u_2 and the timing of the information contained in these voltages CM-component u_CM and DM-component u_DM, which according to the predetermined output voltage commanding value u_0 * a purely having sinusoidal course. Furthermore, the timings of the currents i_1, i_2, and the DM and CM-component as well as the input current ij of the full bridge are indicated (isolate switching changes are filtered out) indicated; the current ij has an over the period of the output voltage constant value, the DC system or storage battery is so - as aimed by the control - a time-constant instantaneous power extracted. The load cases are, at otherwise constant parameters: • Fig. 3a: feeding the load with a wattage of 2000 W • Fig. 3b: feeding the load with a power factor of 2,000 kVA at cos (phi) = 0.7 • Figure 3c. Powering the load with an active power of 100 W claims

comprising 1. inverter for exchanging electric power between a DC system and an AC-system, wherein the inverter comprises a plurality of bridge branches and each branch of the bridge has a center (I, II), which via an upper switch connected to a positive DC voltage rail (p) and a lower switch connected to a negative DC voltage rail (s) can be connected, and in each case during operation of the inverter from the center (I, II) of a bridge arm, a bridge branch current (i_1, i_2) through an allocated to the bridge branch filter inductance (L_1, L_2) (an output filter L_1, C_1, L_2, C_2) and associated with the bridge branch output terminal (1, 2) to the AC system flows, to the output terminal (1, 2) an output filter capacitance (C_1, C_2) for smoothing a corresponding output part voltage (U_1, U_2 ) is connected, characterized in that the inverter has a control for actuating the switches of the bridge arms, which is teaching to t is, the bridge branches for generating voltages at their midpoints (I, II) corresponding to the respectively associated reference values of the bridge branch output voltages (U_L * U_LL *) to control, and these setpoints of bridge branch output voltages (uj * ujl *) to determine in such a manner that a low-frequency alternating component of a replaced with the AC system power is absorbed by the output filter capacitors (C_1, C_2) respectively issued.
2. The inverter as claimed in claim 1, wherein the control is adapted to regulate a temporal average value (u_CMquer) of a common-mode component (u_CM) of the output partial voltages (u_1, u_2) to a predetermined setpoint value (u_CM * transversely) Over the time constant value.
3. The inverter according to claim 1, wherein the control is adapted to regulate a differential mode component (u_DM) of the output partial voltages (u_1, u_2) to a predetermined output voltage setpoint value (u_0 *), in particular to a sinusoidal phase over time Changing value.
4. The inverter according to claim 1, wherein the inverter does not have a buffer capacitor or an active power-electronic unit between the positive and negative DC voltage rail (p, n) for compensating load fluctuations.
5. The inverter as claimed in claim 1, wherein the output filter capacitances (C_1, C_2) are all connected between the respective output terminal (1, 2) and the positive DC voltage rail (p) or all between the respective output terminal (1, 2) and the negative output terminal Dc rail (s).
6. The inverter as claimed in claim 1, wherein each of the output terminals is connected to the positive DC voltage rail via an upper output filter partial capacitance and to the negative DC voltage rail via a lower output filter partial capacitance.
7. The inverter as claimed in claim 1, wherein at least one of the output terminals is connected to the positive DC voltage rail via at least one first output filter capacitance and at least one other of the output terminals via a further output filter capacitance to the negative output filter capacitance DC voltage rail (s) is connected.
8. The inverter according to claim 1, wherein the filter inductances (L_1, L_2) of the output filters are magnetically coupled to one another.

to regulate
9. Inverter according to one of the preceding claims, wherein the control is adapted to a storage of energy in the output filter capacitors (C_1, C_2) • by defining a common-mode component (i_CM *) of the bridge branch streams (i_1, i_2) so that an alternating component of the information exchanged with the AC power system, which may comprise an active and a reactive power is compensated for and is thus exchanged with the DC system has a substantially constant instantaneous power; and • by specifying a differential mode component (i_DM *) flowing the bridge branch streams (i_1, i_2) to settle so that on the one hand, an AC-side load current (i_0) is covered and on the other hand, a charge-reversal current for the output filter capacitors (C_1, C_2) which is a difference of the output partial voltages (U_1, U_2) adjusts to the output filter capacitors (C_1, C_2) to a predetermined output voltage set value (u_0 *).
10. Inverter according to claim 9, wherein a multiphase, particularly three phase AC system is present, and the control is adapted to CM-components and to determine DM-phase components from magnitudes of currents and / or voltage.