CH589299A5 - - Google Patents

Info

Publication number
CH589299A5
CH589299A5 CH1645474A CH1645474A CH589299A5 CH 589299 A5 CH589299 A5 CH 589299A5 CH 1645474 A CH1645474 A CH 1645474A CH 1645474 A CH1645474 A CH 1645474A CH 589299 A5 CH589299 A5 CH 589299A5
Authority
CH
Switzerland
Application number
CH1645474A
Original Assignee
Itt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732361739 external-priority patent/DE2361739C2/de
Application filed by Itt filed Critical Itt
Publication of CH589299A5 publication Critical patent/CH589299A5/xx

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16504Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed
    • G01R19/16519Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed using FET's
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Measurement Of Current Or Voltage (AREA)
CH1645474A 1973-12-12 1974-12-11 CH589299A5 (xx)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732361739 DE2361739C2 (de) 1973-12-12 Integrierbare Schaltung zur Überwachung einer Betriebsspannung

Publications (1)

Publication Number Publication Date
CH589299A5 true CH589299A5 (xx) 1977-06-30

Family

ID=5900518

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1645474A CH589299A5 (xx) 1973-12-12 1974-12-11

Country Status (4)

Country Link
CH (1) CH589299A5 (xx)
FR (1) FR2254792B1 (xx)
GB (1) GB1474930A (xx)
IT (1) IT1026895B (xx)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4142118A (en) * 1977-08-18 1979-02-27 Mostek Corporation Integrated circuit with power supply voltage level detection
US4224539A (en) * 1978-09-05 1980-09-23 Motorola, Inc. FET Voltage level detecting circuit
US4300061A (en) * 1979-03-15 1981-11-10 National Semiconductor Corporation CMOS Voltage regulator circuit
GB2155715B (en) * 1984-03-14 1987-07-08 Motorola Inc Cmos power-on detection circuit
FR2613491B1 (fr) * 1987-04-03 1989-07-21 Thomson Csf Dispositif de detection du niveau haut d'une tension en technologie mos
FR2618579B1 (fr) * 1987-07-21 1989-11-10 Thomson Semiconducteurs Circuit integre a memoire comportant un dispositif anti-fraude
FR2690796B1 (fr) * 1992-04-30 1994-06-17 Sgs Thomson Microelectronics Circuit de detection de seuils de tension.

Also Published As

Publication number Publication date
FR2254792A1 (xx) 1975-07-11
DE2361739A1 (xx) 1975-06-12
GB1474930A (en) 1977-05-25
DE2361739B1 (de) 1975-06-12
IT1026895B (it) 1978-10-20
FR2254792B1 (xx) 1981-08-07

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Legal Events

Date Code Title Description
PL Patent ceased