CH560947A5 - - Google Patents
Info
- Publication number
- CH560947A5 CH560947A5 CH1111872A CH1111872A CH560947A5 CH 560947 A5 CH560947 A5 CH 560947A5 CH 1111872 A CH1111872 A CH 1111872A CH 1111872 A CH1111872 A CH 1111872A CH 560947 A5 CH560947 A5 CH 560947A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/08—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register
- G06F5/085—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register in which the data is recirculated
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
- G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
- G06F3/0232—Manual direct entries, e.g. key to main memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Shift Register Type Memory (AREA)
- Controls And Circuits For Display Device (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5526471A JPS5139502B1 (pt) | 1971-07-26 | 1971-07-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH560947A5 true CH560947A5 (pt) | 1975-04-15 |
Family
ID=12993726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH1111872A CH560947A5 (pt) | 1971-07-26 | 1972-07-26 |
Country Status (5)
Country | Link |
---|---|
US (1) | US3827028A (pt) |
JP (1) | JPS5139502B1 (pt) |
CH (1) | CH560947A5 (pt) |
FR (1) | FR2147059B1 (pt) |
GB (1) | GB1378199A (pt) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3919694A (en) * | 1974-05-10 | 1975-11-11 | Hewlett Packard Co | Circulating shift register memory having editing and subroutining capability |
US4176400A (en) * | 1977-08-10 | 1979-11-27 | Teletype Corporation | Buffer storage and control |
EP0012497B1 (en) * | 1978-09-29 | 1984-11-28 | The Marconi Company Limited | Apparatus and method using a memory for processing television picture signals and other information |
JPS61289448A (ja) * | 1985-06-18 | 1986-12-19 | Mitsubishi Electric Corp | バツフア記憶装置 |
US6115036A (en) * | 1994-10-31 | 2000-09-05 | Nintendo Co., Ltd. | Video game/videographics program editing apparatus with program halt and data transfer features |
US5592609A (en) * | 1994-10-31 | 1997-01-07 | Nintendo Co., Ltd. | Video game/videographics program fabricating system and method with unit based program processing |
US5680533A (en) * | 1994-10-31 | 1997-10-21 | Nintendo Co., Ltd. | Videographics program/video game fabricating system and method |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2978680A (en) * | 1957-12-06 | 1961-04-04 | Bell Telephone Labor Inc | Precession storage delay circuit |
US3539997A (en) * | 1962-12-05 | 1970-11-10 | Bell Telephone Labor Inc | Synchronizing circuit |
US3351917A (en) * | 1965-02-05 | 1967-11-07 | Burroughs Corp | Information storage and retrieval system having a dynamic memory device |
US3575554A (en) * | 1968-04-16 | 1971-04-20 | Communications Satellite Corp | Frame synchronizer for a biorthogonal decoder |
US3737577A (en) * | 1971-10-22 | 1973-06-05 | British Railways Board | Communication systems for receiving and checking repeatedly transmitted multi-digital telegrams |
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1971
- 1971-07-26 JP JP5526471A patent/JPS5139502B1/ja active Pending
-
1972
- 1972-06-01 US US00258762A patent/US3827028A/en not_active Expired - Lifetime
- 1972-06-21 GB GB2907872A patent/GB1378199A/en not_active Expired
- 1972-07-18 FR FR7225874A patent/FR2147059B1/fr not_active Expired
- 1972-07-26 CH CH1111872A patent/CH560947A5/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB1378199A (en) | 1974-12-27 |
DE2236236A1 (de) | 1973-02-08 |
JPS5139502B1 (pt) | 1976-10-28 |
US3827028A (en) | 1974-07-30 |
FR2147059A1 (pt) | 1973-03-09 |
DE2236236B2 (de) | 1977-05-18 |
FR2147059B1 (pt) | 1977-08-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |