CH539988A - Circuit arrangement for establishing the synchronization of transmitting and receiving devices when transmitting data blocks - Google Patents

Circuit arrangement for establishing the synchronization of transmitting and receiving devices when transmitting data blocks

Info

Publication number
CH539988A
CH539988A CH282872A CH282872A CH539988A CH 539988 A CH539988 A CH 539988A CH 282872 A CH282872 A CH 282872A CH 282872 A CH282872 A CH 282872A CH 539988 A CH539988 A CH 539988A
Authority
CH
Switzerland
Prior art keywords
transmitting
synchronization
establishing
data blocks
circuit arrangement
Prior art date
Application number
CH282872A
Other languages
German (de)
Inventor
Markwitz Wernhard
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19712113018 external-priority patent/DE2113018C/en
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH539988A publication Critical patent/CH539988A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
CH282872A 1971-03-18 1972-02-29 Circuit arrangement for establishing the synchronization of transmitting and receiving devices when transmitting data blocks CH539988A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19712113018 DE2113018C (en) 1971-03-18 Circuit arrangement for establishing the synchronization of transmitting and receiving devices when transmitting binary data blocks
DE19722203414 DE2203414C3 (en) 1971-03-18 1972-01-25 Method and circuit arrangement for establishing synchronization of transmitting and receiving devices during the transmission of data blocks

Publications (1)

Publication Number Publication Date
CH539988A true CH539988A (en) 1973-07-31

Family

ID=25760817

Family Applications (1)

Application Number Title Priority Date Filing Date
CH282872A CH539988A (en) 1971-03-18 1972-02-29 Circuit arrangement for establishing the synchronization of transmitting and receiving devices when transmitting data blocks

Country Status (10)

Country Link
JP (1) JPS5250482B1 (en)
BE (1) BE780886A (en)
CH (1) CH539988A (en)
DE (1) DE2203414C3 (en)
FR (1) FR2130479B1 (en)
GB (1) GB1374357A (en)
IT (1) IT950193B (en)
LU (1) LU64976A1 (en)
NL (1) NL170794C (en)
SE (1) SE362719B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3950616A (en) * 1975-04-08 1976-04-13 Bell Telephone Laboratories, Incorporated Alignment of bytes in a digital data bit stream
US4425645A (en) 1981-10-15 1984-01-10 Sri International Digital data transmission with parity bit word lock-on
JPS5864844A (en) * 1981-10-15 1983-04-18 Victor Co Of Japan Ltd Synchronism detecting system

Also Published As

Publication number Publication date
BE780886A (en) 1972-09-18
NL170794B (en) 1982-07-16
JPS5250482B1 (en) 1977-12-24
GB1374357A (en) 1974-11-20
FR2130479B1 (en) 1977-09-02
DE2203414B2 (en) 1978-10-12
LU64976A1 (en) 1972-12-07
IT950193B (en) 1973-06-20
NL7203515A (en) 1972-09-20
FR2130479A1 (en) 1972-11-03
DE2203414C3 (en) 1979-06-07
NL170794C (en) 1982-12-16
DE2203414A1 (en) 1973-08-02
SE362719B (en) 1973-12-17

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Legal Events

Date Code Title Description
PL Patent ceased