CH503432A - Circuit arrangement for decoding - Google Patents
Circuit arrangement for decodingInfo
- Publication number
- CH503432A CH503432A CH141270A CH141270A CH503432A CH 503432 A CH503432 A CH 503432A CH 141270 A CH141270 A CH 141270A CH 141270 A CH141270 A CH 141270A CH 503432 A CH503432 A CH 503432A
- Authority
- CH
- Switzerland
- Prior art keywords
- decoding
- circuit arrangement
- arrangement
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
- H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
- H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH141270A CH503432A (en) | 1970-02-02 | 1970-02-02 | Circuit arrangement for decoding |
DE19702036680 DE2036680B2 (en) | 1970-02-02 | 1970-07-23 | CIRCUIT ARRANGEMENT FOR DECODING A CODE FORMED FROM BIPOLAR CHARACTERS |
IL35273A IL35273A (en) | 1970-02-02 | 1970-09-10 | Decoding circuit |
NL7101146A NL7101146A (en) | 1970-02-02 | 1971-01-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH141270A CH503432A (en) | 1970-02-02 | 1970-02-02 | Circuit arrangement for decoding |
Publications (1)
Publication Number | Publication Date |
---|---|
CH503432A true CH503432A (en) | 1971-02-15 |
Family
ID=4209838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH141270A CH503432A (en) | 1970-02-02 | 1970-02-02 | Circuit arrangement for decoding |
Country Status (4)
Country | Link |
---|---|
CH (1) | CH503432A (en) |
DE (1) | DE2036680B2 (en) |
IL (1) | IL35273A (en) |
NL (1) | NL7101146A (en) |
-
1970
- 1970-02-02 CH CH141270A patent/CH503432A/en not_active IP Right Cessation
- 1970-07-23 DE DE19702036680 patent/DE2036680B2/en active Pending
- 1970-09-10 IL IL35273A patent/IL35273A/en unknown
-
1971
- 1971-01-28 NL NL7101146A patent/NL7101146A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
DE2036680B2 (en) | 1971-11-25 |
IL35273A0 (en) | 1970-11-30 |
DE2036680A1 (en) | 1971-08-19 |
NL7101146A (en) | 1971-08-04 |
IL35273A (en) | 1973-07-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |