CH489848A - Einrichtung zur zeitverzahnten Datenverarbeitung - Google Patents

Einrichtung zur zeitverzahnten Datenverarbeitung

Info

Publication number
CH489848A
CH489848A CH1858868A CH1858868A CH489848A CH 489848 A CH489848 A CH 489848A CH 1858868 A CH1858868 A CH 1858868A CH 1858868 A CH1858868 A CH 1858868A CH 489848 A CH489848 A CH 489848A
Authority
CH
Switzerland
Prior art keywords
time
data processing
synchronized data
synchronized
processing
Prior art date
Application number
CH1858868A
Other languages
English (en)
Inventor
Paul Mullery Alvin
Cameron Jr Driscoll Graham
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH489848A publication Critical patent/CH489848A/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
CH1858868A 1967-12-18 1968-12-13 Einrichtung zur zeitverzahnten Datenverarbeitung CH489848A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69153467A 1967-12-18 1967-12-18

Publications (1)

Publication Number Publication Date
CH489848A true CH489848A (de) 1970-04-30

Family

ID=24776919

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1858868A CH489848A (de) 1967-12-18 1968-12-13 Einrichtung zur zeitverzahnten Datenverarbeitung

Country Status (7)

Country Link
US (1) US3541520A (de)
BE (1) BE723218A (de)
CH (1) CH489848A (de)
FR (1) FR1594825A (de)
GB (1) GB1180373A (de)
NL (1) NL156838B (de)
SE (1) SE337305B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678463A (en) * 1970-04-27 1972-07-18 Bell Telephone Labor Inc Controlled pause in data processing appartus
US3678464A (en) * 1970-06-29 1972-07-18 Bell Telephone Labor Inc Controlled pause and restart of magnetic disc memories and the like
US3623006A (en) * 1970-06-29 1971-11-23 Burroughs Corp Queueing device for the selection of requests for access to a storage medium
US3675214A (en) * 1970-07-17 1972-07-04 Interdata Inc Processor servicing external devices, real and simulated
US4015242A (en) * 1972-11-29 1977-03-29 Institut Francais Du Petrole, Des Carburants Et Lubrifiants Et Entreprise De Recherches Et D'activities Petrolieres Elf Device for coupling several data processing units to a single memory
US4959781A (en) * 1988-05-16 1990-09-25 Stardent Computer, Inc. System for assigning interrupts to least busy processor that already loaded same class of interrupt routines
GB2302743B (en) * 1995-06-26 2000-02-16 Sony Uk Ltd Processing apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3346851A (en) * 1964-07-08 1967-10-10 Control Data Corp Simultaneous multiprocessing computer system
US3333252A (en) * 1965-01-18 1967-07-25 Burroughs Corp Time-dependent priority system
US3421150A (en) * 1966-08-26 1969-01-07 Sperry Rand Corp Multiprocessor interrupt directory
US3461434A (en) * 1967-10-02 1969-08-12 Burroughs Corp Stack mechanism having multiple display registers

Also Published As

Publication number Publication date
BE723218A (de) 1969-04-01
NL156838B (nl) 1978-05-16
FR1594825A (de) 1970-06-08
US3541520A (en) 1970-11-17
DE1812354A1 (de) 1969-08-07
DE1812354B2 (de) 1972-07-13
SE337305B (de) 1971-08-02
NL6817891A (de) 1969-06-20
GB1180373A (en) 1970-02-04

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Legal Events

Date Code Title Description
PL Patent ceased