CH451274A - Procédé pour mettre sous boîtier un composant électronique - Google Patents

Procédé pour mettre sous boîtier un composant électronique

Info

Publication number
CH451274A
CH451274A CH1151866A CH1151866A CH451274A CH 451274 A CH451274 A CH 451274A CH 1151866 A CH1151866 A CH 1151866A CH 1151866 A CH1151866 A CH 1151866A CH 451274 A CH451274 A CH 451274A
Authority
CH
Switzerland
Prior art keywords
enclosing
electronic component
electronic
component
Prior art date
Application number
CH1151866A
Other languages
English (en)
Inventor
Walker Asher John
Willis Martin Francis
Howard Tarcza Walter
Original Assignee
Corning Glass Works
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Corning Glass Works filed Critical Corning Glass Works
Publication of CH451274A publication Critical patent/CH451274A/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00—Glass compositions
    • C03C3/04—Glass compositions containing silica
    • C03C3/062—Glass compositions containing silica with less than 40% silica by weight
    • C03C3/07—Glass compositions containing silica with less than 40% silica by weight containing lead
    • C03C3/072—Glass compositions containing silica with less than 40% silica by weight containing lead containing boron
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00—Glass compositions
    • C03C3/04—Glass compositions containing silica
    • C03C3/062—Glass compositions containing silica with less than 40% silica by weight
    • C03C3/07—Glass compositions containing silica with less than 40% silica by weight containing lead
    • C03C3/072—Glass compositions containing silica with less than 40% silica by weight containing lead containing boron
    • C03C3/074—Glass compositions containing silica with less than 40% silica by weight containing lead containing boron containing zinc
    • C03C3/0745—Glass compositions containing silica with less than 40% silica by weight containing lead containing boron containing zinc containing more than 50% lead oxide, by weight
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Joining Of Glass To Other Materials (AREA)
  • Laminated Bodies (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Glass Compositions (AREA)
CH1151866A 1965-08-10 1966-08-10 Procédé pour mettre sous boîtier un composant électronique CH451274A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US478690A US3405441A (en) 1965-08-10 1965-08-10 Method of enclosing an electrical device

Publications (1)

Publication Number Publication Date
CH451274A true CH451274A (fr) 1968-05-15

Family

ID=23900984

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1151866A CH451274A (fr) 1965-08-10 1966-08-10 Procédé pour mettre sous boîtier un composant électronique

Country Status (7)

Country Link
US (1) US3405441A (fr)
CH (1) CH451274A (fr)
DE (1) DE1590251A1 (fr)
ES (2) ES330076A1 (fr)
FR (1) FR1488922A (fr)
GB (1) GB1160732A (fr)
NL (1) NL6611257A (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3672034A (en) * 1970-01-14 1972-06-27 Bell Telephone Labor Inc Method for bonding a beam-lead device to a substrate
US4063349A (en) * 1976-12-02 1977-12-20 Honeywell Information Systems Inc. Method of protecting micropackages from their environment
US5268533A (en) * 1991-05-03 1993-12-07 Hughes Aircraft Company Pre-stressed laminated lid for electronic circuit package
US5434750A (en) * 1992-02-07 1995-07-18 Lsi Logic Corporation Partially-molded, PCB chip carrier package for certain non-square die shapes
US5262927A (en) * 1992-02-07 1993-11-16 Lsi Logic Corporation Partially-molded, PCB chip carrier package
US5438477A (en) * 1993-08-12 1995-08-01 Lsi Logic Corporation Die-attach technique for flip-chip style mounting of semiconductor dies
US5508888A (en) * 1994-05-09 1996-04-16 At&T Global Information Solutions Company Electronic component lead protector

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3105868A (en) * 1960-12-29 1963-10-01 Sylvania Electric Prod Circuit packaging module
US3187240A (en) * 1961-08-08 1965-06-01 Bell Telephone Labor Inc Semiconductor device encapsulation and method
US3171187A (en) * 1962-05-04 1965-03-02 Nippon Electric Co Method of manufacturing semiconductor devices
US3178506A (en) * 1962-08-09 1965-04-13 Westinghouse Electric Corp Sealed functional molecular electronic device

Also Published As

Publication number Publication date
GB1160732A (en) 1969-08-06
DE1590251A1 (de) 1970-05-14
FR1488922A (fr) 1967-07-13
ES123823U (es) 1967-06-16
NL6611257A (fr) 1967-02-13
US3405441A (en) 1968-10-15
ES330076A1 (es) 1967-06-01
ES123823Y (es) 1967-11-01

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