CH441445A - Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems - Google Patents

Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems

Info

Publication number
CH441445A
CH441445A CH1117365A CH1117365A CH441445A CH 441445 A CH441445 A CH 441445A CH 1117365 A CH1117365 A CH 1117365A CH 1117365 A CH1117365 A CH 1117365A CH 441445 A CH441445 A CH 441445A
Authority
CH
Switzerland
Prior art keywords
recognizing
eliminating
transmitting
time division
circuit arrangement
Prior art date
Application number
CH1117365A
Other languages
German (de)
Inventor
Tschannen Gottfried
Binder Rudolf
Original Assignee
Siemens Ag Albis
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag Albis filed Critical Siemens Ag Albis
Priority to CH1117365A priority Critical patent/CH441445A/en
Priority to DE1966A0053540 priority patent/DE1289149B/en
Priority to NL6616810A priority patent/NL6616810A/xx
Priority to GB5495766A priority patent/GB1147199A/en
Priority to FR87295A priority patent/FR1505034A/en
Priority to BE691111D priority patent/BE691111A/xx
Publication of CH441445A publication Critical patent/CH441445A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0617—Systems characterised by the synchronising information used the synchronising signal being characterised by the frequency or phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
CH1117365A 1965-08-09 1965-08-09 Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems CH441445A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CH1117365A CH441445A (en) 1965-08-09 1965-08-09 Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems
DE1966A0053540 DE1289149B (en) 1965-08-09 1966-09-20 Method and circuit arrangement for identifying and eliminating an incorrect phase position between the channel distribution circuits of the transmitting and receiving devices in time division multiplex systems
NL6616810A NL6616810A (en) 1965-08-09 1966-11-29
GB5495766A GB1147199A (en) 1965-08-09 1966-12-08 Improvements in or relating to time division multiplex communication systems
FR87295A FR1505034A (en) 1965-08-09 1966-12-13 Method and installation for locating and removing a false phase position in time multiplex installations
BE691111D BE691111A (en) 1965-08-09 1966-12-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1117365A CH441445A (en) 1965-08-09 1965-08-09 Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems

Publications (1)

Publication Number Publication Date
CH441445A true CH441445A (en) 1967-08-15

Family

ID=4370784

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1117365A CH441445A (en) 1965-08-09 1965-08-09 Method and circuit arrangement for recognizing and eliminating an incorrect phase position between the channel connections of the transmitting and receiving devices in time division multiplex systems

Country Status (4)

Country Link
BE (1) BE691111A (en)
CH (1) CH441445A (en)
GB (1) GB1147199A (en)
NL (1) NL6616810A (en)

Also Published As

Publication number Publication date
GB1147199A (en) 1969-04-02
NL6616810A (en) 1968-05-30
BE691111A (en) 1967-06-13

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