CH433825A - Binary full adder constructed from NAND stages - Google Patents
Binary full adder constructed from NAND stagesInfo
- Publication number
- CH433825A CH433825A CH117666A CH117666A CH433825A CH 433825 A CH433825 A CH 433825A CH 117666 A CH117666 A CH 117666A CH 117666 A CH117666 A CH 117666A CH 433825 A CH433825 A CH 433825A
- Authority
- CH
- Switzerland
- Prior art keywords
- full adder
- binary full
- adder constructed
- nand
- stages
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL6501243A NL6501243A (en) | 1965-01-30 | 1965-01-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH433825A true CH433825A (en) | 1967-04-15 |
Family
ID=19792238
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH117666A CH433825A (en) | 1965-01-30 | 1966-01-28 | Binary full adder constructed from NAND stages |
Country Status (4)
Country | Link |
---|---|
BE (1) | BE675761A (en) |
CH (1) | CH433825A (en) |
GB (1) | GB1078269A (en) |
NL (1) | NL6501243A (en) |
-
1965
- 1965-01-30 NL NL6501243A patent/NL6501243A/xx unknown
-
1966
- 1966-01-27 GB GB371666A patent/GB1078269A/en not_active Expired
- 1966-01-28 BE BE675761D patent/BE675761A/xx unknown
- 1966-01-28 CH CH117666A patent/CH433825A/en unknown
Also Published As
Publication number | Publication date |
---|---|
BE675761A (en) | 1966-07-28 |
GB1078269A (en) | 1967-08-09 |
NL6501243A (en) | 1966-08-01 |
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