CH408109A - Device for generating key pulse sequences - Google Patents

Device for generating key pulse sequences

Info

Publication number
CH408109A
CH408109A CH24662A CH24662A CH408109A CH 408109 A CH408109 A CH 408109A CH 24662 A CH24662 A CH 24662A CH 24662 A CH24662 A CH 24662A CH 408109 A CH408109 A CH 408109A
Authority
CH
Switzerland
Prior art keywords
pulse sequences
generating key
key pulse
generating
sequences
Prior art date
Application number
CH24662A
Other languages
German (de)
Inventor
Ehrat Kurt
Original Assignee
Gretag Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to BE626963D priority Critical patent/BE626963A/xx
Priority to NL287518D priority patent/NL287518A/xx
Application filed by Gretag Ag filed Critical Gretag Ag
Priority to CH24662A priority patent/CH408109A/en
Priority to DEG36650A priority patent/DE1257843B/en
Priority to GB49150/62A priority patent/GB973537A/en
Priority to FR920652A priority patent/FR1347338A/en
Priority to US250119A priority patent/US3678198A/en
Priority to NL63287518A priority patent/NL142301B/en
Publication of CH408109A publication Critical patent/CH408109A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
    • G06F2207/581—Generating an LFSR sequence, e.g. an m-sequence; sequence may be generated without LFSR, e.g. using Galois Field arithmetic
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
    • G06F2207/583—Serial finite field implementation, i.e. serial implementation of finite field arithmetic, generating one new bit or trit per step, e.g. using an LFSR or several independent LFSRs; also includes PRNGs with parallel operation between LFSR and outputs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
CH24662A 1962-01-10 1962-01-10 Device for generating key pulse sequences CH408109A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
BE626963D BE626963A (en) 1962-01-10
NL287518D NL287518A (en) 1962-01-10
CH24662A CH408109A (en) 1962-01-10 1962-01-10 Device for generating key pulse sequences
DEG36650A DE1257843B (en) 1962-01-10 1962-12-17 Device for generating key pulse sequences
GB49150/62A GB973537A (en) 1962-01-10 1962-12-31 Circuit for generating cipher pulse series
FR920652A FR1347338A (en) 1962-01-10 1963-01-07 Key pulse train generator assembly
US250119A US3678198A (en) 1962-01-10 1963-01-08 Circuit for generating a series of cipher pulses
NL63287518A NL142301B (en) 1962-01-10 1963-01-08 CIRCUIT FOR GENERATING CODE IMPULSE SERIES.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH24662A CH408109A (en) 1962-01-10 1962-01-10 Device for generating key pulse sequences

Publications (1)

Publication Number Publication Date
CH408109A true CH408109A (en) 1966-02-28

Family

ID=4182624

Family Applications (1)

Application Number Title Priority Date Filing Date
CH24662A CH408109A (en) 1962-01-10 1962-01-10 Device for generating key pulse sequences

Country Status (6)

Country Link
US (1) US3678198A (en)
BE (1) BE626963A (en)
CH (1) CH408109A (en)
DE (1) DE1257843B (en)
GB (1) GB973537A (en)
NL (2) NL142301B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4434322A (en) 1965-08-19 1984-02-28 Racal Data Communications Inc. Coded data transmission system
US3921151A (en) * 1971-06-21 1975-11-18 Patelhold Patentwerwertungs & Apparatus for enciphering transmitted data by interchanging signal elements of the transmitted data without overlapping or omitting any elements within the transmitted signal train
US3764742A (en) * 1971-12-23 1973-10-09 Ibm Cryptographic identification system
US3878332A (en) * 1972-10-20 1975-04-15 Barrie O Morgan Digital crytographic system and method
US4305060A (en) * 1979-02-26 1981-12-08 Multi-Elmac Company Decoder circuitry for selectively activating loads
US4447672A (en) * 1980-10-06 1984-05-08 Nippon Electric Co., Ltd. Device for encrypting each input data bit by at least one keying bit decided by a code pattern and a bit pattern of a predetermined number of preceding encrypted bits
JPH05291891A (en) * 1992-02-14 1993-11-05 Ricoh Co Ltd Primary random pulse train generating circuit device
GB0028369D0 (en) * 2000-11-21 2001-01-03 Marconi Software Solutions Ltd A communication system
US10438022B2 (en) * 2016-12-16 2019-10-08 Arm Limited Logic encryption using on-chip memory cells

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL110769C (en) * 1955-01-26
US2995624A (en) * 1959-03-11 1961-08-08 Zenith Radio Corp Secrecy communication system

Also Published As

Publication number Publication date
GB973537A (en) 1964-10-28
DE1257843B (en) 1968-01-04
NL142301B (en) 1974-05-15
NL287518A (en)
BE626963A (en)
US3678198A (en) 1972-07-18

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