CH359791A - Method of manufacturing a transistor - Google Patents

Method of manufacturing a transistor

Info

Publication number
CH359791A
CH359791A CH359791DA CH359791A CH 359791 A CH359791 A CH 359791A CH 359791D A CH359791D A CH 359791DA CH 359791 A CH359791 A CH 359791A
Authority
CH
Switzerland
Prior art keywords
transistor
manufacturing
Prior art date
Application number
Other languages
German (de)
Inventor
Heinz Dr Ing Henker
Hans Dr Dipl Phys Rebstock
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DES48077A external-priority patent/DE1207507B/en
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH359791A publication Critical patent/CH359791A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
CH359791D 1956-03-23 1960-03-29 Method of manufacturing a transistor CH359791A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DES48077A DE1207507B (en) 1956-03-23 1956-03-23 Process for the production of a planar alloy transistor consisting of germanium or silicon
DES0062423 1959-04-03

Publications (1)

Publication Number Publication Date
CH359791A true CH359791A (en) 1962-01-31

Family

ID=25995286

Family Applications (1)

Application Number Title Priority Date Filing Date
CH359791D CH359791A (en) 1956-03-23 1960-03-29 Method of manufacturing a transistor

Country Status (4)

Country Link
CH (1) CH359791A (en)
FR (1) FR77446E (en)
GB (1) GB926280A (en)
NL (2) NL110415C (en)

Also Published As

Publication number Publication date
GB926280A (en) 1963-05-15
NL250053A (en)
NL110415C (en)
FR77446E (en) 1962-03-02

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