CA930477A - Multi-level integrated circuit and fabrication thereof - Google Patents

Multi-level integrated circuit and fabrication thereof

Info

Publication number
CA930477A
CA930477A CA930477A CA930477DA CA930477A CA 930477 A CA930477 A CA 930477A CA 930477 A CA930477 A CA 930477A CA 930477D A CA930477D A CA 930477DA CA 930477 A CA930477 A CA 930477A
Authority
CA
Canada
Prior art keywords
fabrication
integrated circuit
level integrated
level
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA930477A
Inventor
A. Ibrahim Abd-El-Fattah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsystems International Ltd
Original Assignee
Microsystems International Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsystems International Ltd filed Critical Microsystems International Ltd
Application granted granted Critical
Publication of CA930477A publication Critical patent/CA930477A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
CA930477A 1971-12-22 1971-12-22 Multi-level integrated circuit and fabrication thereof Expired CA930477A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA130834 1971-12-22

Publications (1)

Publication Number Publication Date
CA930477A true CA930477A (en) 1973-07-17

Family

ID=4091864

Family Applications (1)

Application Number Title Priority Date Filing Date
CA930477A Expired CA930477A (en) 1971-12-22 1971-12-22 Multi-level integrated circuit and fabrication thereof

Country Status (1)

Country Link
CA (1) CA930477A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0073509A2 (en) * 1981-08-31 1983-03-09 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US4571609A (en) * 1980-06-16 1986-02-18 Tokyo Shibaura Denki Kabushiki Kaisha Stacked MOS device with means to prevent substrate floating
US4635089A (en) * 1981-10-28 1987-01-06 Kabushiki Kaisha Daini Seikosha MIS-integrated semiconductor device
US5196910A (en) * 1987-04-24 1993-03-23 Hitachi, Ltd. Semiconductor memory device with recessed array region
USRE38296E1 (en) * 1987-04-24 2003-11-04 Hitachi, Ltd. Semiconductor memory device with recessed array region

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571609A (en) * 1980-06-16 1986-02-18 Tokyo Shibaura Denki Kabushiki Kaisha Stacked MOS device with means to prevent substrate floating
EP0073509A2 (en) * 1981-08-31 1983-03-09 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US4472729A (en) * 1981-08-31 1984-09-18 Tokyo Shibaura Denki Kabushiki Kaisha Recrystallized three dimensional integrated circuit
EP0073509A3 (en) * 1981-08-31 1985-04-03 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US4635089A (en) * 1981-10-28 1987-01-06 Kabushiki Kaisha Daini Seikosha MIS-integrated semiconductor device
US5196910A (en) * 1987-04-24 1993-03-23 Hitachi, Ltd. Semiconductor memory device with recessed array region
USRE38296E1 (en) * 1987-04-24 2003-11-04 Hitachi, Ltd. Semiconductor memory device with recessed array region

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