CA901179A - Method of making a planar, segmented memory unit - Google Patents

Method of making a planar, segmented memory unit

Info

Publication number
CA901179A
CA901179A CA901179A CA901179DA CA901179A CA 901179 A CA901179 A CA 901179A CA 901179 A CA901179 A CA 901179A CA 901179D A CA901179D A CA 901179DA CA 901179 A CA901179 A CA 901179A
Authority
CA
Canada
Prior art keywords
planar
making
memory unit
segmented memory
segmented
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA901179A
Inventor
J. Shaw Everett
G. Stetka Daniel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Publication date
Application granted granted Critical
Publication of CA901179A publication Critical patent/CA901179A/en
Expired legal-status Critical Current

Links

CA901179A Method of making a planar, segmented memory unit Expired CA901179A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA901179T

Publications (1)

Publication Number Publication Date
CA901179A true CA901179A (en) 1972-05-23

Family

ID=36409129

Family Applications (1)

Application Number Title Priority Date Filing Date
CA901179A Expired CA901179A (en) Method of making a planar, segmented memory unit

Country Status (1)

Country Link
CA (1) CA901179A (en)

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