CA2971782A1 - Ferroelectric tunnel junction and method of fabrication thereof - Google Patents

Ferroelectric tunnel junction and method of fabrication thereof Download PDF

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Publication number
CA2971782A1
CA2971782A1 CA2971782A CA2971782A CA2971782A1 CA 2971782 A1 CA2971782 A1 CA 2971782A1 CA 2971782 A CA2971782 A CA 2971782A CA 2971782 A CA2971782 A CA 2971782A CA 2971782 A1 CA2971782 A1 CA 2971782A1
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Prior art keywords
tunnel junction
ferroelectric
ferroelectric tunnel
zirconium oxide
oxide film
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Inventor
Andreas Ruediger
Gitanjali Kolhatkar
Reji Thomas
Rafik Nouar
Andranik Sarkissian
Marc Andre Gauthier
Azza Hadj Youssef
Fabian Ambriz-Vargas
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Plasmionique Inc
Institut National de La Recherche Scientifique INRS
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Plasmionique Inc
Institut National de La Recherche Scientifique INRS
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02425—Conductive materials, e.g. metallic silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

Abstract

A method for fabricating a ferroelectric tunnel junction, comprising growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425°C, on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode

Description

TITLE OF THE INVENTION
Ferroelectric tunnel junction and method of fabrication thereof FIELD OF THE INVENTION
[0001] The present invention relates to ferroelectric tunnel junctions. More specifically, the present invention is concerned with hafnium zirconium-based ferroelectric tunnel junctions and a method of fabrication thereof.
BACKGROUND OF THE INVENTION
[0002] Semiconductor memories, which are key components of any electronic devicel, can be classified either into random access memories (RAM) or read-only memories (ROM)2, as shown in FIG.
1 for example.
[0003] In random access memories (RAMs), information can be written or read from any cells multiple times2. Random access memories (RAMs) can be further classified based on the retention of the stored information, into volatile memories (Dynamic RAMs (DRAMs) and static RAMs (SRAMs)) and nonvolatile memories2.
[0004] Dynamic RAMs (DRAMs) have been a technology of choice for the past four decades3.
Nowadays semiconductor memories represent 21% of the total semiconductor market, and although a large variety of memory types is available, the market is dominated mainly by dynamic RAMs (DRAMs), which make up 48% of the memory market, as shown in FIG. 21. However, dynamic RAMs (DRAMs) have gradually reached their physical scalability limit and data retention time is limited by leakage of the capacitor and the transistor. Another drawback is related to poor energy efficiency, as 40% of the overall power consumption is originated from the system memory power, i.e.
DRAM power, and the disk power. Also, high density dynamic RAM technologies have reached its miniaturization limit whith lateral feature size of DRAMs memories shrunk down to about 14 nm2.
[0005] Emerging contenders for DRAMs seek to address the above concerns, by being non-volatile and scalable to smaller dimensions, for example by using ferroelectric tunnel junction memory (FTJ)4.
[0006] A ferroelectric tunnel junction memory consists of two metal electrodes separated by a nanometer-thick ferroelectric layer.4 The tunneling electroresistance effect (TER) occurring in this semiconductor memory predominantly relies on the modulation of the electrostatic potential profile by polarization reversal of an ultrathin ferroelectric barrier, which produces two different electrical resistance states in the ferroelectric tunnel junction, which can be codified as "ON" and "OFF" in a binary code. The use of the tunneling electroresistance effect in a semiconductor memory brings a number of advantages such as for example: i) high fatigue resistance (endurance - 106 cycles), ii) high speed ("ON/OFF" states can be written with pulses down to 10 ns), iii) high scalability, and iv) simple architecture4,5.
[0007] A key challenge to overcome in a ferroelectric tunnel junction memory is to find an adequate material which, in ultrathin film form, i.e. with a thickness below about 4 nm, presents ferroelectric properties. In addition, this ferroelectric material should present synthesis parameters compatible with complementary metal oxide semiconductor processes (CMOS)4, in terms in particular of chemical compatibility and crystallization temperature. Current ferroelectric tunnel junction devices are based on perovskite ferroelectric barriers6, which suffer from lack of CMOS
compatibility due to poor interfacing with silicon, an elevated crystallization temperature, and electrical degradation under forming gas treatment. These issues, along with the inability to further scale down, prevent their use in high density memoriesu.
[0008] There is still a need in the art for ferroelectric tunnel junctions and a method of fabrication thereof.
SUMMARY OF THE INVENTION
[0009] More specifically, in accordance with the present invention, there is provided a method for fabricating a ferroelectric tunnel junction, comprising growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425 C, on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode.
[0010] There is further provided a ferroelectric tunnel junction comprising a hafnium zirconium oxide film of a thickness of at most 5 nanometers, fabricated by growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425 C, on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode.
[0011] There is further provided a memory device comprising a ferroelectric tunnel junction comprising a hafnium zirconium oxide film of a thickness of at most 5 nanometers, fabricated by growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425 C, on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode,
[0012] Other objects, advantages and features of the present invention will become more apparent upon reading of the following non-restrictive description of specific embodiments thereof, given by way of example only with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In the appended drawings:
[0014] FIG. 1 is a schematic view of semiconductor memories classification as known in the art;
[0015] FIG. 2 is a schematic view of semiconductor memory market as known in the art (source:
WSTS Q1 2013);
[0016] FIG. 3 is a schematic view of a RF-sputtering system used according to an embodiment of an aspect of the present invention;
[0017] FIG. 4 show an XRR spectrum recorded on a Hf0.5Zro.502 film (black curve and fit curve in stippled lines);
[0018] FIG. 5A shows Rms image before deposition;
[0019] FIG. 5B shows Rms image after deposition;
[0020] FIG. 5C shows a XPS spectrum of a Hf0.5Zro.502 film;
[0021] FIG. 5D shows a Ht4f detail of the XPS spectrum of FIG. 5C, where the bottom line corresponds to a background curve based on the Shirley method;
[0022] FIG. 5E shows a Zr3d detail of the XPS spectrum of FIG. 5C, where the bottom line corresponds to a background curve based on the Shirley method;
[0023] FIG. 6A shows the local piezo-response force microscopy (PRF) phase;
[0024] FIG. 6B is a PFM phase image of Hf0.5Zro.502 films;
[0025] FIG. 7A shows an I-V curve measured on a TiN/Hf0.5Zr0.502/Pt heterostructure;
[0026] FIG. 7B shows an I-V curve measured on a Pt/Hfo.5Zr0.502/Pt heterostructure;
[0027] FIG. 8 shows I-V curve measured on a TiN/Hf0.5Zr0.502/Pt (300 pm in diameter) heterostructure, the direction of the voltage sweeps being given by the arrows;
[0028] FIG. 9A shows fatigue measurements on a TiN/Hfo.5Zro502/Pt (diameter of 300 pm) heterostructure displaying the "OFF" and "ON" (in bold) resistance values over 1000 write/read cycles;
[0029] FIG. 9B shows "ON" and "OFF" resistances state (upper panel) and ON/OFF
ratios (bottom panel) of 30 different FTJ memory cells; and
[0030] FIG. 90 shows Retention properties, where the "ON" resistance state was measured as a function of time at a read voltage of 0.4 V.
DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0031] The present invention is illustrated in further details by the following non-limiting examples.
[0032] Two different ferroelectric tunnel junction devices using ferroelectric ultrathin hafnium zirconium oxide films, i.e. of a thickness of at most 5 nanometers, were fabricated. A
first one comprises two Pt electrodes separated by a Hfo5Zro.502 layer, i.e. Pt/ Hfo.5Zr0502/Pt and a second comprises a TiN
electrode, Hfo5Zro.502, and a Pt electrode, i.e. TiN/ Hfo5Zro.502/Pt.
[0033] For the TiN/ Hfo,5Zro.502/Pt ferroelectric tunnel junction device, a Hfo.5Zro.502 /TiN layer was grown by radio frequency sputtering on (100) p-type Si, The titanium nitrite (TiN) bottom electrode was deposited on (100) p-type Si substrates by on-axis radio frequency magnetron sputtering at 400 C in a Ar and N2 atmosphere under a sputtering pressure of 10 mTorr (see FIG. 3). The subsequent growth of Hfo.5Zro.502 was performed at 425 C. During this step, the sputtering medium consisted of Ar and 02 and the RF power on the one inch in diameter of polycrystalline Hf0.5Zro.502 target was fixed at 20W. In both cases, the sputtering chamber was pumped prior to deposition to a base pressure of about 10-5 Torr using a dry pumping station. To eliminate contaminations and to maintain the target composition homogeneous, the target surface was cleaned for 15 min by presputtering prior to all depositions.
[0034] For the Pt/Hfo.5Zro.502/Pt ferroelectric tunnel junction device, a high quality Hf0.5Zr0502layer was deposited on a (111)-oriented polycrystalline Pt substrate. Before deposition, the substrate was ultrasonically rinsed with acetone and methanol, followed by annealing at 650 C to stabilize the Pt microstructure. The Pt/Hfo.5Zr0,502 (2.8 nm) heterostructure was grown via on-axis radio- frequency (RF) magnetron sputtering at 450 C, using a deposition pressure of 5 mTorr (2 sccm 02 and 2 sccm Ar) for an RF power of 20 Watts on a 1-inch target.
[0035] The sputtering conditions are listed in Table 1 below, using a computer controlled table top deposition device equipped with three magnetron sputter guns at the top and a heated substrate holder block at the bottom along the axis of the sputter-guns, the cylindrical chamber having a length of 18"
and a diameter of 8", was used (SPT310, Plasmionique Inc.).
Film: TiN Hf0.5Z ro.502 Hfo.5Zr0.502 Substrate: (100) p-type Si TiN/(100) p-type Si polycrystalline Pt Power density: ¨4 W/cm2 ¨4 W/cm2 ¨4 W/cm2 Target-substrate 11 cm 11 cm 11 cm spacing:
Sputtering medium:2 Ar and N2 mixture3 Ar and 02 mixture4 Ar and 02 mixture4 Sputtering pressure: 10 mTorr 5 mTorr 5 mTorr Substrate 400 C 425 C 425 C
temperature:
Pre-sputtering 15 min 15 min 15 min duration:
1Target dimensions: 2.54cm in diameter; 0.317cm in thickness 2Gass purity: Argon (99.998% pure), Nitrogen (99.998%) and Oxygen (99.993%) 3Nitrogen partial pressure: F., = N2/(Ar + N2) = 70%
40xygen partial pressure; 0 = 02/(Ar + 02) = 50%
Targets: TiN ceramic disc (99.9% pure) and Hfo.5Zro502 ceramic disc (99.9%
pure) Table 1
[0036] The layer thickness of the ferroelectric film was determined by X-ray reflectivity (XRR) (Philips X'Pert Materials Research Diffractometer). The layer thickness was found to be 2.8 nm for the film used in the fabrication of the ferroelectric tunnel junction (FIG. 4).
[0037] Analysis by X-ray photoelectron spectroscopy (FIG. 50) revealed the presence of Zr, Hf, 0, and C (contaminant) at the film surface. In order to determine the elemental composition of the films, additional high resolution scans were performed in selected binding energy ranges for Hfaf (FIG. 5D) and Zr3d (FIG. 5E). Relative atomic concentrations were determined from the peak areas and the relative sensitivity factors of peak position revealed a stoichiometric deposition, i.e. a Hf/Zr ratio of about 1, with the synthesis parameters listed in Table 1.
[0038] Polarization switching of 2.8 nm-thick films was investigated by piezoresponse force microscopy (PFM). The piezoresponse was obtained by applying an AC voltage between the electrodes (Pt or TiN) with a frequency of 51 kHz, off-resonance.
[0039] In the case of local hysteresis measurements, various DC voltages were applied in sequence, starting from maximum negative to maximum positive, and then back with a voltage interval between steps, while simultaneously monitoring the amplitude and phase of the piezoresponse. In general, Hf0.5Zr0502 films grown at a temperature above 425 00 showed typical hysteresis curves, which indicated the ferroelectric character of the material (FIG. 6A). A square region (2 pmx2 pm) of such a film was switched upwards by scanning the film surface with a tip biased with a negative voltage (V-rip=-V) exceeding the coercive voltage of the film. Then, polarization within an area of 1pmx1 pm in the center was switched downwards by applying a positive bias (VTip=+V). Films grown at 425 C were able to go through a full cycle of ferroelectric polarization switching (FIG. 6B).
Overall, the ferroelectric phase of Hf0.5Zr0.502 occurred at a synthesis temperature of about 425 C, which is lower than the synthesis temperature for conventional perovskite materials (above 60000)7,11. In terms of device application, this is an advantage for CMOS compatibility because of the relative low thermal energy required for Hf0.5Zr0.502 formation. Deposition temperatures below 425 degrees Celsius, as long as they do not compromise the electronic properties, are advantageous in terms of process compatibility.
[0040] To confirm that the electric switching observed by C-AFM is due to the tunneling electroresistance effect rather than another resistive switching mechanism, the experimental data were fitted with two different theoretical models.
[0041] For the case of the TiN/Hfo5Zro502/Pt ferroelectric tunnel junction device, the Brinkman model was employed, which predicts direct tunneling current across asymmetric barriers, i.e. ferroelectric tunnel junction devices where the material of the top and bottom electrodes are different. This model determines the tunneling current density (j) as a function of voltage (v), using the potential barrier steps at both ferroelectric-electrode interfaces ((p, and (p,), layer thickness (d), electron charge (e) and the effective electron mass (m) as described by relation (1) below:
__e2y-((pi+e2V41 / 4em exPta(V)[((P2 3 eV 1 I = x ___________________________________________ 2 sinhf-a(V)[(T2 ¨
(q)1 .17-)1-e-11-1) (1) 97r2h3 2 2 a2(v)[(492-q)2-(401+2 where x (v) = [44(2m)1/2/[3h(cpi + eV ¨ 4)2)] and h is the reduced Planck constant. The input parameters used to fit the downward and upward states of the current-voltage curve are listed in Table 2 below.
ON state OFF state Barrier height 1 ((p1)1 1.86 eV 2.75 eV
Barrier height 2 (4)2)1 2.36 eV 2.20 eV
Layer thickness (d) 3 x 10-9m Electron mass (m) 9.1094 x 10-31Kg Electron charge (e) 1.60217662 x 10-19C
Planck constant (h) 1.054571800 x 10-34J = s leV units of both potential barriers were converted to Joules (1) Table 2
[0042] On the other hand the I-V curve of the Pt/ Hf0.5Zro 502/Pt ferroelectric tunnel junction device was fitted using the Simmons model as per relation 2 below, which considers the tunneling current density (J) across symmetric barriers, i.e. ferroelectric tunnel junction devices where the material of both electrodes are similar. The parameters values used to fit the downward and upward state are listed in Table 3 below.
¨ (47z-s) J = [3(21") 2 1(-e)2 V X exp[ (2m)2] (2) 2s ON state OFF state Barrier height 1 (4)1)1 2.33 eV 2.67 eV
Layer thickness (d) 2.8nm Electron mass (m) 9.1094 x 10-31Kg Electron charge (e) 1.60217662 x 10-19C
Reduced planck constant (h) 1.626070040 x 10-34J = s leV units of both potential barriers were converted to Joules (I) Table 3
[0043] As can be seen from the curves of FIGs, 7, there is a good agreement between the theoretical and experimental data in both ferroelectric tunnel junction devices, attesting to the presence of direct tunneling current across the ferroelectric barrier. The ferroelectric tunnel junction devices present a tunneling electroresistance ratio equal to 15 and 20 for the TiN/
Hf0.5Zro.502/Pt and Pt/
Hfo5Zro.502/Pt heterostructures, respectively, which are in the range of the values typically reported for ferroelectric tunnel junctions4.
[0044] Thus, ferroelectric tunnel junctions were fabricated by covering the 2.8 nm-thick Hfo5Zro.502 films deposited on conductive substrates, either TiN or Pt as bottom electrodes, with Pt top electrodes.
The resulting ferroelectric tunnel junction devices were characterized by their hysteretic /-V curve.
Voltage sweeps were applied to the top electrode via a conductive AFM tip.
Typical I-V curves are shown in FIGs. 7A and 7B. In both cases the I-V curve displays a hysteretic behavior characterized by two different resistance states: an initial high-resistance state (upward polarization) and a low-resistance state (downward polarization). The existence of two clearly defined resistance states suggests a tunneling electroresistance effect. Asymmetric electrodes may be advantageous for device operation though not imperative.
[0045] To prevent the loss of oxygen by exchange with the ambient atmosphere, which may contribute to fatigue of ferroelectric thin films under repetitive switching, expressed as loss of reversible remnant polarization, oxygen-based electrode materials, such as iridium/iridium oxide for example, may be used [17].
[0046] For devices of 300 pm in diameter (the size of the Pt electrode), the 1-V curve illustrated in Fig. 8 shows a change from the "ON" state to the "OFF" state at a write voltage of +2.2 V while the change from "OFF" state to "ON" state takes place at a write voltage of -1.7 V. The endurance of the TiN/ Hf0.5Zr0502/Pt heterostructure was evaluated by recording 1000 I-V cycles under quasi-static conditions on the same FTJ memory cell. Given that contact by the AFM was required, the acquisition speed was limited by the AFM specifications and a 1000 cycle quasi-static measurement already took a day. For each I-V curve, the "ON" and OFF" resistances were obtained at a read voltage of +0.2 V
(FIG. 9A). They remain stable over 1000 cycles, indicating good endurance of the FTJs. The reproducibility of the TER effect in the FTJs under study was investigated by recording I-V cycles from 30 different FTJ devices. For each memory cell, the resistance values for both the "ON" and "OFF"
states were recorded at 0.2V. The 30 memories cells presented an ON/OFF ratio, or TER ratio, of 15 3 on average (FIG. 9B). This result attests to the high reproducibility of the TER effect in the TiN/
Hfo5Zro.502/Pt FTJ memory devices. The retention properties of the present FTJ
were evaluated on a single memory cell by recording the "ON" resistance state value over time at a read voltage of +0.4 V
[16]. As shown in FIG. 90, the "ON" resistance state can still be read after 8 h, demonstrating that the FTJ devices present a long time retention.
[0047] There is thus provided a method for fabrication of a ferroelectric tunnel junction based on a CMOS compatible tunnel barrier (Hfo5Zro.502) on an equally CMOS compatible electrode. A tunnel electroresistance (TER) effect was observed (resistance change equal to two orders of magnitude) with an ON/OFF ratio of 15 and 20 (measured at 0.2 V) for TiN/ Hfo5Zro.502/Pt and Pt/ Hfc).5Zro502/Pt ferroelectric tunnel junctions, respectively, for example. These CMOS
compatible ferroelectric tunnel junctions based on hafnium zirconium oxide tunnel barriers may be used to replace current dynamic random access memories (DRAMs).
[0048] Doping with ions that reinforce the polarization without detriment to the insulating properties of the barrier layer may be advantageous for the device performance.
[0049] The junction operation was found to be stable regarding variations of the Hf/Zr ratio from the
50:50 distribution of Hf to Zr (as described above in relation to FIGs. 5, t XPS analysis show HfxZr(1_ x)02, with x almost 0.5) in the barrier layer, as well as regarding isovalent co-doping. The polycrystalline nature of the barrier materials and the electrodes is compatible with device operation. The presence of additional crystalline phases other than the ferroelectric phase of the barrier material is compatible with device operation. RF magnetron sputtering offers the particular advantages of a single deposition process for electrodes and barrier and the absence of chemical contaminants as commonly encountered in atomic layer deposition, chemical solution deposition metalorganic chemical solution deposition. These contaminations are a source of extrinsic defects that are detrimental to the electronic properties of the barrier layer.
[0050] The electrodes may be metallic or semiconducting electrodes, of a thickness selected so as to guarantee metallic or good semiconducting conduction, i.e. typically several tens of nanometers, for example in a range between monolayers and 100 nanometers. They may be metallic, TiN, Au, Pt, graphene; semiconducting electrodes may be selected, such as Niobium-doped strontium titanate (SrTiO3:Nb). Oxygen-containing electrodes may be used. Indeed, the present junctions may be used for overcoming current ferroelectric random access memories (Fe-RAM).
Electrode materials known to limit fatigue in ferroelectric random access memory (FeRAM), provided that their deposition is CMOS
compatible, such as Ir/Ir02 may be used.
[0051] The present junctions are intended for pulse operation, while quasi-static experiments were merely used for characterisation. As people in the art will appreciate, exact operating conditions are subject to the choice of e.g. peripheral circuitry and pulse length.
[0052] Operation as a non-volatile memory device also occurs under different charge transport mechanisms other than direct tunnelling. This applies in particular to Fowler-Nordheim tunnelling and thermionic charge transport.
[0053] There is thus provided a method for fabricating hafnium zirconium oxide -based ferroelectric tunnel junction devices, comprising depositing hafnium zirconium oxide by sputtering in the presence of oxygen at a temperature of at most 425 C on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode. Sputtering prevents the formation of extrinsic defects such as in particular unwanted dopants with a different valence state than the ions in the crystal, which would lead to unwanted donor or acceptor doping and subsequent conductivity that would cancel tunnel contact. Also, sputtering, as compared to pulsed laser deposition, is suitable for large surface coverage as required in industrial processes. Moreover, the sputter deposition is performed at moderate temperatures, which allows maintaining the stability of CMOS structures.
[0054] The scope of the claims should not be limited by the preferred embodiments set forth in the examples, but should be given the broadest interpretation consistent with the description as a whole.

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Claims (13)

13
1. A method for fabricating a ferroelectric tunnel junction, comprising growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425°C, on a first conductive material as a bottom electrode, and depositing a second conductive material as a top electrode.
2. The method of claim 1, wherein the hafnium zirconium oxide film has a thickness of at most 5 nanometers.
3. The method of any one of claims 1 and 2, wherein the hafnium zirconium oxide film is Hf x Zr(1-x)O2, with x about 0.5.
4. The method of any one of claims 1 to 3, wherein the electrodes comprise ones of: a TiN, Au, Pt, graphene, Ir/IrO2 and niobium-doped strontium titanate.
5. The method of any one of claims 1 to 3, wherein the electrodes are oxygen-containing electrodes.
6. The method of any one of claims 1 to 5, wherein comprising selecting electrodes of a thickness in a range between monolayers and 100 nanometers.
7. A ferroelectric tunnel junction, fabricated by growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425°C on a first conductive material as a bottom electrode, and depositing a second conductive material as a top electrode, said hafnium zirconium oxide film having a thickness of at most 5 nanometers.
8. The ferroelectric tunnel junction of claim 7, wherein said hafnium zirconium oxide film is Hf x Zr(1-x)O2, with x about 0.5.
9. The ferroelectric tunnel junction of any one of claims 7 and 8, wherein said first and second conductive materials are at least one of: TiN, Au, Pt, graphene, Ir/IrO2 and niobium-doped strontium titanate.
10. The ferroelectric tunnel junction of any one of claims 7 to 9, wherein said first and second conductive materials are oxygen-containing materials.
11. The ferroelectric tunnel junction of any one of claims 7 to 10, wherein said top and bottom electrodes have a thickness in a range between monolayers and 100 nanometers.
12. A memory device comprising a ferroelectric tunnel junction fabricated by growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of oxygen at a temperature of at most 425°C on a conductive material as a bottom electrode, and depositing a conductive material as a top electrode, said hafnium zirconium oxide film having a thickness of at most nanometers.
13. A memory device comprising a ferroelectric tunnel junction according to any one of claims 7 to 11.
CA2971782A 2017-06-22 2017-06-22 Ferroelectric tunnel junction and method of fabrication thereof Abandoned CA2971782A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020210163A1 (en) 2020-08-11 2022-02-17 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Method of producing a ferroelectric layer or an antiferroelectric layer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020210163A1 (en) 2020-08-11 2022-02-17 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Method of producing a ferroelectric layer or an antiferroelectric layer
DE102020210163B4 (en) 2020-08-11 2023-12-21 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Method for producing a ferroelectric layer or an antiferroelectric layer and component

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