CA2544219A1 - Ordonnancement de paquets a unidiffusion de maniere non bloquante et deterministe - Google Patents
Ordonnancement de paquets a unidiffusion de maniere non bloquante et deterministe Download PDFInfo
- Publication number
- CA2544219A1 CA2544219A1 CA002544219A CA2544219A CA2544219A1 CA 2544219 A1 CA2544219 A1 CA 2544219A1 CA 002544219 A CA002544219 A CA 002544219A CA 2544219 A CA2544219 A CA 2544219A CA 2544219 A1 CA2544219 A1 CA 2544219A1
- Authority
- CA
- Canada
- Prior art keywords
- input
- packets
- packet
- output
- interconnection network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000011218 segmentation Effects 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 99
- 238000013461 design Methods 0.000 claims description 13
- 230000000903 blocking effect Effects 0.000 claims description 11
- 239000000872 buffer Substances 0.000 claims 4
- 230000003362 replicative effect Effects 0.000 claims 1
- 230000003139 buffering effect Effects 0.000 abstract description 2
- 239000004744 fabric Substances 0.000 description 180
- 238000010586 diagram Methods 0.000 description 23
- 238000012546 transfer Methods 0.000 description 14
- 238000012913 prioritisation Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 4
- 238000007726 management method Methods 0.000 description 4
- 230000008707 rearrangement Effects 0.000 description 3
- 235000008733 Citrus aurantifolia Nutrition 0.000 description 2
- 240000006909 Tilia x europaea Species 0.000 description 2
- 235000011941 Tilia x europaea Nutrition 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 2
- 239000004571 lime Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000002459 sustained effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/52—Queue scheduling by attributing bandwidth to queues
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/111—Switch interfaces, e.g. port details
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/112—Switch control, e.g. arbitration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3018—Input queuing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3027—Output queuing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US51605703P | 2003-10-30 | 2003-10-30 | |
US60/516,057 | 2003-10-30 | ||
PCT/US2004/035954 WO2005045633A2 (fr) | 2003-10-30 | 2004-10-29 | Ordonnancement de paquets a unidiffusion de maniere non bloquante et deterministe |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2544219A1 true CA2544219A1 (fr) | 2005-05-19 |
Family
ID=34572866
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002544219A Abandoned CA2544219A1 (fr) | 2003-10-30 | 2004-10-29 | Ordonnancement de paquets a unidiffusion de maniere non bloquante et deterministe |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1690159A2 (fr) |
JP (1) | JP2007510376A (fr) |
CA (1) | CA2544219A1 (fr) |
IL (1) | IL175337A0 (fr) |
WO (1) | WO2005045633A2 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2461693B (en) | 2008-07-07 | 2012-08-15 | Micron Technology Inc | Switching method |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5978359A (en) * | 1995-07-19 | 1999-11-02 | Fujitsu Network Communications, Inc. | Allocated and dynamic switch flow control |
US6212182B1 (en) * | 1996-06-27 | 2001-04-03 | Cisco Technology, Inc. | Combined unicast and multicast scheduling |
US6351466B1 (en) * | 1998-05-01 | 2002-02-26 | Hewlett-Packard Company | Switching systems and methods of operation of switching systems |
KR100382142B1 (ko) * | 2000-05-19 | 2003-05-01 | 주식회사 케이티 | 단순반복매칭을 이용한 입출력버퍼형 스위치의 셀스케줄링 방법 |
US7224671B2 (en) * | 2000-09-28 | 2007-05-29 | Force10 Networks, Inc. | Method and apparatus for load balancing in network processing device |
JP4320980B2 (ja) * | 2001-06-19 | 2009-08-26 | 株式会社日立製作所 | パケット通信装置 |
-
2004
- 2004-10-29 CA CA002544219A patent/CA2544219A1/fr not_active Abandoned
- 2004-10-29 JP JP2006538294A patent/JP2007510376A/ja active Pending
- 2004-10-29 EP EP04810098A patent/EP1690159A2/fr not_active Withdrawn
- 2004-10-29 WO PCT/US2004/035954 patent/WO2005045633A2/fr not_active Application Discontinuation
-
2006
- 2006-04-30 IL IL175337A patent/IL175337A0/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2005045633A2 (fr) | 2005-05-19 |
IL175337A0 (en) | 2006-09-05 |
WO2005045633A3 (fr) | 2006-08-24 |
EP1690159A2 (fr) | 2006-08-16 |
JP2007510376A (ja) | 2007-04-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20070053356A1 (en) | Nonblocking and deterministic multirate multicast packet scheduling | |
US7586909B1 (en) | Striping algorithm for switching fabric | |
US5406556A (en) | Output buffered packet switch with a flexible buffer management scheme | |
US7042883B2 (en) | Pipeline scheduler with fairness and minimum bandwidth guarantee | |
US8937964B2 (en) | Apparatus and method to switch packets using a switch fabric with memory | |
US20050117575A1 (en) | Nonblocking and deterministic unicast packet scheduling | |
US20060285548A1 (en) | Matching process | |
US6747972B1 (en) | Method and apparatus for reducing the required size of sequence numbers used in resequencing packets | |
EP1856860A2 (fr) | Routeur, reseau comprenant un routeur et procede de routage de donnees dans un reseau | |
US6865154B1 (en) | Method and apparatus for providing bandwidth and delay guarantees in combined input-output buffered crossbar switches that implement work-conserving arbitration algorithms | |
US8213421B2 (en) | Methods and systems for efficient multicast across a mesh backplane | |
US20050129043A1 (en) | Nonblocking and deterministic multicast packet scheduling | |
US20050094644A1 (en) | Nonblocking and deterministic multirate unicast packet scheduling | |
CA2544219A1 (fr) | Ordonnancement de paquets a unidiffusion de maniere non bloquante et deterministe | |
US6647011B1 (en) | Method and system for switching using an arbitrator | |
Smiljanic | Bandwidth reservations by maximal matching algorithms | |
Audzevich | Design and Analysis of Load-Balancing Switch with Finite Buffers and Variable Size Packets | |
Salankar et al. | SOC chip scheduler embodying I-slip algorithm | |
Boppana et al. | Designing SANs to support low-fanout multicasts | |
Nabeshima | Input-queued switches using two schedulers in parallel | |
Sapountzis et al. | Benes Fabrics with Internal Backpressure: First Work-in-Progress Report | |
Cheocherngngarn et al. | Queue-Length Proportional and Max-Min Fair Bandwidth Allocation for Best Effort Flows | |
Hu et al. | NXG07-4: On Minimizing Feedback Overhead for Two-stage Switches | |
Hu et al. | Load-balanced Three-stage Switch Architecture | |
Wai | Path Switching over Multirate Benes Network |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FZDE | Discontinued |