CA2504336A1 - Methode et dispositif de creation d'un systeme de controleur autonome - Google Patents

Methode et dispositif de creation d'un systeme de controleur autonome Download PDF

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Publication number
CA2504336A1
CA2504336A1 CA 2504336 CA2504336A CA2504336A1 CA 2504336 A1 CA2504336 A1 CA 2504336A1 CA 2504336 CA2504336 CA 2504336 CA 2504336 A CA2504336 A CA 2504336A CA 2504336 A1 CA2504336 A1 CA 2504336A1
Authority
CA
Canada
Prior art keywords
host
management
autonomic
fpga
embedded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2504336
Other languages
English (en)
Inventor
William Russell Crick
John G. Mccarthy
Benoit Robitaille
Jay Litkey
G. Scott Turnbull
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Embotics ULC
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CA 2504336 priority Critical patent/CA2504336A1/fr
Publication of CA2504336A1 publication Critical patent/CA2504336A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1438—Restarting or rejuvenating

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
CA 2504336 2005-04-15 2005-04-15 Methode et dispositif de creation d'un systeme de controleur autonome Abandoned CA2504336A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA 2504336 CA2504336A1 (fr) 2005-04-15 2005-04-15 Methode et dispositif de creation d'un systeme de controleur autonome

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA 2504336 CA2504336A1 (fr) 2005-04-15 2005-04-15 Methode et dispositif de creation d'un systeme de controleur autonome

Publications (1)

Publication Number Publication Date
CA2504336A1 true CA2504336A1 (fr) 2006-10-15

Family

ID=37114135

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2504336 Abandoned CA2504336A1 (fr) 2005-04-15 2005-04-15 Methode et dispositif de creation d'un systeme de controleur autonome

Country Status (1)

Country Link
CA (1) CA2504336A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109491855A (zh) * 2017-09-12 2019-03-19 联想企业解决方案(新加坡)有限公司 管理计算设备的方法
CN110309085A (zh) * 2019-05-24 2019-10-08 中国工程物理研究院计算机应用研究所 基于fpga的一体化i2c接口验证控制器设计方法
US20220414216A1 (en) * 2020-03-06 2022-12-29 Huawei Technologies Co., Ltd. Electronic apparatus and security protection method
CN117891297A (zh) * 2024-03-14 2024-04-16 深圳市集贤科技有限公司 基于BLE mesh的环境智能控制方法及系统

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109491855A (zh) * 2017-09-12 2019-03-19 联想企业解决方案(新加坡)有限公司 管理计算设备的方法
CN109491855B (zh) * 2017-09-12 2023-07-14 联想企业解决方案(新加坡)有限公司 管理计算设备的方法
CN110309085A (zh) * 2019-05-24 2019-10-08 中国工程物理研究院计算机应用研究所 基于fpga的一体化i2c接口验证控制器设计方法
CN110309085B (zh) * 2019-05-24 2023-05-05 中国工程物理研究院计算机应用研究所 基于fpga的一体化i2c接口验证控制器设计方法
US20220414216A1 (en) * 2020-03-06 2022-12-29 Huawei Technologies Co., Ltd. Electronic apparatus and security protection method
CN117891297A (zh) * 2024-03-14 2024-04-16 深圳市集贤科技有限公司 基于BLE mesh的环境智能控制方法及系统
CN117891297B (zh) * 2024-03-14 2024-05-24 深圳市集贤科技有限公司 基于BLE mesh的环境智能控制方法及系统

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Legal Events

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EEER Examination request
FZDE Dead

Effective date: 20130204