CA2493967C - Radiotelephone system for groups of remote subscribers - Google Patents

Abstract

A power-conserving time division multiple access (TDMA) radiotelephone system is disclosed in which a cluster of subscriber stations, remote from a base station, employs a common pool of frequency-agile modems each of which digitally synthesizes, on a time slot-by-time slot basis, the different channel- identifying intermediate needed to support communications between several of the subscriber stations and the base station. Power conservation is facilitated inter alia by controlling the assignment of modems to calls, maintaining unassigned modems in a powered-down state and by controlling the number of calls using the same time slot. Delay in assigning a powered-down modem to a call is eliminated by making available to all modems the highest quality synchronization information obtained by any of the active modems.

Description

RADIOTELEPHONE SYSTEM FOR GROUPS OF REMOTE SUBSCRIBERS
Field of the Invention This invention relates to radiotelephone systems for serving a plurality of remote subscriber stations and, more particularly, to a radiotelephone system in which certain of said subscriber stations are located in a physically adjacent group.
Background of the Prior Art A radiotelephone system including a base station for serving remote subscriber stations is described in U.S.
patent 5,119,375. In that system each subscriber station was equipped with a radio that could be instructed by the base station to tune to a particular channel and to employ a particular time slot for the duration of a given conversation. Time division multiplex (TDM) radio channel transmission was employed from the base station to the subscriber stations and time division multiple access (TDMA), transmission from the individual subscriber stations to the base station. The time division of each radio channel into time slots and the compression of speech signals permitted each radio frequency channel to support a number of voice paths equal to the number of time slots.
Analog voice signals to and from the public switched telephone network were first converted to 64 kbps ~-law companded pulse coded modulation (PCM) digital samples.
Before transmission over the radio channel the digital samples were subjected to voice-compression to reduce the voice information rate from 64 kbps to 14.6 kbps using residual excited linear predictive (KELP) coding. A voice codec and modem were required to be dedicated to a specific frequency and time slot for the duration of a call.
While the foregoing system operated in a highly satisfactory manner in allowing telephone service to be provided especially to areas where wire lines are =2-impractical, the unforeseen growth of such telephone service has given rise to sitii~tions iii which several subscriber stations are found to lie in close proximity with one another . Initial efforts to lower) the per-line . cost of serving a group of~such closely situated dubscriber stations were focused on consolidating the installation and maintenance costs of individual subscriber stations~through the sharing of common equipment such as~the enclosure, power supply, RF power amplifier and antenna. Thus, in a closely situated group of 'subscriber statiaing, each of which could access an RF channel,, a single broadband RF
power amplifier could, be e~ployed~ to , serve the group.
However such efforts still required each subscriber line to have its own modem and radio transceiver.. ~ ~'he individual transceiver outputs were fed to .the ~ common RF ~ power amplifier, irthich had to be~ designed to handle .a peak power equal to the sum of the power of all~of the transceivers in the group of adjacent eubecriber~ stations~~~that could simultaneously be active on the~.aame time Slot. It is apparent that further consolidation over that possible in the '375 patent system and a reduction~in the~peak and average power required would be desirable, especially in remote areas required to be served by solar cell power.
Summarv of the Invention 2 S - In accordance with the principles, of our invention, per-line costs are reduced for a physically~adjacent group of subscriber lines by permitting~the lines~within such a group to share not only a common power~supply and RF power amplifier, but modem, synchronizatian,~"IF, up-.and down-conversion and controller functions .as well, sa that significant concentration is achieved. , In our.~ystem, a small number of modems is provided to 9ez~re the multiple subscribers in a physicallyadjacentgroup, hereinafter referred to as cluster or, more particularly, a9~a modular cluster. In an illustrative embodirrient, subscriber line circuits and modems are modularized printed circuit cards which plug into a frame employing backplane wiring to distribute timing information and data among the units.
Any or the modems may be seized to handle a call for any of the subscribers and each modem may handle calls for several subscribers on successive time slots. The same or a different frequency may be used to support communications for each subscriber on successive time slots.
. It is a feature of our invention that the selection from the common pool of frequency-agile modems of the modem to be used to handle a call is controlled to conserve power consumption in two ways. First, a new modem is preferably not seized for use to handle a call until all of the time slots on active modems have been assigned to calls, thereby allowing all not-yet-selected modems to remain in a power-conserving, "powered-down" state.
Second, the number of calls using the same time slot (on different frequencies) is controlled to reduce the peak power demand on the RF power amplifier.
It is a further feature of our invention to avoid synchronization delay when it is necessary to seize a Dowered-down modem for use on a call. Once time slot synchronization with the base station has been established for the first modem of the pool at the cluster, synchronization information is made available to the remaining modems, advantageously over backplane wiring, under control of a microprocessor-based cluster controller.
Accordingly, all powered-down modems remain instantly assignable to handle calls without undergoing any delay to become synchronized with the base station's time division f rarne _ It is a further feature of our invention to classify modem synchronization states according to several synchronization parameters and to derive a confidence factor =or each active modem that reflects the reliability of the synchronization parameters and to distribute s~mchtonizatiorl information fro~i the modeiri having the best cdrlf idence factor .
Brief Description of the Drawiricrs The foregoing and other objects and features of our invention may become more apparent by referring now to the drawing in i~hich Fig. 1 is a block diagraM of a Modular cluster having a common pool of frequency agile moderns for handling a group of subscriber stations; ' Fig. 2A shows the aseoCiation'of stibsdriber line circuits and Modems at the time slot irlterchanger;
Fig. 2H shows the TDMA RF frame allocated for ~.~PSK
time slots; w ' ' Fig. 2C shows the TDMA RF frame allocated for QPSK
time slots;
Fig. 2D shows the taHk scheduJ.ing between the TDMA
time slots and the PCM buffers;
Fig. 3 shows the principle oircuit elements of a frequency agile modem module;
Fig. 4 shows the IF portion ofwthe frequency agile modern ;
Fig. S is a block diagram of the block synthesizer, up/down converter;
Fig.~& shows the frequency synthesis and noise shaper 2S for the receiver portion of the modem;
Fig. 7 shows the frequency synthesis, modulation and noise shaper circuitry for the IF'transmitter portion of the modem; and Fig . a shows the system clock generation circuitry for the modular cluster.
General Description Fig. 1 is a block diagram of a modular subscriber cluster that is located remotely from a base station (not -S-shown). The subscriber cluster is termad "modular" because the line circuits 100 and the modems 400 are comprised of plug-in units. Accordingly, the number of plugged-in subscriber line circuits 100 will depend on the number oz subscribers in the local ity and the number of plugged-in modems 400 may be traffic-engineered to handle the amount of traffic expected to be generated by the number of line circuits 100. Line circuits 100 are contained on quad line module cards 101-108, each of which sezves four subscriber lines. Eight such quad line modules provide loop control functions to a line group of 32 subscriber lines and circuits 200 may contain multiple line groups.
Each line circuit on each quad line module 101-108 is given a dedicated PCM time slot appearance in PCM speech highway 200 and in signaling highway 201. The goad line modules 101-toe include voice codecs (not shown) to encode subscriber loop analog voice onto PCM data highway 200.
Subscriber loop signaling information is applied to signaling highway 201 by a subscriber line interface circuit SLIC (not shown). Either ~C-law or A-law PCM coding may be used.
The connection of a particular one of modems 400 to handle a call from or to a particular one of the line circuits on one ox quad 1 ine modules ? O1-108 is made via time Slot interchangers 310 and 320, as instructed by cluster controller 300. PCM data time slot interchanges 320 conveys speech samples between the PCM speech highway 200 serving Line modules 101-lOB and the Pr'M speech highway 220 serving modem pool 400. Signaling time slot interchanges 310 conveys signalling information between signalling highway 201 serving the modules 10o and signalling highway 221 ser~ring modem pool 400.
Two RF channels axe required for a telephone conveYsation, one for transmissi4ns from the base station 3S to the subscriber (the 'forward' channel) and one from the subscriber to the base station tthe 'reverse' channel).
The forward and reverse channel frequencies are assigned by the telecoinmunicatione authority and in atypical example may be separated from each other by 5 NIf-Iz . The path of the torwarct channel radio signal received at the cluster from the base station may be traced from cl~lster antenna 900 arid duplexer B00 to block synthesizer up/down converter (BSUD) 600: In block converter soo the RF signal is limited, band-pass filtered and down-converted from the 45o MHz, 900 MHz or othez~ high, or ultra-high frequency RF band to an IF
signal iri the 26 - 28 MHz range. The IF signal is delivered to modems 40o which process the signal for delivery to the subscriber lire circuits via the time slot interchangers i.ii the cluster controller 300:
. Tha inodeMe each . include a baeebarid ~ digital signal processor (see Fig, 3, DSPjHB~ and a rtibder~' ~roceseor (see Fig: 3, DSP/MDM): In the forward channel direction; modem processor DSP/MDM demodulates the IF signal received from block converter 500 and transfers the data to -baseband prdcesaor DSP/HB which expands the demodulated data. into u-law or A=law encoded signals for transmi9sion through time slot interchanges 320 to the Line modules:' The irtodem's baseband processor DSP/BB interfaces tv modem processor DSP/MDM via a direct memot-y access ~DMA~ interface (see Fig. 3? and to the PCM highways through the processor's serial port. In the reverse channel'direction, baseband processor DSP/HB con~terts the ~~law~or A-law coded PCM
inforirtation received from PCM highway 500 into linear form, compresses the linear data ~isirig'~ REZP coding and DMA
transfers the compressed data to digital signal processor DSPII~M which modulates the signal far transmission on the 3o radio channel time slot, As shown in Fig . 2A, each ~ of inoderris 400 and each of line modules loo has four dedicated time slot appearances in PCM data time slot interchanger'320 for non-blocking access. Each modem is assigned two adjacent PCM slots in -35 PCN1 time slots 0-? 5 and two adjacent PC~t time slots in PCM
time Slots 16-31. As an example, far a particular call, TSI 320 connects ,line circuit 0 of line ' module '7.01 to _7_ channel 1 of modem 1, and line circuit 1 of line module 101 is connected to channel 0 of modem 1, and so on. Time slot ir_terchangers 310 and 320 provide a repetitive 125 ACS
sampling period containing 32 time slots operating at a S rate of 2.048 Mbits/sec. During each I25 ACS PCM interval, the line modules may send thirty-two, e-bit bytes of data to tame slot interchanger 320 and each modem may receive four of the s-bit bytes at its baseband processor se_ia1 port, packed together as two lf-bit words_ Each ls-bit to word causes. a aerial port interrupt on the baseband processor. When the interrupt is received, the baseband processor determines whether the pair of PCM samples contained in the lo-bit word correspond to slots 0 and 1 or to slots 2 and 3. Similarly, during each 125 ~.S PCM
15 interval, four voice channels of PCM data, packed together as two 16-bit words, may be sent from each baseband processor's serial port to time slot interchanger 320 for delivery to the line modules, The TDM (RF) frame at the base station is shown in 20 Figs. 2B and 2C, each having a duration, illustratively, of 45 ms. The 16PSK frame of Fig. 2B has four time slots, each of duration t, each time slot capable of carrying the different frequencies assigned to the forward and reverse channels of the call. In Fig. 2C the RF frame of the same 25 duration is capable of accommodating the forward and reverse channels of two QPSK modulated calls. It can be appreciated that, alternatively, the TDM frame can carry four 16PSK calls or two QPSK modulated calls.
Fig. 2D illustrates the timing of the tasks performed 30 at the cluster in conveying information between an illustrative TDMA frame carrying QPSK modulated calls and the PChi highway frames . Line (1) represents the buffers far receiving the two QPSK Todulated forward channel time slots, Rxl and Rx2, of tha TDh.A frame. Demodulation is 35 begun as soon as the receive buffer has received .tie first half, Rxla, of the time slot. Line (2) represents the buffers preparing. to transmit in the two reverse channel QPSK time Slots, Tx1 and Tx2, of a TDMA frame: Note that, at the cluster, the reverse channel time Blots are offset from the forward channel time slots so that. the at~bscriber stdtion may avoid the expense and bulk of a duplexer. In addition; the subscriber unit's the reverse channel will be offset so that it will be received at the bags station at the pxoper time taking into accoiiiit 'the' distance between the eiibecriber station and the base station, Lines (3 ) and (4) of Fig, 2D represent the buffers in the .SR1~M (Fig. 3) Ia of the modem which store the PCM Words to and from speech time slot interchanger TSI 320 (Fig. 1).
In normal voice operation, the modem processor DSP/MDM
demodulates received forward channel symbols, packs them into a buffer ~n SRAM/MDM and sends the -contents of the buffer to the baseband processor DSP/BH for KELP synthesis (expai~.sion): The baseband processor encodes the expanded data to u-lave or A-late arid ptit~ it on the PCM bus for delivery to the line motiule5 . 'voice code words are transtrlitted iii every frame during active vbice operation .
2o The cads word resides at the beginning of the burst between the treamble and voice data on both the forward and reverse channels. The forward channel voice code words contain information that may be used to adjust transmit power and timing. Local loop control information (i.e.,- onhook, offhook, ring, forward disconnect? .'is also embedded in these code words. The reverse channel code words contain subscriber station local loop control and forward channel link quality information.
The forward voice codewotd is decoded by the modem processor DSP/MDNi. The forward voice codeword contains transmit fractional timing control,"transmit pdwer~level control and local lbop control information: The fractional timing and power level control information is averaged out over a f rams and the average adjustment made at the end of the f rams. The local loop control information is stored locally and changes in loop state are detected and zeported to the cluster controller. The local loop control also causes the modem to send out line circuit control over the signalling bus. The reverse voice codeword contains local loop status that is used by the cluster controller and base station to monitor call progress.
S The modem processor DSP/MDM performs receive FIR
filtering and automatic gain control of the received samples during a receive symbol interrupt service routine.
The demodulator routine in the modem processor is called when half a slot of baseband information has been received l0 in the receive buffer. The demodulator operates on the half slot of data and passes the packed output data to the baseband processor DSP/BB for KELP synthesis. Data transfer to and from the baseband processor is controlled so that the KELP input queues are filled before the 15 corresponding synthesis data is required, and RELP output aueues are emptied before new analysis (compression) output data arrives. During demodulation, automatic frequency control (AFC), automatic gain control (AGC) and bit tracking processes are performed to maintain close 20 synchronization with the base station.
It should be appreciated that mixed mode operation is possible whereby some time slots in the RF may employ 16PSK
modulation while the remaining slots employ QPSK
modulation.
25 Synchronization to the Base Station Before an RF channel can be used for communication between the base station and the cluster, the cluster must be synchronized to the RF time slot scheme used by the base station (not shown). In accordance with our invention, one 30 or more of modems 40o will be ordered by cluster controller 300 to acquire synchronization with the base station RF
frame timing by searching for the channel frequency carrying the radio control c'tiannel (RCC) being used by the base station. Cluster controller 300 includes a master 35 control microprocessor 330, illustratively, one employing a Motorola 58000 series processor, which ~e~ridg~ control information over the CP buy to the mici'oproceesors in modems 400. On power tip, cluster controller X00 down-loads appropriate software and initialization data to modems 400.
After the channel frequency is found; the modem must synchronize with the base station time slot by decoding the RCC unique word: As described is the aforementioned '375 patent, the RCC channel is distinguished from other channels in that it has an extended guard interval: during its time slot.and includes a DHPSK modulated'unique word of 8 bits. In order to minimize the possibility of aborting a call if the modern with the active RCC time slot fails and it becomes necessary to assign the RCC time slot to a different modem, time slots are assigned taith~n~an active modem eo that the synchronization (RCC) titrie~ slot ~ (referxed to as Rx0 where the four time slots ~ are ~ nuitibered Rx0 through ~ Rx3 , or F~l where. the ' t iirie s 1 of s are number Rx1 through Rx4), is the last to be'filled:
At start-up, all of modems 400 are assumed to be out of Synchronization with the base station's RF Q5 ms frame.
During time slot zero of the RF frame,~the base station transmits an RCC message on sdme RF channel which~'when received at the modular cluster,~will be decoded to~put the cluster into synchronization with the base station's RF
time slot frame for all RF channels . Until synchronization with the base station is achieved, each modem generates its own local RF frame sync. Cluster controller 300 next commands one o~ more ri~odems to hunt for the RCC transmitted by the base station on different RF tharinelW until the RCC

3 0 ie found or ali channels hate ~ been ~sea~thsd , If all channels have been searched and the RCC has not been found, the controller orders the search to begin again.' When a modem finds the RCC, the controller designates it ~ as the RCC modem and distributes its sync information to the rems:iriirig moderns via the frame sync signal over the backplane:

When the RCC slot search is undertaken, the channel number is used by the modem to digitally sweep a d=rest digital frequency synthesis (DDFS) local oscillator' illustrative) y over a 2 NC-?z range , There are two stages to a modem's acquisition ef the RCC channel, coarsely identifying the center frequency and finding the "AM hole", a portion of the RCC time slot where the number of symbols transmitted by the base station does not fill up the entire slot time. Coar9e frequency acquisition is based on to performing a Hilbert transform of the spectrum of the RCC
channel which yields a frequency correction for the local oscillator. This continues until the energy in the upper half of the spectrum approximates that in the lower half.
After coarse frequency acquisition is obtained, I5 illustratively to within an accuracy of 300 Hz of the channel center frecruency, a search is made for the AM hole.
A number of null signals are transmitted prior to the RCC
data. The AM hole is identified by monitoring the amplitude of consecutive received symbols. When twelve 20 consecutive null symbols are detected, an AM strobe signal is output by the modem to indicate the start of an RCC slot and the start of a TDMA frame. This coarsely synchronizes the baseband modem timing to the base station timing.
Synchronization need only be performed once since the radio 25 link is shared by all baseband modems in the modular cluster. The frame sync signal is sourced by one modem to all other modems in the cluster via a signal on the backplane wiring. During the search for the RCC if the AM
hole is found to within 3 symbol periods of the start of 30 frame marker, coarse acquisition is complete. The location of the unique word within the frame provides the modem with timing information that is used to bring the modem's local zrame timing to within one symbol timing of the base station. The modem is said to be in receive sync, Rx RCC, 35 as long as it continues to receive and decode the u_niaue word correctly. Once synchronization is achieved, 16PSK
modulation corresponding to 4 bits per symbol, QPSK

mod~ilatioh cotrespond3ng to 2 bits per symbol, or combinations of both may be employed.
While all modems are capable of receiving and synchronizing to the base station's radio control channel RCC, only one modem need do this since the modem which is selected by the cluster controller can share its timing with the other modems via the Frame sync signal. over the backplane wiring. The selected modem will source the Frame Sync Out signal and all other moddms will accept this 20 signal as the Frame Sync In signal.
When a modem goes on line, its modem processor DSP/MDM
instructs its DDF 4S0 (Fig. 3? to try to synchronize its local frame timing to the backplane signal. Each modem's DDF 450 timing is at this moment independent of every other 1S modem's timing. DDF 45o will initially be iristructed~by its D5P%t~M to look at the backplane signal for its synchronization.. If a backplane eynchronizatiori signal is present, the DDF will synchronize it9~frame sync signal to the backplane signal and then disconnect from the backplane 20 signal. The backplane signal thus does not ~eed directly into the modem's timing circuitry but merely aligns the modem's interhal start o~ recei~re frame signal. If a backplane synchxonization~signal lass not present, it is assumed that~the modem is the fizst one that has been 25 activated by the cluster controller, in Which case the cluster controller 300 will instx~tict the modem ~proc~seor DSPfMDM to look for the RCC and denc~ the modem's timing to ~.he cluster Controller.
Cluster controller 300 next instructs the modem 30 processor DSPIMDM to demodulate the DHPSK signal on the RCC
chai~el. The path for demodula.tiori o~ the ~IF signal received ~~rom block converter 600 may be traced to the modem IF modl~le where it is again band-pass filtered and down-converted to a 16 kilosymbol peg second information 35 stream. The DBPSK modulation that is employed on the RCC
channel is d one bit per symbol modulation_ 'The RCC
messages that are . received from the base station must be demodulated and decoded before being sent to the cluster controller. Only messages that are addressed to the cluster controller, hava a valid CRC~and are a burst type message or an acknowledgment message are forwarded to the controller. All other messages are discarded. An acknowledgment message signifies the correct reception of the previous RCC message. A message is addressed to the cluster controller if the Subscriber Identification number (SIDJ contained in the message matches the SID of the cluster.
Referring to Fig. 3, the 16 kilosymbol per second IF
signal from the IF circuitry of Fig. 4 is entered into ~1/D
converter B04, which is sampled at a 64 ICHz rate by a clock signal received zrom DDF chip 450. A/D converter 804 performs quadrature band-pass sampling at a 64 kHz sampling rate. Quadrature band-pass sampling is described, inter olio, in US patent 4,?64,940. At its output, converter 804 provides a sequence of complex signals which contains a certain amount of temporal distortion. The output of converter 804 (Fig. 8? is entered into R,YFIFO in DDF chip 450. Modem processor DSP/MDM reads the contents of R,~cFIFO
and performs a complex FIR filtering operation, which removes the temporal. distortion introduced by the quadrature band-pass sampling. After the removal of temporal distortion, the signals are demodulated by procssor DSP/MDM.
During the demodulation of RCC messages, AFC, AGC and bit tracking processes are perfomed by modem processor DSP/MDM to maintain the cluster in close synchronization with the base station. Transmit timing and power level adjustments axe made according to information received in the RCC message. Processor DSP/MDrI examines the demodulated data and detects the RCC message, a message Nhich includes link status bits, and 96 bits of data that 3~ includes the subscriber ID. Modem processor DSP/MDM also recognizes whether the subscriber ID belongs to one of the subscriber line circuits in the cluster.

ff, the fies~age ~ is fof this cluster,"'tti~' message is passed to clustet controllef' 300, which intez-prets~fhe RCC
command. Fot-vraxd FtCC messages include page mes9age, a call connect, clear indication 'and' self=test. ~ F2everee RCC
messages include call accept, clear request,'test results and call reqiteet: If the RCC fiessage is ~'a~ page message;
the cluster controller for G~ihich it '~is" designated will formulate a call accepted message to be transmitted back to the base station: From the call accepted tnesaage-the base station determines the timing offset between the cluster and the basal station and the base station'serids symbol timing update information to the cluster in the next RCC
message, which is the call connect message:
When the RCC message is a call connect message, the ' information therein instructs the cliiater controller what adjustrrient to make in symbol timirig~'~whether to adjust power level, fractional timing, and what channel to use for the remainder of the call (channel' htimber, TDM 'slot number, whether QPSK or 16PSK mod~llation ~ai~l be employed 'and what ~ the subscriber litre type isj:
The first modem which has found the RCC~is designated the RCC modem and its freqiienCy offset, ' receive gain control Rx AGC, and start of~.~f~ame information is Considered valid and may be dist~ibi~ted to theca other modems. The cluster controller recei~r~s'the channel riumber information and decides which modem is to be instructed to tune tip to the designated channel tci ~ handles the' remainder of the call.
The final ~ step toWa~c~ total" gynch~onization is the s~icceesful establishment of a voice channel. When a~voice channel is established ~ the laet'~ ' two 'synchronization parartieters become valid ~ the transitiit , symbol tuning and transmit sy'rnbol fractional timing, At this~point;'~should another modem be activated b~ the cluster~eontroller all of the necessary syrichronization iriibtM3tion 1g aztailable to be provided to the modem, making the establishment of a voice channel much. easier and quicker. A confidence level is calculated to evaluate the synchronization information of mach modem. The cluster controller updates the confider_ce level far each modem whenever there is a change in sync status, link quality, or receive AGC. The cluster S controller finds the modem with the highest confidence level and distributes its synchronization parameters to the remaining modems.
When a modem slot is commanded to enter the voice mode by the cluster controller, the modem. first attempts to 1o perform refinement . Ref i nement is the process of finely synchronizing the modem's transmit timing and power level to the base station's receive timing. The refinement process is controlled by the base station. The base station and the modem exchange special refinement bursts '15 until the base station terminates the refinement process when the predetermined degree of synchronization has been achieved. The modem then goes into normal voice operation.
If the base station aborts the refinement process, the modem will abort the call, go into the idle state and 20 inform the cluster controller. Refinement bursts are DHPSK
bursts formatted like RCC bursts. Refinement bursts are detected by the presence of a unique refinement ward. The modem is said to be in voice synchronization when the refinement unique word is detected with zero offset. The 25 Torward and reverse voice codewords have a voice codeword check byte attached for error detection. The modem will report a Loss of sync if 9 consecutive frames are received with voice codeword errors, at which time the cluster controller enters the recovery mode until a good codeword 30 is found or until the modem is commanded out of this mode and placed into idle mode.
Based upon the synchronization state, cluster controller 30o determines the validity of tile synchronisation parameters provided by the modem. The 35 table below shows which parameters are valid, based upon the current synchronization state of a modem. An ~X" in the box indicates that the parameter is valid.

-ls-Sync State Freq. Sy bcl Fract. TxPLC i=ixAGC SORE
Offset Time Time No sync Rx Sync(RCC) X ~ ~. X X

Tx Sync (RCC) X X X X

Voice sync X X X X X X

A 12-bit confidence factor word is computed by the modem to reflect the reliability of the synchronization parameters ascertained by the modern. The confidence factor word is assembled by concatenating the bite representing the voice and receive sync states .of the modem with bits identifying the link quality and receive AGC parameters,. as set forth in the following table:
Bit All~ration 11 10 9.:8 7..0 Field Vflicc R~i SyriC(RCC)Link Qit~lityRacAGC
Sync The single bits 11 and 10 identify, respectively.
whether or not the modem is in voice'sync and receive sync.
The two bits 9 and 8 identify' fo~ir ~ grsdations of link quality, while the 8 bits allocated to receive AGC level indicate the level of gain required:
MODEM MODULE: FIG: 3 The principle components of the modem module are shown in Fig. 3. The modem module" den support up to four simultaneous full duplex voice channels. The processing to dynamically handle all zunctions required by an active channel is partitioned bet~edn the'~cluster controller processor 320, (Fig: 1), and processors DSP/MDM and DSP/BB
in each modem lFig: 3).; The cluster controller handles higher level functions incliidiiig call set=kip, channel allocation and system control : ' ~ hloderii processor DSP/MDM

_17_ handles filtering, demodulation and routing of the incoming radio signals, formatting of data before transmission over the radio channel, and management of data flow between itself and baseband processor DSP/BB. Baseband processor S DSP/BB performs the computationally intensive tasks of voice compression and expansion and, in addition, handles the PCM bus interface. _Tn normal voice operation, modem processor DSP/MDM demodulates received symbols, packs them into a receive buffer and sends the voice data buffer to IO baseband processor DSP/BB for KELP synthesis and transmission to the subscriber line circuit over the PCM
bus. The modem processor DSP/MDM also accepts compressed speech from baseband processor DSP/BB, formats it into TDMA
bursts and sends it to the transmit pulse shaping filter 15 FIR contained in DDF 45o for transmission over the radio link. The modem operates on both QPSK and 16PSK
modulations (and DBPSK during refinement) under~control of the cluster controller.
Processors DSP/BB and DSP/MDM each have a dedicated 2o random access memory, SRAM/MDM and SRAM/BB, respectively.
However, modem processor DSP/MDM may request access to the random access memory SRAM/BB by activating its DMA HOLD
output and obtains such access using the data and address bus when the baseband processor DSP/BB activates its DMA
25 ACK output signal.
Assi~ment of Time Slots As described in the '3?5 patent, the RPU in the base station keeps track o~.the radio channels and time slots that are in use and assigns both the frerauency and the time 30 slot to be used on any call. A slot is selected which is in use by the least number of calls so that the call trafLic can be more evenly distributed across all slots.
However, in accordance with that aspect of the present invention which is concerned with minimizing the power 35 expended at the remote modular cluster, calls are assigned so as to ta) minimize the number of active modems and (b) control the number of conversations simultaneously using the same time slots, Further, while it is desirable to employ 16PSK modulation in every time slot. of a TDMA frame so that four complete calls can be accommodated, it is also important to permit QPSK calls to .be made and to keep an alternate RCC slot available for synchronization purposes.
Accordingly, the cluster and the base station must cooperate in the a9signment of tide slots to achieve these goals. The~cluster keeps track of available time slots and the type of modulation being employed on each slot. The cluster then assigns priority levels to each available slot and maintains a matrix of priority values which takes into account the factors that (a) an alternate receive time slot (generally the first time slot) on.some channel must be allocated for RCC synchronization, (b) adjacent time slots should be left available as long as possible so that QPSK
calls can be handled if neceseazy, and (c) time slots should be assigned to handle calls without, iz possible, 2t7 activating a powered-down modem or agaigning a slot that is already in use by a large number of other calls: The routine (in pseudo code) for achieving these goals is as follows Prlorilize Stot Routine 2 5 ~ t_ist 1 = all Idle time slots available on already active modems fnr y 6PSK calls and C~PSK calls;
Lfst 1 A = ail idle modems;
Ltst ~ = Llst time slots whose use will not exceed the thfeshhoid number of salts using the same time slot in the cluster;
3 0 ~ List 2A = Lfst 1 minus Llst 2;
J~st 3 = Lfst 2 minus lima slots on modems having ad(acent .time slots available (for OPSK calls);
Lfst 3A = List 2 minus time slots on modems not having ad)acent time slots available (lor ~PSK calls);

List 4 ~ List 3 minus time slots on modems not having a synchronization time slot available (slot 0 for the RCC);
List 4A = List 4 rninus time slots on modems having a synchronization time slot available;
~ Mark list 4 as first choice;
Mar',t list 4A as second choice;
Mark list 3 as third choice;
Mark list 3A as fourth choice;
Mark list 2 as fifth choice:
[ Mark list 2A as sixth choice;
Mark list 1 as seventh choice;
Mark fist 1A as eighth choice.
The above Prioritize Slot Routine is called whenever the cluster receives an RCC page message from the base station or is about to formulate a call request message to the base station. When the base station responds with a call conr_ect message containing the frequency, type of modulation and time slot to be used, the cluster once again performs the Prioritize Slot Routine to see if the slot selected by the RPU is still available. I~ still available, the slot is assigned to the call. However, if in the meantime the slot assignments have changed, the call will be blocked.
An example of how the Prioritize Slot Routine is executed under light and heavier traffic conditions may be helpful. Consider first the following table, which illustrates a possible condition of the modems and assigned time slots under light traffic conditions, just before one of the subscribers served by the modular cluster initiates a request for service:

Modem Time Slot 0 RCC 16t'SK

1 16P5K OPSK ~ QPSK

2 IOLE IDLI_ IDLE IDLE

3 ' ' ' ' r v r r.

r ' ' v r , v The above table indicates that modem 0 has slots 2 and 3 available, that modem ~. has slot 1 available and that modems 2, 3 , 4 and 5 are powe=ec~-doi~rri, all of their : time slots being idle. The cluster executes the Prioritixe'slot Routine which determines that slots 1, 2 and 3, in that order, ark the preferred slots to be assigned to handle the next 15PSK pall and that for Q~SK calls the preferred slots are 2 and 0, iri that order. The clustsi- then sends~a "call request" signal to the base station using the RCC word and iri~ornis the b~9e station of Ehis pre~erence~. In the table below the rationale for etch of the priorities is set forth Slot PriorityRationale Slot Priority,Raiionaie lfiPSK Qi'SK

1 No new modems to power 2 (Same reason up; as no hcreas~ iri fn~x ~ 18PSK for slot dctlvity; slots t7PSK slots 2,3 kept avaiiahie;

ACC slot avaiiabie.

2 New flPSK call requires0 Requires new new ~

modem powet up. ~ modarri power up 2 5 0 [ Requires new modem power up. I

Another example may be helpful. Consider the status of time slots among modems o-S under somewhat heavier traffic conditions, as shown in the following table, wherein empty boxes indicate idle time slots:

10 Slot PriorityRationale Slot PriorityRationale i IfiPSK QPSK

3 No new modems to power 2 only choice up;

max slot activity avoided:

(3PSK slots 2,3 kept available;

RCC sloe kept available.

No new modems to power up;

max slat activity avoided;

RCC slot kept available, BUT, new ~PSK call requires new modem power up.

1 No new modems to power up;

C~PSK slots 2.3 kepi available:

RCC slat kept available, BUT

max slot activity exceeded.

1 S 0 No new modem power up;

QPSK slots 2.3 keptavaitable;

BUT both max slot activity exceeded and RCC slot not kept available.

UplDown Converter 600 In Fig. 5, forward channel radio signals from the base station are received in up/down converter ~00 from the base station via duplexer 800. The received RF signal is passed 20 through low-noise amplifier 502, band-pass filtered in The slots to be assigned are set forth in the following table together with the rationale:

filter 503, subjected to attenuation in attenuator 504 and applied to mixer 505, where it is subjected to a first down=conversion from the 450 MHz RF band or the 900 MHz RF
band to an IF signal in the 26 - 28 MHz mange: The IF
signal~ie passed through amplifier 506, bandpaes !filter 507, amplifier 508 and attenuator 509 and applied to eplitter circuit 510 for delivery to the common pool of modems.
The reverse channel modulated IF signals from the common pool of modems are applied to combines 520 of block up/down converter 600 at the upper left-hind corner of Fig.
5., subjected to attenuation in attenuator 521,~band-pass filtered in band-pass filter 522, amplified in amplifier 523 and applied to mixer 525; where the signal is up ~ converted to an RF .signal .in either, the 450 Mfiz RF band or the 900 NI~I2 RF band . The RF signal is then ~~ eiibj ected to atteni.iation in attenuator 526, barid~~a80 filtered in band pass filter 527, amplified in amplifier.~528 and applied to broadbarid highpower amplifier' ?00 which 'ends the signal on to duplexes 800.
Mixers 505 and 525 receive their reference frec~lencies from RxPLL phase locked loop circuit 540 ahd TxPLL phase lock loop circuit 550, respect~vel.~:~ hhaae locked loop 540 generates a 2.36 MHz recei~ie'ldcal oecil~ator'signal from the signal provided by 21.76 MHz master. clock 560, divided by 2 and then by a . The 1:36 ~'~1F3~ ~ dignal furnishes the referende input to phase comparator~PC~~~The other input to the phase comparator is provid~c~.h~ ~ feedback loop which divides the output of circuit 540 byW and then by 177.
3 o Feeding back this signal to the phase ~ cotnparator causes the output of circuit 540 to have a frequency that is 354 times that of the reference input, or 481.44 1~H~. ~ The 481.44 M~iz output of receive phase locked loop RxPLL,540 is applied _ as the local oscillator input to. down-conversion mixer 505.
The 481.49 i~-iz output of circuit 540 is also applied as the reference input for eircuit~550, so that circuit 550 is frequency. slaved to circuit 540.r Circuit 550 generates the transmit local oscillator signal, which has a frequency of 481 .44 Mliz + 5 . 44 hluz, i . a . it has a frequency that is offset 5.44 rlHz higher than the receive local oscillator. For circuit 550, the 21.'76 MHz signal S from master clock 560 is divided by 2, then by 2 again, to make a signal having a frequency of 5.44 MHz, whi;.h is presented to the reference input of phase comparator PC of circuit 550, The other ir_put of phase comparator PC of circuit 550 is the low pass filtered difference frequency l0 provided by mixer 542. Mixer 542 provides a frequency which is the difference between the receive local oscillator signal from circuit 540 and the VCO output signal of circuit 550. The output of circuit 550, taken from i is internal VCO is a frequency of 481 .44 lrlHz + 5 .44 15 M_tiz .
Fia. ~ IF Portion of Modem Fig. 4 shows the details of the IF portion of the modem board in relation to the digital portions (whose 2o details are shown in Fig. 3). At the lower right hand side of Fig. 4, the receive IF signal from BSUD 600 (Fig. 1) is applied through the lower terminal of loopback switch 402 to 4-pole band-pass filter 404 whose a passband extends from 20' to 28.3 MHz. The output of filter 404 is then 25 ampli=ied by amplifier 406 and down-converted in mixer 408 which uses a receive local oscillator signal having a freauency of between 15.1 MHz and 17_4 MHz. The output of mixer 408 is amplified by amplifier 410, and filtered by 8-pole crystal filter 412 whose center rrequency is lo.e64 3o MHz. The amplitude of the signal at the output of filter a12 is controlled by AGC circuit 414. The gain of AGC
circuit 414 is controlled by the VAGC signal from DDF ASIC
450 of Fig. 3. The output of AGC circuit 414 is then down-converted by mixer 416, using a re=erence frequency of 35 10.88 t~giz, to produce a 16 kilosymbol per second sequence of IF data, which passes through amplifier 41B and is delivered to the Rx IF input port of the circuitry of Fig.
3.
Still referring to Fig. 4, the circuitry of Fig. 3 generates a receive local oscillator signal, Rx DDFS, which is filtered by 7-pole filter d32; then ~amDlified by amplifier 434. The output of amplifier 434 is again low pass filtered by 7-pole filter 436, ~whb9e output is amplified by amplifier 438, then mixed with the received IF
radio signal in mixer 408.
At the- right hand side o~ Fig. 4,~ amplifier 420 receives a master oscillator signal having a freqdency of 21.76 Mliz and applies the 21.76 MEiz signal to splitter 422.
Orie output of gplitter 422 i5 doubled in ~ frequency by . frequency doublet 424, twhose t~utpttt~ is clipped in clipper . , 426 and shaped to TTL by gate 428, and inverted again by gate 430. The output of gate 430 is applied to the inset circuitry of Fig. 3 as a 4352 i~iz reference clocl~ signal.
The other o~itput of sputter 422 is passed through amplifier 454 and attenuator 456 arid applied~to the local oscillator IL? input of mixer 444. Mixer 444 ~tp=Converts the modulated IF signal, Tx DIF,'from ineet~Fig. 3 after it has been locJ pass filtered by filter 440 and attenuated by attenuator 442.
The output of gate 428 also connects to the input of inverter 460, whose output is frequency divided by 4 by divider 462 and then uded as a local oscillator to down convert the output of AGC block 414 in mixer 416.
A loopback function is~ prodided by the serial combination of sviitches 450 and 402 and diimm~ load 458 so so that signals from the Tx DIf ouput ~o~ the inset reference to the circuitry of Fig. 3~may be looped back to its 1'~x IF' input for test purposes when training sequences are applied to compensate for signal distortions; such as that occuring within crystal filter~412.
Still referring to Fig. 4, the circuitry of Fig. 3 provides a modulated IF output, at a frequency of 4.64 to 6_94 t~iz, which is filtered by 7-pole filter 440 and attenuated by attenuator 442. The output of attenuator 442 enters mixer 444, whAre it is up-converted to a frequency in the range of 26.4 MHz to 28.7 MHz. The output of mixer 444 enters amplifier 446, whose output is filtered by 4-pole bandpass filter 448 and applied to switch 450, which is controlled by the loop-back enable output LBE of the inset circuitry of Fig. 3. When loop-back testing is conducted lead LBE is energized causing switche 450 to connect the output of filter 448 to the tap of dummy load 458 and energizing switch 402 to connect the bottom of dummy load 35s to bandpass filetr 404 for loop back testing. Loop-back testing ~s used with modem training sectuences to compensate for signal distortions within crystal filter 412 and in other parts of modem circuitry.
When loop-back testing is not being conducted, the output of switch 450 is applied to programmable attenuator 452 which may be programmed to one of 16 different attenuation levels by the transmit power level control signal, Tx PLC, from the inset circuitry of Fig. 3. The output of attenuator 452 comprises the Tx IF PORT signal that is applied to the upper left-hand side ~of the HSUD, Fig. S.
Fia 6 RxDDS - Genaration of Dicrital IF for Receive Channel s The exact intermediate frequency to tune to to for a receive time slot is determined when the cluster controller CC lFig. 1) tells the modem which RF channel to search for the RCC message. During reception of the RCC message, fine tuning of frequency and timing is performed. The fine 3o tuning is accomplished at the IF level using phase accumulator circuitry in the RxDDS circuit of the modem's DDF (Fig. 3), shown in detail in ig_ 6. The IF
frea_uencies are generated by repetitively accumulating, at the frequency of a digital IF master clock, a number that represents a phase step in the phase accumulator. Modem processor DSPj~iL7~t, via DSP/MDM data blt9 (Fig. 3) ; initially furnishes ~ 2d-bit number f to~ the ~xDDS~ ci=ctiitz-y. This number is related (as Will. h2reii~after be ~de~cribed) to the desired IF frequency required to demodulate ~. particular incoming signal on a slot ~y slot basis . ~' The 2~-bit number _F is loaded into one of the focir registers R16-Ft45 at the lefthand side of Fig. 6. Iri the illustrative ~eiabodirnent where a 16-bit processor is employed, the 24-bit frequency number _F is supplied in 16-bit and~8-bit segments, however, to simplify the drawing, ~the~~24-bit number is shown as being entered into a composite 24-bit register: Each of registers R16-R46 ie dedicatQd to one of the receive time slots. Sihce the RCC message is expected in the first Rx time slot, the 24-~iit number ie loaded into the corresponding one of the four registers R16.-R46, e.g., register R1&. At the appropriate slot count for the first Rx tune slot , ~ register ~R16' s contents ~ are presented to synchronization register 602, whose outpu~~ ig then presented to the upper input of adder f04:~ The output of adder 604 is connected to the input of accllmtilator register 606. The lower input of adder 60~ 'receives the output of register 606 . Register 606 is clocked by the 21..75 MHz DDS
cluck and its contents are, accordingly, periodically re-entered into adder 604: ~~~ ~ .
The periodic reentry of the contents of register 606 into adder f04 causes adder 604 to count up from the number F first received from register R16 _~' Evei-itually, adder 606 reaches the maximum number that'it~cari hold; it overflows, and the count recommences from s 1b~1~ residual va111e . This has the effect o~ multipl~ting~ the ~~DDS master' clock frequency by a fractional value; to make a receive IF local oscillator signal having that fractionally' multiplied frequency, with a '~sawtooth" wave~oim. Since register 506 is a 24-bit register, it ovexflotas when its contents reaches 2~4. Register 606 there~Ore effectively divides the frequency of the DDS clock by ~Z~~ and simultaneously multiplies it by F. The circui t is termed a 'phase accumulator" because the instantaneous output number in register 606 indicates the instantaneous phase of the IF
f reqtzency .
The accumulated phase from register 606 is applied to sine approximation circuit 622, which is more fully described in U. S. Patent No. 5,008,900, "Subscriber Unit for Wireless Digital Subscriber Communication System."
Circuit 622 converts the sawtooth waveform of register 606 into a. sinusoidal waveform. The output of circuit 622 is resynchronized by register 524 and then applied to one input of adder 634, in a noise shaper consisting of adder 634 and noise shaper filter 632. The output of filter 632 is applied to the other input of adder 634. The output of adder 634 is connected to the data input of filter 632 and to the input of resynchronizing register 636. This variable coefficient noise shaper filter 632 is more fully described in U. S. Patent 5,008,900. The noise shaper characteristics are controlled, on a slot by slot basis, by a 7-bit noise shaper control field which is combined with 2o the least significant byte of the frequency number field received from the DSP/MDM HUS. The noise shaper may be er_abled or disabled, up to 16 filter coefficients may be chosen, rounding may be enabled or disabled, and feedback characteristics within the noise shaper may be altered to allow the use of an 8 bit output DAC (as shown in Fig. 6) or a 10 bit output DAC (not shown) by asserting the appropriate fields in the noise shaper control field for each slot, in the tour registers RN16-RN46. Multiplexes MPX66 selects one of the four registers RNI6-RN46 for each slot, and the resulting information is resynchroni,~ed by register 630 and presented to the control input of noise shaper filter 632.
Fia 7, DDF - Digital IF Modulat~.on The exact IF frequency for any of the transmit channels is generated on a slot by slot basis by the TxDIF

circtiitrji in the modem DDF block (r ig, 3 ) , 'Which is shown in detail iri fig: 7: On a shot by ti~.ot basis; an FIR
transmit filter (not shown) shapes the 16 ltilo9ymbol per second complex (I, Q) information signal data stream received from the modem DSP that will modulate each of the genie=ate IF frequencies. The information 'signal data stream must be shaped so that it can be transmitted in the limited bandwidth permitted in the assigned RF channel.
The initial processing of the information signal includes F2R pulse shaping to reduce the bandwidth to +j- 1o KHz.
FIR pulse shaping produces in-phase and qLtadrature cornDOnents to be used in modulating the~generateci IF.
After pulse shaping; sevezal stages of linear interpolation are employed. Initial interpolation is performed to increase- the sample~rate of the baseband signal, tollocaed by additional ~interpolations;~ which ultimately increase the sample rate and' tie ~ freq'tiency at Gihich the maul spectral replications~~occux ' to 21. 76 MHz .
Suitable - interpolative teGhriiqtiee ~ aze ~ described, for 2d example, in "Multirate Digital Signal ~roce~aeing" by Crochiere and Rabiner; Prentice-Hall i993.~ The in-phase arid quadrattlre components of the shaped and interpolated modulating signal are applied td'' the' I ~ai~d Q inputs of inixera MXI arid MXQ of the '' modulator' portion of the circuitry sti~wn in Fig,?.
At the left-hand side o~ Fi~v 7°is the circuitry f or digitally generating the transmit IF frequency: The exact intermediate ftequenc~i to be generated is deterntined when the base station tells cli.~.stcz cohtrbllet' CC (Fig. 1) which 3o slot number and RF channel to as~zgri~td a time slot supporting a particular conversatiori~ A 24=bit 'number which identif ies the IF frequency ~ to a h~gti' degree of resolution (illustratively +/- 1.3 Hz), is supplied by processor DSPjMDM (Fig. 3)' over the D~P/MDM data bus. The 24-bit frequency number is registered in a respective one of 24-bit registers R17--R47. Registers R17-R47 are each dedicated to a partictll~.r orie of the four Tx dine. slots.

A slot counter (not shown) generates a repetitive two-bit time slot count derived from the synchronization signals available over the backplane, as previously described. The time slot count signal occurs every 11.25 S ms, regardless of whether the time slot is used for DPSK, QPSK or 16PSK modulation. When the time slot to which the frequency will be assigned is reached by the slot counter, the slot count selects the corresponding one of registers R17-R47, using multiplexes MPX7I, to deliver its contents 1o to resynchranizing register ?02 and ultimately, the upper input of adder 704. Accordingly, a different (or the same?
24-bit IF frequency can be used for each successive time slot. The 24-bit frequency number is used as the phase step for a conventional phase accumulator circuit 15 comprising adder 704 and register 706. The complex carrier is generated by converting the sawtooth accumulated phase information in register 706 to sinusoidal and cosinusoidal waveforms using cosine approximation circuit 708 and sine approximation circuit 722. Sine and cosine approximation 20 circuits 708 and 722 are more fully described in U_ S.
Patent No. 5,008,900.
The outputs of circuits 708 and 722 are resynchronized by registers 710 and 724, respectively, and applied to mixers 712 and 726, respectively. The outputs of mixers 25 712 and 714 are applied to resynchronizing registers 714 and 728, respectively. Mixers 712 and 714 together with adder 716 comprise a conventional complex (I, Q? modulator_ The output of adder 716 is multiplexed with the cosine ZF
reference by multiplexes 718, which is controlled by signal 30 DIF_CW_MODE from an internal register (not shown) of DDF
ASIC 450 (Fig. 3). The oueput of multiplexes 718 is resynchronized by register 720, whose output is connected to a variable coefficient noise shaper circuit, of a type as previously described in eannection with Fig. 6, 35 consisting of adder 734 and filter 732, with associated control registers RN17-RN47, control multiplexes MPX76, and resynchronizing registers 730 and '736.

This noise shaper compensates for the quantization noise caused by the finite resolution (illustratively +/-one-half of the least significant bit) of the'digital to analog conversion.' Since quantization noise ie uniformly distributed, its spectral characteristics ~pp~ax similar to white Gaussian noise. The noise power that falls within the. transmitted signal bandwidth, which is relatively narrow compared to the eacnplirig rate, can be reduced in the same ratio as the desired bandwidth bears to~the sampling rate. For, example, assuming the modulating signal has a kHz bandwidth and the darriplin~ rate ie 20 MHz, the signal to noise ratio improvement would be 1000:1 or 60 dB.
The noise shaper characteristics are controlled, on a slot by slot basis, by a 7-bit noise shaper control field as 15 described in connection with Fig.'s.
Fia 8 Bystem Clock Generation It is an important aspeot of our invention that voice quality is maintained despite the physical 'separation between the base station and the reMote cluster. Timing 20 variations between the base station and the cluster, as well a,~ timing variations in the decoding and encoding o~
speech signs? s, will lead to various forms of voice o_uality degradation, heard as extraneous pope~and clicks in the voice signal. In ~.ccordance with oux invention,~strict.
~5 congruency of timing is assured by synchronizing all timing signals, especially those used to clock the A/D converter, .
the voice cbdecs on quad line~modules 101-i08, as well as PCM highways 200 and 500, ta~the forward radio channel.
Referring to Fig. 8, the principal clocks used in the system are derived from a 21.76 MHz oscillator (not shown), which provides its signal at the l~fthand side of ~'i9- 8~
The 21.75 MHz signal is used to syncHronize a 64 kHz sample clock to symbol transition tirries in. the received radio signal. More particularly,,~the 21:76 hgiz signal is first divided by 6.8 by fractional elock~divider circuit Bo2, which accomplishes this fractional division by dividing the 21.76 Mhz clock by five different ratios in a repetitive sequence of 6, B, 6, B, 6, to produce a clock with an average freauency of 3.2 biHz.
S Programmable clock divider 806 is of a conventional type and is employed to divide the 3.2 MHz clock by a divisor whose exact magnitude is determined by the DSP/MDM.
Normally, programmable clock divider 806 uses a divisor of 50 to produce a 64 kHz sampling clock signal at its output.
The 64 kHz sampling clock Qutput of divider 806 is used to stxobe receive channel A/D convertor 804 (also shown in Fig. 3). A/D converter 80a converts the received IF
samples into digital form, for use by the DsP/MDM
processor.
1S Still referring to Fig. 8, the DSP/MDM processor acts as a phase/frequency comparator to calculate the phase error in the received symbols from their ideal phase values , using the 64 kHz sampl ing clock to determine the moments when the phase error is measured. The DSP/NmM
processor determines the fractional timing correction output ftc. Fractional timing correction output ftc is applied to programmable divider 806 to determine its divide ratio. If the 64 kHz sampling clock is at a slightly higher frequency than the symbol phase transitions in the received IF signal, the DSP/MDM processor outputs a fractional timing correction that momentarily increases the divisor of divides 806, thus extending the phase and lowering the average frequency of the 64 kHz sampling clock output of divider 806. Similarly, if the 64 kHZ sampling clock frequency is lower than the frequency of the received symbol phase transitions, the divide ratio of divider 806 is momentarily reduced.
The 6a kHz sampling clock at the output of programmable clock divider 806 is frequency-multiplied by 3 5 a zactor o= 64 , using a conventional analog phase locked multin_lier circuit 808, to make a 4.096 MHz clock. The 4.096 MHz clock is.deliver?d to time slot interchangers 310 and 320 (see Fi'g. ~.)~: Time slot int~rchangers 3I0 and 320 divide the 4 . 096 MFiz clock by two, to form two 2 _ 048 MFiz clocks, which are used by the voice codecs on line modules 101-108 (Fig. 1) to sample and convert analog voice inputs to PCIr1 voice. Providing a commonly derived 2.048 t~iz clock to the voice codecs which is in eync~roinism with the radio-derived 64 kHz sampling clock assures that there will be no slips between the two clocks. As mentioned, such slips would othervtise result in audible voice quality to degrad~tions, heard as extraneous pops and clicks in the voice signal.
The foregoing has described au illustratitre embodiment of our invention. Further and other embodiments may be devised by those skilled in the art without, however, departing fxom the spirit and~scDpe of our invention.
' Among such variations, for example, would be increasing the sampling rate on the PCM buses to make~possible the handling of both PCM speech and signalling on the same time slot interchanges without degrading the quality of the PCM
24 speech coding. In addition, the circuitry of the ASIC
transmit pulse Shaping may be modified to permit forms of fiodulation other than PSK, such as QAM and FM,'to be employed_ Lt should be undetstood that although the illustrative embodiment has described'the use of a common ~ pool of freqtisncy '' agile 'modems for serving ~ a group of remote subscriber stations iri a modular chidter, a similar group of frequency agile modemd'may be employed at the base station to sl~pport communications between the cluster and any number of remote subscribed stations. 'Lastly, it should be apprciated that a transmission medium other than over the air radio, such as coaxial cable or fiber optic cable, may be employed.

Claims (3)

CLAIMS:

1. A subscriber cluster unit for a wireless telecommunication system which provides a wireless interface with a base station for a plurality of subscriber units comprising:
a plurality of frequency agile modems for processing wireless communications with the base station;
a plurality of subscriber line circuits, each for providing a telecommunication connection with a subscriber unit; and a control processor that assigns a modem for each communication between the base station and a selected subscriber unit which is coupled to one of said line circuits and associates said one line circuit with said assigned modem for that communication whereby a subscriber unit coupled with any of said line circuits can communicate with said base station via any of said modems.

2. The invention according to claim 1 wherein wireless communication with said modems is by means of a predefined time slot format such that each communication is communicated in a select time slot or set of time slots whereby the control processor can assign one of said modems for first and second communications between the base station and first and second subscriber units, respectively, which are coupled to respective first and second of said line circuits and associate said first and second line circuits with said assigned modem for facilitating concurrent communication of a plurality of communications via each modem.

3. The invention according to claim 2 wherein said processor tracks and assigns a priority to all available time slots of said modems and selects one of available time slots based on the assigned priority for each communication between the base station and a selected subscriber unit.