CA2454103C - Implantable signal amplifying circuit for electroneurographic recording - Google Patents

Abstract

An implantable microvolt-level signal amplifying circuit may be used for resolving electrical signals generated by nerves in the presence of larger amplitude signals generated by muscles, the heart, or external noise sources. The circuit has a low-noise, high Common Mode Rejection Ratio (CMRR) preamplifier, followed by a cascade of stages, which provide filtering and further amplification of the neural signal. The band-pass amplifying circuit can also present high Power Supply Rejection Ratio (PSRR). The output is offset-compensated by a DC restoration stage. Nerve protection circuitry minimizes or blocks DC current flow through the input terminals in the event of semiconductor failure in the preamplifier. The circuit may be incorporated onto a common monolithic circuit with follow-up circuitry for controlling Functional Electrical Stimulation (FES) devices.

Description

IIIZP~:ANTA~.E SYG1~1AL ~11~!IPL.JFI'Il~G CIRCUIT
~~~~CT~~~' ~CrAl~. ~.C~I~Cy This application is divided from Canadian Patent Application Ss~rial hiumber 2,32,500, filed April 19, 2002.
1o Technical F'icld This invention is related to tile amplir~catior~: of ne=aral signals recorded using nerve cuff electrodes or other implantable nen~re electrodes. In partic~xla:r, it relates to an implantable amplifying circuit. Specific embodiments of the invention provide gain and filtering and can serve as a front-end amplifier between nerve cuff ele;e;trode:> and follow-on implanted circuitry.
~ck~ro~a~d As shown by I~. 1~. StrangE; and ~. A. f IIo'wfer, "Gait phase inf~r~a~2ation 1'~°evided by Se~aso~y Nerve Activity ~u~iug T~alki~ag: Applicability as State C~nt~olle~
Feedback f~~
Fa~'.~ ", IEEE Transactions on Biomedical Engineering, vol. ~6, no. 7, pp. 797-X09, July 1999, the natural sensory signals recorded by nerve c~z-~f Electrodes can be used as a reliable source of feedback hr closed-loop control of ~'unctcio~~al Electrical Stimulation (FES~ devices, As other e:~amples, bladder pressure can be measured to control micturition, or sensory feedback from touch sensors i:r~ the ;skin can be recorded for improved activation of paralyzed limb muscles; see, fc~$ example, T. Sinkjaer et. al., "~'lectroa~euro g~°aphic (FNG,) Signals.fro~c l~~t~adua~al S'3 I~o~sal Sacral Neave Roots ira a Patient ~~ith Sup~aSaci°al Spij~al Coa°a' Injury ", Proceedings of the 5'h Annual Conference of the International Functional Electrical Stimulation Society" pp. 361-3~4, I3enrnark, June 2000; and 1. I~. I-Iaugland and J. A. I-Ioffer, "Slip Infra~mation Provided by Nerve Cuff ,Signals: Application in Closed-hoop Control of Functional Electrical stimulation';
IEEE Transactions on Rehabilitation Engineering, vol. :?, no. 1, pp. 29-36, larch 1994, respectively.
Recording nerve cuff electrodes were introduced as a research tool in the 1970's and the first human trials started in s:he 1990's. See J.,~. I-loffer and h~.
I~allesoe, g'I-low to Ilse Nerve Cuffs to Stimulate, record or li~odulate Neural Activity ", pleural Prostheses for Restoration of Sensory and IVtotor Function, ''hapter 5, C',RC" Press, 2000.
Several different nerve signals are needed to control a pa-ostl~etic device;
see LJ.S. Patent l~To. 4,750,499 to I~offer for a "Closed-~ocp, Implanted-Sensor, Functional Electrical Stimulation System for Partial ,restoration c~i~ll~otor Functions ". The signals picked up by the nerve cuff electrodes have been recorded mainly using commercially available components located externally to the body, which consume ~~ lot of area and a lot of power. Such recording setups require long leads that course transcutaneously.
This increases the risk of infectio~a for the patient. Long cables also- increase the risk of wire breakage and reduce portability. The added resistance and capacitance of long cables can contribute to signal shunting and greater pick-up of unwanted) signals (e.g.
stimulation 2o artifacts and power-line influx noise.
The biggest problems in recording neural signals using nc;rve cuff electrodes are the very low signal amplitude and lo~~~ signal-to-noise ratio (~/N~ that are characteristic of these signal sources. When dealing ;with signals in the ~Y~T range, minimization of the preamplifier noise is of extreme importance. Binder such conditions, it is useful to passively boost the signal amplitude with are audio transformer before it encounters the first active amplification stage. This has been a common practice in recording neural signals. See, for example, ~. l~/I. l~rikolie et. al., "Instrumentation for ENC and ~'lI~IC
recordings in FE.S Systems'; IEEE Transactions on l3iorraedical Engineering, vol. 41, no.
7, pp. 703-706, July 1994. Tl;.e smallest audio transformers iai the market have an area of around 1 cm2. Since several transformers would be needed in a mufti-channel recording device, this solution is impractical.
Decently, ~1. Donaldson et aI, described arr implantable, single-channel cuff recording system, fabricated using discrete components, which uses no input transformer.
See N.
I~onaldson et al., "An lr~t~:~lanta~le Te~emete~ ~~~° Long- T~~na Electa~orceurographic lZer~o~dtngs are Ahimals and ~~umaa~s "y Proceedings of tl~e ~th annual Conference of the International Functional Electrical Stimulation Society, pp. 37S-351, Denmark, 3une 2000. This design, although useful for research purposes, leas limitations in its clinical 1o applicability due to its si a and power requirements, and is not suitable for clinical applications where several recording-channels are needec~l.
Various designs of custom-integrated amplifiers for neural activity recording have been presented throughout the years. however, these designs have generally dealt with neural source voltage amplitudes at least two orders of magnitude Iarger than the signals that are typically recorded using nerve cuff electrodes.
K. Papathanasiou and T. L,ehmar~n, "An Ian~lantable C~l~~,~ Sig~eal Conditiona~ag System foal l~2ecording l°~7erve ~'igrczls with Cuff' Electa°ode.~ '"9 Proceedings of the IEEE
2o International Symposium on Circuits and Systems, pp. V Z~1-254, Switzerland, May 2000 discloses an integrated amplifier. There is no mention of noise levels and the amplifier gain is of the opera-loop type. open-loop ampliW ;rs present several problems associated with their high gain. Two of the main problerras are potential saturation due to intrinsic amplifier offset and muscular activity (EMG) of much higher amplitude than the nerve signals of interest, requiring the amplifier to utilise spE;cial circuit techniques to compensate for these effects. Furthermore, FES system; based on closed-loop feedback control typically require amplifiers having variable gain.
There is a need f~r an amplifying circuit that is suitable; for use in implantable devices.
3o There is a particular need for such a circuit which carp. p~°ovide several externally _L~..
controllable gain levels, as rewired for the development of I:ES systems based on closed-loop feed-back control.
Summary of tie ~nve~ti~~
In accordance with one aspect of the invention, there us provided an implantable amplifying circuit for recording signals generated by a ~~er~~e and detected by a pair of electrodes in eontact with 3:he nerve. The amplifying circuit includes a preamplifier having a pair of inputs for rc~~eiving signals vfrom the pair of electrodes.
The preamplifier 1o includes a differential pair of loin input current I'JI~S~E'I' transistors that serves as a first input protection circuit to limit current flow through the nerve and the electrode.
The amplifying circuit further includes a common signal line that is coupleable to the nerve and a second input protection circuit disposed in series with the common signal line including a parallel resistor/capacitor combination to Iirrlr:'~ current flow through the nerve and the common signal line.
The preamplifier may include a pair of bipolar transistors and a current mirror that are driven with differential outputs of the pair of IiiIC~SfEI, input transistors.
The 2o preamplifier may produce a single-ended nerve output si gnal.
The second input protection circuit may comprise a resistol° ire parallel with a series of one or more capacitors. The protection circuit may be connected between the common signal line and a reference voltage terminal that provides a virtual ground terminal in respect of the implantable amplifying circuit.
The implantable amplifying circuit may fu~~ther comprise at least one amplifier stage connected to an output of at the preamplifier that produces an amplified nerve output signal.

3~

The circuit may further comprise a ~C restoration circuit having an input connected to an output of the at least one amplifier stage.
The amplifier stage may include a band-pass amplifier.
The band-pass amplifier ma~~ comprise a plurality of high-pass filters and a plurality of low-pass negative-feedback amplifiers alternatingly cascaded with the high-pass filters.
The band-pass amplifier may include a programmable-gain band-pass amplifier.

Each low-pass negative-feedback amplifier may comprise a plurality of series-connected resistors forming a resistor ;string connected between an output terminal and a voltage reference terminal of the low-pass negative-feedback amplifier and a plurality of selectable switches wherein a terminal of each selectable switch is connected to an input is terminal of the low-pass negative-feedback amplifier and ;mother terminal of each selectable switch is connected to a nodal point between the resi:>tors in the resistor string.
Each low-pass negative-feedback amplifier rnay compri:>e an outp'at stage in a I9arlington configuration operating as a class A» an2pli~er wherein a bias circuit supplying a bias 2o current to the output stage al;7o carries signal current.
The prosgammable-gain band-pass amplifier may have a frequency range between approximately 900 Hz and 9 kl-Iz for 5 ~,~1~e~1~ input neuoal signals.
25 The implantable amplifying circuit may have an equivalent input noise at 3 k~Iz that is lower than 0.6 q~J~S, and/or a Ci~IRFt higher than 90 dat 250 ~Iz and/or a power consumption lower than ~~ mW.
The preamplifier may have a~ input IW current that is lower than 1 nanoamp.

The implantable amplifying circuit may be powered by an RE telemetry link or by a battery.
The implantable amplifying circuit may have a 1'S1Z1Z higher than ~5 d13 at 3 kl-iz.
Tile embodiments described herein provide a low-noise signal band-pass amplifying circuit for ENCs recording using nerve cuff electrodes or other implantable nerve electrodes. The circuit may be used in implantable devices. The devices may be 1o implanted in close proximity to a nerve cuff electrode or other electrode which detects a bioclectrical signal. The band-pass amplifying circuit provides the gain and filtering in order to serve as the front-end amplifier between a nerve cuff electrode and the follova-on implanted circuitry. The circv~it may be incorporated on a common monolithic integrated circuit with follow-on circ~aitr~y.
The band-pass amplifying circuit may be small in area and may have low power consumption. This makes the circuit suitable for clinical applications where multi-channel recording is needed. The band-pass amplifying circuit may be constructed in a single monolithic integrated circuit without the need of deny external components. The 2o gain may be selectable and may be easily changed usi~:ag swi9:ches that select different combinations of resistor ratios. 'fhe variable gain may be Used in FES systems based on closed loop feedback control to accommodate different ENG recording ranges (for example, natural sensory traffic information and compound-action-potentials elicited by electrical stimulation) into tl~e sarr~e output voltage ra~:lge. The output signal may be digitized using implanted circuitry. The band-pass amplifying circuit has high CI~/II~I~, when used with nerve cuff electrodes, high 1~SR12, and is stable in the presence of stimulus artifacts elicited nearby by electrical stimulation.

The circuits described herein provide a systean in which signal;; are picked up by a nerve cuff electrode, passed throul;h nerve protection circuitry, and then amplified by a low-noise, high-CMRR, high hSI.aIZ preamplifier. The amplified signal may be further band-pass filtered using two cas~;a,des of high-P~I~IZ, first order band-pass amplifiers. The output is preferably offset-compensated by a IBC restoration stage where the stage following the band-pass amplifying circuit is nonlinear. i'~he band-pass amplifying circuit may be fully integrated.
The amplifying circuit can, l~r example, ~be _cowered by an I~F telemetry Link, It can also 1o be powered by a battery or other known means for supplying els~ctrical energy.
The general specifications which are desirable in an irnplantable band-pass amplifying circuit for EI~G recording cuff electrodes can be summarized as follows:
~ The filtering shall be second order or higher. The pass frequency range shall prefera'oly be between approximately 900 IIz and 9 kHz, for S g~~lpeak Input neural S~gnalS.
The equivalent input noise at 3 kI~z shall preferably be lower than 0.6 ~~31T1S~
~ The C1VIRR at 250 FIz shall preferably be higher than 90 d~.
~ The power co~asumption shall preferably b a lower than 12 m°~1.
~ If the implantable device is going to be powered by an I~F telemetry link, then the hSI~.R of the band-pass amplifying circuit at 3 kHz shall preferably be higher than 85 dI3.
brief escri~tl~n ~f 1)rawln In Figures which illustrate non-limiting embodiments of l:l~e invention:

FIG. 1 is a block diagram of a band-pass amplifying circuit according to a first cmbodiment of the inventioa~;
FIG. 2a and 2b are circuit cliagrar~is showing two altenaative architectures for the band-pass amplifying circuit;
FIG. 3 is a circuit diagram for the prcamplifier circuit based on. a "Differential Difference Amplifier" (DDS-1);
l0 FIG. 4 is a circuit diagrarr~ of a high-pass filter circuit component of the band-pass amplifier;
FIG. 5 is a circuit diagram of a low-pass amplifying circuit component of the band-pass amplifier;
FIG. 6 is a circuit diagram shoving a gain programmability obtained by an N-well resistor string and four switches selected once at a time accor~.ir~g to the desired gain of the low-pass amplifying circuit of FIG. 5; and, FIG. 7 is a circuit diagram for the D~ restoration stage.
Descrit~tion Throughout the following description, specific details are set forth in order to provide a more thorough understanding of the invention. I~oweve;r, tree invention may be practiced without these particulars. Ir. other instances, well known elements have not been shown or described in detail to avoid unnecessarily obscuring the invention.
Accordingly, the specification and drawings ~.re to be regarded in an illustrative, rather than a restrictive, sense.

_C)-Figure I is a block diagram of the band-pass amplifying circuit 2 according to an embodiment of the invention, Circuit 2 has input terminal; 10 connected to receive a signal. The signal is typically a bioclectrical signal such as a signal picked up by a nerve cuff electrode or other implantable nerve electrode. The signal is coupled from input terminals 10 through protection circuitry II, which in turn passes the signal to inputs 12 of prearnpli~er stage 13. 'The preamplified signal at the output 14 of preamplifier 13 is fed into a band-pass amplifier IS, whose output I~ is fed into a i3C
restoration stage I7.
Circuit ~ provides an output signal at point I~, ~'he output signal may be provided to follow-on circuitry or devices.
to In an implantable application, it is imperative to minimize any DC current flow through the electrodes to avoid electrolysis, or in the case of a sck~~iconductor failure, to protect a subject's nerves from irreversible damage. Protection circuitry 1I has the function of blocking or at least minimizing any IBC current flow through input terminal 10 hand any implanted electrode connected to input terminal IO~. If a malfunction, such as a semiconductor failure, in preamplifier I3 permits current to t"low at the input of preamplifier I3 then protection circuitry 1I prevents the flow of current in an amount which would harm the subject's nerves.
2o Current regulations and good design practice suggests that a subject have at least two stages of protection to prevent excessive currents at inpL~t terrr~inals I0.
T~reamplif er 13 could be designed with a bipolar input stage. Protection c:ireuit :11 could then be designed to provide two or more protection stages. bipolar transistors require large input bias currents for their operation. 'hhe bias current may be hundreds of nl~. Good design, and applicable regulations both require that no single component failure should be able to cause signif cant currents to i~ow in input terminals I0. 'hhe protection stages of protection circuit I1 typically are implemented using discrete components, due to the time constants involved. Such discrete components occupy a Large area.

The circuits according to the embodiments described h~:rein use a CBIOS input stage in preamplifier 13. Since the input bias curren9: of a CMO~S transistor is in the order of fA, only one additional protection stage is needed, The input stage of preamplifier 13 itself acts as a protection stage. T'~is permits protection circuitry 11 to be reduced to a single high-value resistor in parallel with a capacitor which is preferably implemented as a series of two capacitors as shown for example in Figure 2b. This, in turn, reduces the overall size of circuit 2.
As mentioned above, the noise of the band-pass amplifying circuit 2 is dictated primarily to by the input stage of prearr:plifier 13. Preamplifier 13 is preferably implemented as a differential difference amplifier (DDA). A DDA is described by CJ. Nicollini and C.
Cuardiani, in "~ 3.3-~ X00-~e~,.,~s Noise, Cpais~-Progra~rarr~able ~'M~S
Microphone Preamplifier Desiga~ using Yield M~delir~g T'echa~igue ", IEEE Journal of Solid-State Circuits, vol. 28, no. 8, pp. 915921, August 1993. The basic DDA architecture was introduced by F. Sackinger and ~1. Cxuggenbuhl, in '",~ t~ers~atile Puildir~g ~locl~: The CM~S' Differential L7iffere~ee Ampltfier° ", IEEE Journal of Solid-State Circuits, vol. 22, no. 2, pp. 287-294, April 1987. Several circuits custom-designed for different applications, based on this :9tructLire, have Peen patented. See, for example, LT.S. Patent No. 5,861,778 to Louagie et al. for a "Low Noise Amplifier Stnacture" and TJ.S. Patent 2o No. 5,339,285 to Straw for a "Monolithic Low Noise Preamplifier for Piezoelectric Sensors".
Band-pass amplifier 1~ may be implemented by cascading two high-PSIZR, first-order band-pass amplifiers, each one composed of a g", - C high-pass filter and a low-pass amplifying circuit, DC restoration stage 17 can also be implemented using a gmo - Cp high-pass filter, but with a input-linear-range higher than the input linear ranges of the high-pass filters of hand-pass amplifier 15.
Two alternative architectures for the, circuit presented in this invention are shown in 3o Figures 2a and 2b. In figure; 2a, protection circuitry 11 comprises a discrete Fop - Cp high--I ~-pass filter that blocks completely any DC current flow caused by a semiconductor failure in preamplifier 13. Resistor Roy causes protection circuitry 11 to act in the same way on both input terminals 10. This avoids degradation of the CI~RR due to the presence of protection circuitry I1.
s Alternatively, in Figure 2b, protection circuitry 11' comprises a high-value resistor RB in parallel with a series of capacitors Ca. Protection circuitry 1I' minimizes any DC current flow caused by a semiconductor failure in preamplifier L3. Capacitors Ca are selected to minimize power-line noise. In terms of noise perfomnance and number of external 1o components needed, the protection circuit 11' in Figure 2b is preferable to the protection circuit I I of Figure 2a. However, in case of a semiconductor failure, protection circuit 11 completely blocks any DC flow to the electrodes and tissues as opposed to reducing the DC flow below an acceptable threshold.
1s The band-pass amplifier 2 may have a single-ended output architecture.
While a differential output can be used in the context of the invention and may provide enhanced performance, significant area and power penalties must be paid to achieve those benefits.
Gain programmability may be achieved, as shown in ~igt;~res 2a and 2b, by using 2o switches that select different combinations of resistors to vary 'the ratios of R3 to R4. The gain of preamplifier 13, in the recording band, may be fixed and given by the ratio 'l+R~2~' The high-pass filtering stages may be implemented with g,ri - C filters since precision in 25 the poles is not crucial. The closed-loop transfer function of the low-pass amplifier AMP1 may be set to have its dominant pole at 9 kHz (for S ~,~lpeak input neural signals), while providing the necessary fur~~her gain. Such DC gain is given by the ratio ~l + R~ ~4~. The DC restoration stage 17 may comprise a g",o - Co high-pass filter, preferably with an input linear range higher than 0.2 '!1. Precision again is not crucial since this stage is only needed for compensation of the bared-pass amplifying circuit offset. finally, in Figures 2a and ~b it can be observed that a reference voltage ~2 is supplied as an input to the preamplifier 13 and the two kow-pass amplifiers AMP1. This contributes to improving the PSRR of the band-pass amplifying circuit in the recording band, as explained below.
figure 3 shows a possule ~,~ircuit for preamplifier 13. The Ml differential pairs realize the transconductance elements of a two-stage ~~A. The current sources M3 are implemented using a cascode design as described in R. Gregorian and G. ~.
Temes, 0 ' Analog lt~~rS Integrated ~'ircutts ~'oz~ Signal Py~ocessinl; ", 1)p. 131-133, ,i ohn Wiley &
Sons, 196. This provides good matching o:~ the two input stages, which is important in optil~aizing the performance of a ~I~A. On the other hand, the use of caseode current sources adds a PMOS thresln~~old voltage VIT to the minii~urrg s~.zpply voltage ~1DD needed for operation; however, m this case the supply voltage V~,~ :is typically not a limiting t. s factor.
The differential current generated by transistors Ml is converted into a single-ended current by a cascode con~garation, comprising transistors C~~ and cascode mirror M2.
~Iith this configuration, better frequency response can be acl~i~;ved than in the ease of an to amplifier based on a cascade of two common-source st:age:~. "fhis is particularly true in the case of preamplifier 13, since the parasitic capacitance given by the large input transistors Ml (needed to achieve low-noise) is considerable. Transistor Ml~l provides further gain and accommodates fhe biasing of the output stage composed by M11, M12, X13 and RD. The second stage of preamplifier 13 could comprise a single transistor but, 25 in one embodiment, comprises a transistor M10 with capacitors O~~ and R~
providing frequency compensation. See: f. R. Gray and R. G. Meyer, "NIC)S' C~pe~ational Ampli~ea~s Design- a ~'utoYial ~ver~view ", IEEE Journal of Solid-State E:'ircuits, vol.
se-1°~, no. 6, pp.
969-9~z, I3ecember 192.

Finally, the equivalent Darlin~~ton pnp transistor M12-Q13 provides very low output impedance while drawing no current from the second stage. See ~. 1~. Alvarez, "BiCMOS Technology and Applications ", pp. 317-31g, Second Edition, Kluwer Academies Publishers, 1993. In this way, preamplifier 13 provides negligible systematic offset independent of variations in the electrical characteristics of the fabrication process.
This is important for the successful performance of a DDA.
The transistors may be sized according to the methods presented by F.
Silveira, D.
Flandre and P. Jaspers, ' ~ gmlh~ Based Methodology for tJ~e Design of CMOS
Analog IO Circuits and Its Application to the Synthesis of a Silicon-On-Insulator Micropower OTA ", IEEE Journal of Solid-State Circuits, vol. 31, nc.~. 9, pp. 1314-1319, September 1996. These methods are based on the relation of the transcond~xctance over drain current ratio (gt"~ID), to the normali~;ed current (IDi( WlL)) and allow a unified treatment of all regions of operation of the M~SFET transistors. Sizing of the transistors can be achieved for example by using this method and the EKV model, with a set of parameters and measurements from the process. See E. A. ~Jittoz, "lYlicropovver T'echnic~ues, Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing ", pp. 53-67, Eds. J. E. Franca and Y. P. Tsividis, Prentice 1-iall, 1993; and C. C. Enz et al" "An Analytical MOS Transistor ~llodel Valid in All Regions of ~ operation and Dedicated to Low-Voltage and Low-Power Applications ", Analog Integrated Circuits and Signal Processing, no. ~, pp. ~3-114, 1995.
A main specification that applies to the preamplifier 13 :is its noise level.
The equivalent total input noise spectral density S; has the following expression:
~2 2 g S,=4SN]j'-~ S~-E- 4 t,MZ ~ Siy(~~' ~ - 1 SRa-YA~ S~,/m 1 ~> M 1 g ~Ltl Ra eDDil (~ .~HPF ) The factors in equation (1) are as follows:

- ~ ~r-~ SM~ represents the noise contribution of an Ml input tra resistor. There are four of these transistors contributing directly to the input noise. The noise of preamplifier 13 is dominated by this factor.
~ S~ represents the noise contribution of resistance ~2 that passes directly to the inputs 12.
~ S~2 represents the noise contribution of a M~ current mirror transistor. The contribution of these loads is reduced by the square of the ratio of their transconductance to fleet of the input transistors Ml.
~ SRa represents the noise contribution of a lZa resistor. 'The contribution of these resistors is also reduced by the square of the product of their value and the transconductance of the input transistors Ml.
~ Sj;g", is the noise of tile equivalent resistor of the; g", - t~ high-pass filter. S~;g", is reduced by two factors. First of all, it is reduced by the gain of the preamplifier 13 (AwoA), since this ,stage precedes the filter, and second it decreases with frequency as stated in equation (1). This decrease is logical since, after the high-pass filter pole (fHPF), the capacitor C: can be sef;~~ as a short circuit.
This places the equivalent resistor 1/gm in parallel with resistor 1Z1.
A rough calculation shows that, in order to maintain a xtoise level from thermal sources 2o which does not exceed approximately a.6 pV""S in a 1~ kI-Iz bandwidth, the total equivalent input noise should be ~~ = 6nV/ Hz . Since in a well-designed amplifier the input transistors dominate the noise, the requ~.red level of M(jSFET
transconductance can be achieved only near weak inversion. The selection of i:he MOSFET type for the input transistors Ml was studied in detail. It is well known that in strong inversion the flicker noise of a PM~S transistor is Iower than that of l~l~IiJS transistors.
1=Iowever, it has been reported that flicker noise ire PTvI~S transistors may si.gnifica.ntly increase when such transistors move from strong inversion toward weak inversion. See L7. M.
~inkley et al., 'A Hic~opo-wer CH~S; Z~iarect-Conve~sior~, ~L~' Receiver t~hip foa~ l~ag~eetic-Field I~i~eless Applications ", IEEE Journal of Solid-State circuits, vol. 33, no.
3, pp. 344-35~, 3o March 199. Still others have reported the flicker noise going down, indicating that it -I:5-arises from a mechanism that is strongly affected by details of device fabrication. The very severe increase in flicker noise has not been observed in prototype circuits according to this embodiment. Therefore transistors h/II may be PM:~S in some embodiments of the invention. In embodiments in which the band-pass ampli~f~ring circuit ~ is fabricated using an ~~T-well technology, this se.ection improves the PSRR of the circuit as well.
Ey implementing the transfer function of the band-pass amplifying circuit 2 and the noise equation given by equation (1) in the l~A'hL,AI3~ des.igr environment, thermal noise levels for each factor were aasigned. This approach led to a value of (g",/Io) _ ~6.~1V-1 for the input transistors Vii, that corresponds to a (~'/I~) = 440. Common-centroid crossed-coupling layouts rr~ay be used for transistors I~l. ~~. h. .Jindal, "Noise Ass~ciated with l~ista~ibuted Resistance ~f NTC~'~"~2-' Cate S'tr~uctures i~a Integrated Circuits ", IEEE
Transactions on Electron I~~°vices, vol. ed-~1, no. 10, pp. 1505-X509, October 194 describes some common-centroid crossed-coupling layouts.
The load M2 in a prototype circuit embodiment resulted inn d~;ep~ strong inversion because its t~ransconductance was chosen almost five times lower than that of the input transistors to minimize noise. This resul~:ed in a (~J/L) = 74.5. Resistors Iy, were dimensioned based on biasing requirements, noise minimization, and the folded cascode requirement that gas 2o R~» ~. This integrated resistor is made of a pt diffusion, with a typical value in the range of 64 to 96 to S2/o (ohms Qer square). In the currently prefcrr(: d embodiment, Ra has a value of 2245 S2.
Tile CMRR of the embodiment of preamplifier ~3 shown in ~il,Ture 3 may be expressed by:
CMRR== I (2) l ____- ~g~~? I + ~~~
2gMl ~vTul3 gMi ~1 -1 i~_ where IyM3 is the output impedance of the cascode current source formed -by transistors M3, ~gMi is the mismatch between the transconductarmes of~ transistors Ml, ~.1 is the voltage gain of transistors Ml, and C~p~~ is the mismatch between. the voltage gains of such transistors. used on mismatch measurements previously performed for the present technology, the size of transistor M4 may be chosen to be (~IIL) = 20.3.
Transistor M3 is composed of a few transistors M4 in order to provide the necessary bias current level for the input transistors Ml. In this way, the CMRR given by equation (2) is mainly deter-mined by the mismatch in the voltage gain ~~. CMIZR.s in the order of 95 dE
can be achieved.
to The output stage formed by M11, M12, C~ 13 and IZD, may be designed based on the excursion expected at output 14. ~rnplified 1JMC~ signals caused by mismatches in nerve cuffs as well as random offset of the preamplifier 13 should be taken into account.
The design of the second stage composed by M9, M10, CND, and Ig~ was based on the minimization of systematic offset and the phase margin desired for the preamplifier 13. In a prototype circuit according to the invention, transistors ~5-X13 have an emitter area of 6.4 x 9.6 ~m~.
2o The connection of capacitor C~M~ between re-t erence voltage 22 and the gate of one of the M2 transistors, as shown in Figure 3, improves the PSR1Z. of preamplifier 13.
As analyzed by E. Sackinger et al., "~ ueazeral liclationship Betwee~~ ~lrycplifier Parameters= ar~cl Its Applicczti~n to PSRR Irnprove~ent ", IEEE Transactions on circuits and Systems, vol. 38, no. 10, pp. 1173-11~I, ~Jctober 1991, there is a constraint for the simultaneous improvement of the CMTZI~ and the PSIZIZ. in any kind oaf amplifier. The PSI~IZ of single-ended amplifiers can be improved and refection in tltc mid-frequency range can be improved by connecting a capacitor between the amplifier input and a noise-free reference, in this case, reference voltage 22. This is the: role capacitor C~~
plays in the preamplifier 13.

-1 ~-As mentioned above, band-pass amplifier 15 may be implemented by cascading two high-PSRR, -first-order band-pass amplifiers, each composed of a g", - ~ high-pass falter and a low-pass amplifying c~:rcuit, In Figure; 4, the g,n - ~ high-pass filter is shown. The transconductance g", is provided by a basic differential pair with active load. All the transistors shown are placed in the moderate inversion region. This provides enough linear range for the present application.
Figure 5 shows a preferred embodiment of° the amplifier AMhlo This is a Miller-type amplifier with a Darlington output stage that provides low-output impedance.
Darlington transistors X23 obtain their bias currents from transistors M2~ and M22, ~rhich also carry signal current, making the ar~~plifier a class AB. This reduces power consLamption since it avoids the need of extra transistors to bias transistors C~23. Resistors R3 and R4 provide feedback for closed-loop operation. Since the two amplifiers AMPS. give the low-pass filter characteristic of Ells bared-pass amplifying circuit 2, its cuS:off frequency is set by the k5 gain of this stage and by the l~gh-pole specification of the band-pass amplifying circuit 2.
capacitor ~",~ connected between reference voltage 22 and tile gates of transistors M17 increases the PSR1 in the passed band, as explained above for the preamplifier 13.
Figure 6 shows the gain pro~,~rammability obtained by u:~ing an 1~T-well resistor string and 20 four switches SWl to S't~14 to select different combinations of resistors to vary the ratios of R3 to R4. Switches Serf to S~J4 may be electronic switt;hes controlled by control logic (now shown). In this example, switches SWl to 514 are selected one at a time according to the desired gairs for AMl'1. The switches 5~ to~ S~4 are placed in series with the feedback inputs 21 and 25, and therefore their finite. "on"
resistance does not 25 affect the gain. ~f course, the number of switches and resistors can be varied depending on the number of externally controlled gain levels desired.
Finally, Figure 7 allows the I>C restoration stage. It is irr~plemerlted using a g",o - Co high-pass filter since precision in the pole is not <;ritical. The cutoff frequency is preferably in the range of 400 Hz to 600 ~z and is most preferably about 4~0 iIz. This further helps to _1 g_ reduce noise of biological origin while allowing band-pass amplifying circuit 2 to recover within a few milliseconds from overload such as could ~>e: caused by stimulation currents or while being cycled on/off.
A.s will be apparent to thosE; skilled in the art in the light of the foregoing disclosure, many alterations and modifications are possible in the practice of this invention without departing from the spirit or scope thereof. I-accordingly, tt~e scope of the invention is to be construed in accordance with the substance defined by the following claimse

Claims (17)

1. An implantable amplifying circuit for recording electrical signals generated by a nerve and detected by a pair of electrode wires in contact with the nerve, the amplifying circuit comprising:

a preamplifier having a pair of inputs for receiving signals from the pair of electrode wires, the preamplifier including a differential pair of input MOSFET
transistors having a low input current that serves as a first protection circuit to limit current flow through the nerve and the electrode wires, a pair of bipolar transistors and a current mirror that are driven with differential outputs of the MOSFET input transistors and producing a single-ended nerve output signal;

a signal line adapted to connect a body ground of a patient to a common voltage of the amplifying circuit;

a second protection circuit disposed in series with the signal line including a parallel resistor/capacitor combination to limit current flow through the nerve and the signal line.

2. The implantable amplifying circuit of claim 1, wherein said second protection circuit comprises a resistor in parallel with a series of one or more capacitors.

3. The implantable amplifying circuit of claim 1, further comprising:

at least one amplifier stage connected to the preamplifier single-ended nerve output signal that produces an amplified nerve output signal.

4. The implantable amplifying circuit of claim 1, wherein the implantable amplifying circuit has an equivalent input noise at 3 kHz that is lower than 0.6 µV rms

5. The implantable amplifying circuit of claim 1, wherein the implantable amplifying circuit has a CMRR higher than 90 dB at 250 Hz.

6. The implantable amplifying circuit of claim 1, wherein the implantable amplifying circuit has a power consumption lower than 12 mW.

7. The implantable amplifying circuit of claim 1, wherein the preamplifier has an input DC current that is lower than 1 nanoamp.

8. The implantable amplifying circuit of claim 1, wherein said implantable amplifying circuit is powered by an RF telemetry link.

9. The implantable amplifying circuit of claim 1, wherein the implantable amplifying circuit has a PSRR higher than 85 dB at 3 kHz.

10. The implantable amplifying circuit of claim 1, wherein said implantable amplifying circuit is powered by a battery.

11. An implantable amplifying circuit for recording electrical signals generated by a nerve and detected by a pair of electrode wires in contact with the nerve, the amplifying circuit comprising:

a preamplifier having a pair of inputs for receiving signals from the pair of electrode wires, the preamplifier including a differential pair of input MOSFET
transistors having a low input current that serves as a first protection circuit to limit current flow through the nerve and the electrode wires;

a signal line adapted to connect a body ground of a patient to a common voltage of the amplifying circuit;

a second protection circuit disposed in series with the signal line including a parallel resistor/capacitor combination to limit current flow through the nerve and the signal line;

at least one amplifier stage connected to an output at the preamplifier that produces an amplified nerve output signal;

a DC restoration circuit having an input connected to an output of said amplifier stage.

12. An implantable amplifying circuit for recording electrical signals generated by a nerve and detected by a pair of electrode wires in contact with the nerve, the amplifying circuit comprising:

a preamplifier having a pair of inputs for receiving signals from the pair of electrode wires, the preamplifier including a differential pair of input MOSFET
transistors having a low input current that serves as a first protection circuit to limit current flow through the nerve and the electrode wires;

a signal line adapted to connect a body ground of a patient to a common voltage of the amplifying circuit;

a second protection circuit disposed in series with the signal line including a parallel resistor/capacitor combination to limit current flow through the nerve and the signal line;

at least one band-pass amplifier connected to an output at the preamplifier that produces an amplified nerve output signal.

13. The implantable amplifying circuit of claim 12, wherein said band-pass amplifier comprises a plurality of high-pass filters and a plurality of low-pass negative-feedback amplifiers alternatingly cascaded with said high-pass filters.

14. The implantable amplifying circuit of claim 13, wherein each low-pass negative-feedback amplifier comprises:

a plurality of series-connected resistors forming a resistor string connected between an output terminal and a voltage reference terminal of the low-pass negative-feedback amplifier;
and a plurality of selectable switches wherein an end of each selectable switch is connected to an input terminal of the low-pass negative-feedback amplifier and another end of each selectable switch is connected to a nodal point between the resistors in the resistor string.

15. The implantable amplifying circuit of claim 13, wherein each low-pass negative-feedback amplifier comprises an output stage in a Darlington configuration operating as a class AB amplifier wherein a bias circuit supplying bias to the output stage also carries signal current.

16. The implantable amplifying circuit of claim 12, wherein said band-pass amplifier is a programmable-gain band-pass amplifier.

17. The implantable amplifying circuit of claim 16, wherein said programmable-gain band-pass amplifier has a frequency range between approximately 900 Hz and 9 kHz for µV peak input neural signals.