CA2358237C - Gaming hardware simulator - Google Patents

Abstract

An open architecture for gaming machines that includes a gaming subsystem implemented as an add-on card which enables the hardware functionality of a gaming machine to be implemented on a general purpose or industrial computer platform. In one embodiment, the add-on card is compatible with a standard bus interface, such as a peripheral component interconnect (PCI) bus interface. As such, gaming machine upgrades are greatly facilitated relative to current technology. In accordance with another aspect of the invention an add-on card is provided that can be connected to a general purpose or industrial computer to form a gaming machine simulator to enable third party software developers to develop game software for gaming machines without an actual gaming machine.

Description

GAMING HARDWARE SIMULATOR
BACKGROUND OF THE INVENTION
1. Field of the Invention The present invention relates to gaming machines and more particularly to a gaming machine architecture which includes a gaming subsystem implemented as a standard add-on card which, in one embodiment is adapted to be received in a standard expansion slot in a general purpose computer. The gaming subsystem add-on card facilitates the development, upgrading and testing of new gaming machines. The gaming machine subsystem add-on card can also be used to form a gaming machine simulator which facilitates software development for new gaming machines without the regulatory restrictions associated with current practice in which the gaming machine software is developed and tested with an actual gaming machine.

2. Description of the Prior Art Modern video gaming machines are known to be configured in a manner, similar to that of a general purpose computer, and include devices, such as, a microprocessor, random access memory (RAM), read only memory (ROM), one or more mass storage devices, a video display controller, sound generation hardware, etc. In addition to the above-mentioned devices, typically found in virtually all general purpose computers, additional proprietary devices are required in gaming machines due to regulatory requirements, security requirements or to improve the reliability of the system. These additional devices are known to include a battery back up RAM memory (known as static RAM or SRAM), additional ROM, additional or unique serial communication channels, bit level inputloutput interfaces, security monitoring circuitry, non-volatile storage memory, such as electrically erasable programmable read only memory (EEPROM), and mass storage write protection circuits. The proprietary components may not be available in a commercial, industrial or consumer grade personal computer, but I G are required to create a video gaming machine that is compliant with gaming regulations and thus results in a proprietary architecture for such gaming machines.
Such gaming machines formed with a proprietary platform are relatively complicated to update. In particular, such gaming machines may require to be updated for various purposes including keeping up with advancements in computer technology. Currently as computer and related software advancements are made, gaming machine manufacturers must constantly upgrade the proprietary gaming architecture which requires a relatively extensive engineering effort, time consuming regulatory submissions and testing. As such, the constant re-design and engineering results in diverse implementations of regulated machine functions that are fundamental to any gaming machine and are relatively expensive to implement.
Another problem associated with gaming machines with proprietary architecture relates to game software development. In particular, the development of gaming software is accelerating at a rapid pace. Key to the development of new gaming software is the ability to develop and test the software on a target platform (i.e. video gaming machine) as much as possible. As the demand for games accelerates, the demand increases for more engineers to develop software for the games. Unfortunately, third party developers are unable to fill this need because of the cost of the hardware and the severe regulatory restrictions imposed. In particular, modern video gaming machines are known to cost thousands of dollars. In addition, the export as well as ownership of such gaming machines is severely limited in several states and countries. As such, since the gaming machine software is normally developed on actual video gaming machines, third party developers are virtually precluded Li.MOL,i,o..lllili,../.Ln~..I.i from developing software for such machines. Thus there is a need for an improved gaming machine architecture which facilitates the development upgrading and software development for new gaming machines.
SUMMARY OF THE INVENTION
Briefly, the present invention relates to an open architecture for gaming machines that includes a gaming subsystem implemented as an add-on card which enables the hardware functionality of a gaming machine to be implemented on a standard general purpose computer platform. In one embodiment, the add-on card is compatible with a standard bus interface, such as a peripheral component interconnect (PCI) bus interface. As such, gaming machine upgrades are greatly facilitated relative to current technology. An add-on card may be provided which can be connected to a standard personal computer to form a gaming machine simulator to enable third party software developers to develop game software for gaming machines without an actual gaming machine.
In accordance with one aspect of the invention, there is provided a gaming machine including a general purpose computer and an expansion card. The general purpose computer includes a system bus, a standard expansion slot, a video controller to drive a display device, a processor communicatively coupled to the standard expansion slot and the video controller via the system bus, and a first memory communicatively coupled to the processor via the system bus. The first memory has computer readable code embodied therein, for execution by the processor, for implementing a player visual display via the display device.
The expansion card includes an expansion card connector adapted to couple with the standard expansion slot, and a gaming subsystem communicatively coupled to the expansion card connector. The gaming subsystem includes a card bus, an interface device to interface the card bus with the expansion card connector, and a second memory including a read only memory. The second memory is coupled to the card bus and has computer readable code embodied therein, for execution by the processor, for implementing a game play system. The processor is communicatively coupled to the second memory via the expansion card connector and the interface device.

In accordance with another aspect of the invention, there is provided a gaming machine emulator including a general purpose computer and an expansion card. The general purpose computer includes a system bus, a standard expansion slot, a video controller to drive a display device, and a processor communicatively coupled to the standard expansion slot and the video controller via the system bus.
The expansion card includes an expansion card connector adapted to couple with the standard expansion slot, and a gaming subsystem communicatively coupled to the expansion card connector. The gaming subsystem includes a card bus, a first interface device to interface the card bus with the expansion card connector, a read only memory, coupled to the card bus to store gaming software routines, and a second interface device, operatively coupled to the card bus, to communicatively couple the processor to a gaming machine input/output emulator. The processor is communicatively coupled to the read only memory via the expansion card connector and the first interface device. The processor is programmed to implement a game play system, using routines of the gaming softwaxe routines stored in the read only memory of the gaming subsystem, and to implement player visual display via the display device.
DESCRIPTION OF THE DRAWINGS
These and other advantages of the present invention will be readily understood with reference to the following specification an attached drawing wherein:
Fig. 1 is an exemplary block diagram for an open architecture gaming machine in accordance with an illustrative embodiment of the present invention.
Fig. 2 is a detailed block diagram of the gaming machine subsystem in accordance with an illustrative embodiment of the present invention.
Fig. 3 is a block diagram of switch box for emulating various gaming machine input/output functions.
DETAILED DESCRIPTION
The present invention relates to an open architecture for gaming machines in which the gaming machine hardware is separated from the general 3a computing system hardware. The gaming machine hardware is implemented as an add-on card and in one embodiment is adapted to be received in a standard expansion slot on a general purpose computer. An important advantage of such an architecture is that the add-on card installed into 3b a personal computer eliminates the expense of having an actual gaming machine to facilitate third party development of gaming software. In addition, the architecture mentioned above also facilitates updates of various gaming machines to new general computing platforms. As such, a single add-on may be used on multiple general computing platforms to facilitate the development of such gaming machines on multiple platforms.
In general, the functions of a gaming machine can be divided into a gaming subsystem and a general computing platform as set forth in Tables 1 and 2 below.

GAMING SUBSYSTEM
Game Play System Game Accounting Gaming Machine Access Input/output Control Random number generation Game authentication algorithm pay table information ~

GENERAL COMPUTING PLATFORM
Player visual display and attract animation Audio player feedback and attraction Real time video presentations Commercial operating systems An exemplary block diagram for a gaming machine in accordance with the present invention in which the gaming subsystem hardware is separated from the general computing hardware as set forth in Tables 1 and 2 is illustrated in Fig. 1. A
block diagram of the gaming subsystem add on card in accordance with the present invention is illustrated in Fig. 2. A block diagram of gaming machine input/output (I/O) emulator used to emulate gaming machine user inputs and machine outputs is illustrated in Fig. 3. The gaming machine I/O emulator as well as the add-on card enable third party developers to develop new software for the gaming machines without the regulatory requirements or cost of a gaming machine.
Referring to Fig. l, an exemplary block diagram for a gaming machine in accordance with the present invention is generally identified with the reference numeral 100_ The gaming machine 100 includes a gaming machine subsystems generally identified with the reference numeral 102 and a general computing subsystem, shown within the dashed box, identified with the reference numeral 104. As mentioned above, the gaming subsystem 102 is segregated from the general computing subsystem 104. As such, the gaming subsystem 102 as configured may be coupled to Peripheral Component Interface (PCI) bus 110 in a similar manner as other standard peripherals. In particular, in one embodiment the gaming subsystem 102 may be configured as a standard expansion card, adapted to be received in a standard PCI
expansion slot for a personal computer.
The general computing subsystem 104 described and illustrated is merely exemplary. The principles of the present invention are applicable to virtually any general computing platform. The general computing subsystem 104 includes a microprocessor 106, for example, an AMD Model No.K6-2, an optional cache memory 108, a system bus 110, PCI
bus 112, a bus controller 114, a video subsystem 116, an audio subsystem 118 and a network subsystem 120. The bus controller 114, for example, a Model No. M 1541 manufactured by Acer Labs Inc. controls the data transfer between the system bus 110 and the PCI bus 112.
The video subsystem 116 includes a video controller 122, for example, as manufactured by Imagination Technology. The video controller 122 is used to drive various types of displays, such as liquid crystal and cathode ray tube displays, used in various gaming machines, as indicated by the arrow 128. The video subsystem 116 also includes a video random access memory (RAM), such as synchronous dynamic RAM (SDRAM). The video controller 122 and SDRAM 124 are coupled to the system bus and bus controller 114 via interface, such as an interface known as the Advanced Graphics Port (AGP).
The audio subsystem includes an audio controller 130, such as a Model No. 4D-WAVE-NX, manufactured by Trident Microsystems. The audio controller 130 is used to convert digital data signals from the PCI bus 112 to analog signals suitable for driving one or more speakers. The audio controller I30 may also be used to cantrol the analog signals from the microphone to the speakers.

The network subsystem 120 may include a network controller 132, such as a model No. N82558 as manufactured by Intel Inc. The network controller 132 may be used to allow the gaming machine 100 to be networked with other gaming machines to combine payouts and produce a single larger jackpot. Such network gaming systems are known in the art as progressive systems. Examples of such progressive gaming systems are disclosed in commonly-owned U. S. Patents 5,766,076 and 5,855,515.
Fig. 2 represents an exemplary block diagram of a gaming machine subsystem 102. The gaming subsystem 102 includes its own data and address buses ("card bus"), generally identified with the reference numeral 136. As mentioned above, the gaming subsystem 102 may be configured as a standard expansion card.
As shown, the gaming machine subsystem 102 includes a PCI interface device 134, for example a PLX Technology, model number PC19050, for controlling communication between the PCI bus 110 (Fig. 1) and the card buses 136.
The gaming machine subsystem 102 may also include various electronic memory devices, such as a RAM 138, for example, 4 Mbytes of static RAM (SRAM), coupled to a backup battery 140 forming a shadow RAM. The shadow RAM 140 is coupled to the card bus 136. Additional SRAM sockets 142 may be provided to facilitate memory expansion. The SRAM 138 may be used to store critical data, such as, game statistics and game history information.
The gaming machine subsystem 102 may also include flash ROM 132. As is known in the art, such flash ROM 144 is an in circuit erasable and programmable device and retains the contents when power is removed from the circuit. The flash ROM 144 may be used to develop extended basic input/output (BIOS) firmware, not common to personal computing platforms for the purposes of gaming subsystem initialization, an initial bootstrap loader for the gaming subsystem operating system as well as specific operating routines used by the gaming software, such as random number generation and code integrity checking routines.
The gaming machine subsystem 102 may also include a provision for bidirectional communication between the gaming subsystem 101 and other devices, for example, a four channel universal asynchronous receiver/transmitter (DART) with a plurality of RS-232 serial ports 146 to provide serial communication capability for various systems, such as player tracking hardware, low speed LAN/WAN communication and various peripheral devices. In particular, the UART
146 may be coupled to a ticket printer, bill validator or touch screen on the video monitor (not shown). The UARTs 146 are compatible with RS 232 signaling levels.
Additional external hardware may be connected to the UARTs 146 to translate the RS 232 signal levels to other communication standards, such as RS 485, fiber optics, etc.
The gaming subsystem 102 may also include one or more mass storage devices 148 and 150, such as a hard-drive or compact disc read only memory CD-ROM, or the like. A mass storage write protect controller 152 may be used to control data communication between the system 136 and the mass storage devices 148 and 150. The mass storage write protect controller 152 prevents data from being written to mass storage devices 148 and 150 except under rigidly controlled circumstances to prevent a gaming machine program from being altered in an effort to gain unfair advantage.
The mass storage write protect controller 216 may be connected to an IDE controller normally available in a general computing subsystem. This allows the many industry standard mass storage devices to function with the mass storage write protect controller 216.
As shown in Fig. 2, an interface 154 may be used to connect the card bus 136 to a proprietary subsystem 155. The proprietary subsystem 155 may include various proprietary and non-proprietary gaming devices, such as, a bit level input/output (I/O) device 156, a security device 158 and a gaming system data storage system 160. The gaming system data storage system 160 may also include, for example, a controller 161 and an electrically erasable programmable read only memory (EEPROM).
The specific implementation and nature of the proprietary devices is not critical to the practice of the invention. It is only critical the gaming subsystem 102 hardware be segregated from the general computing subsystem 104 hardware for example, by implementing the gaming subsystem 102 hardware as one or more add-on cards that are adapted to be connected to a general computing subsystem by way of a standard interface, such as a standard expansion slot on a general computing subsystem 104. Alternatively, it is also contemplated 7a that the gaming subsystem 102 add-on card be connected to the general computing system 104 in other ways. For example, the gaming subsystem 102 add-on. card may be implemented as an add-on card with an edge connector adapted to be connected to the general computing subsystem 104 by way of a mating connector in communication with said general computing subsystem 104.
A gaming machine inputloutput emulator, for example, as illustrated in Fig. 3, may be used in conjunction with the add-on card for provide an opportunity for third party software developers to develop and test all conditions generated on an actual gaming machine.
The gaming machine I/O emulator 164 may be used to emulate various gaming machine IIO
devices on a standard gaming machine. For example, the gaming machine I/O
emulator I64 may include a plurality of switches 166, lights 168 and mechanical counters 170. The switches 166 may be used to emulate switches on the front of a gaming machine, such as slot handle, coin acceptor, and play line buttons. The switches 166 may also be used to emulate switches that correspond to security devices, not normally seen by the user including a tilt alarm, door alarms and coin jam indicator. The lights 168 may be used to emulate normal outputs, such as button lights, bells and coin release, as well as alarm condition indicators.
The mechanical counters 170 rnay be used to emulate the record of critical play history as required by most gaming authorities.
Although described above in terms of the preferred embodiment, the present invention is set forth with particularly in the appended claims. Such modifications and alterations as would be apparent to one of ordinary skill in the art and familiar with the teachings of this application shall be deemed to fall within the spirit and scope of the invention.
What is desired to covered by a United States Letters Patent is:

Claims (20)

1. A gaming machine, comprising:
a general purpose computer comprising:
a system bus;
a standard expansion slot;
a video controller to drive a display device;
a processor, communicatively coupled to the standard expansion slot and the video controller via the system bus;
a first memory communicatively coupled to the processor via the system bus, the first memory having computer readable code embodied therein, for execution by the processor, for implementing a player visual display via the display device;
an expansion card comprising:
an expansion card connector adapted to couple with the standard expansion slot;
a gaming subsystem communicatively coupled to the expansion~
card connector, the gaming subsystem comprising:
a card bus;
an interface device to interface the card bus with the expansion card connector; and a second memory comprising a read only memory, the second memory coupled to the card bus and having computer readable code embodied therein, for execution by the processor, for implementing a game play system;
wherein the processor is communicatively coupled to the second memory via the expansion card connector and the interface device.

2. A gaming machine as defined in claim 1, wherein the standard expansion slot comprises an expansion slot compatible with a peripheral component interconnect (PCI) standard.

3. A gaming machine as defined in claim 1 or claim 2, wherein the general purpose computer further comprises an audio controller, communicatively coupled to the processor via the system bus, to generate signals for driving at least one speaker, wherein the first memory further includes computer readable code embodied therein, for execution by the processor, for implementing player audio feed back via the at least one speaker.

4. A gaming machine as defined in any one of claim 1 to claim 3, wherein the computer readable code embodied in the second memory includes code for generating random numbers.

5. A gaming machine as defined in any one of claim 1 to claim 4, wherein the computer readable code embodied in the second memory includes code for checking integrity of gaming software routines.

6. A gaming machine as defined in any one of claim 1 to claim 5, further comprising a mass storage device operatively coupled to the processor to store the computer readable code embodied in the first memory, wherein the gaming subsystem further comprises a mass storage write protect device coupled to the card bus and operatively coupled to the mass storage device.

7. A gaming machine as defined in any one of claim 1 to claim 6, wherein the interface device comprises an integrated circuit.

8. A gaming machine emulator, comprising:
a general purpose computer comprising:
a system bus;
a standard expansion slot;
a video controller to drive a display device;
a processor, communicatively coupled to the standard expansion slot and the video controller via the system bus;
an expansion card comprising:

an expansion card connector adapted to couple with the standard expansion slot;
a gaming subsystem communicatively coupled to the expansion card connector, the gaming subsystem comprising:
a card bus;
a first interface device to interface the card bus with the expansion card connector;
a read only memory, coupled to the card bus, to store gaming software routines;
a second interface device, operatively coupled to the card bus, to communicatively couple the processor to a gaming machine input/output emulator;
wherein the processor is communicatively coupled to the read only memory via the expansion card connector and the first interface device;
wherein the processor is programmed to:
implement a game play system, using routines of the gaming software routines stored in the read only memory of the gaming subsystem; and implement player visual display via the display device.

9. A gaming machine emulator as defined in claim 8, wherein the standard expansion slot comprises an expansion slot compatible with a peripheral component interconnect (PCI) standard.

10. A gaming machine emulator as defined in claim 8 or claim 9, wherein the general purpose computer further comprises an audio controller, communicatively coupled to the processor via the system bus, to generate signals for driving at least one speaker, wherein the processor is further programmed to implement player audio feedback via the at least one speaker.

11 11. A gaming machine emulator as defined in any one of claim 8 to claim 10, wherein the gaming software routines stored in the read only memory of the gaming subsystem include at least one routine for generating random numbers, and wherein the processor is further programmed to generate random numbers for game play using the at least one routine for generating random numbers.

12. A gaming machine emulator as defined in any one of claim 8 to claim 11, wherein the gaming software routines stored in the read only memory of the gaming subsystem include at least one routine for checking integrity of gaming software routines, and wherein the processor is further programmed to check integrity of gaming software routines using the at least one routine for checking integrity of gaming software routines.

13. A gaming machine emulator as defined in any one of claim 8 to claim 12, further comprising a hard disk drive operatively coupled to the processor to store gaming system software, and wherein the gaming subsystem further comprises a mass storage write protect device coupled to the card bus and operatively coupled to the hard disk drive.

14. A gaming machine emulator as defined in any one of claim 8 to claim 13, wherein the gaming machine input/output emulator comprises a switch to emulate a slot handle.

15. A gaming machine emulator as defined in any one of claim 8 to claim 13, wherein the gaming machine input/output emulator comprises a switch to emulate at least one of a coin acceptor, a pay line button, a tilt alarm, a door alarm, and a coin jam indicator.

16. A gaming machine emulator as defined in any one of claim 8 to claim 13, wherein the gaming machine input/output emulator comprises a plurality of lights to indicate alarm conditions.

17. A gaming machine emulator as defined in any one of claim 8 to claim 13, wherein the gaming machine input/output emulator comprises a plurality of lights to emulate gaming machine button lights.

18. A gaming machine emulator as defined in any one of claim 8 to claim 13, wherein the gaming machine input/output emulator comprises a plurality of counters to emulate critical play history.

19. A gaming machine emulator as defined in any one of claim 8 to claim 18, wherein the first interface device comprises an integrated circuit.

20. A gaming machine emulator as defined in any one of claim 8 to claim 19, wherein the processor is communicatively coupled to the second interface device via the first interface device.