CA2313646A1 - Monitoring system - Google Patents

Monitoring system Download PDF

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Publication number
CA2313646A1
CA2313646A1 CA002313646A CA2313646A CA2313646A1 CA 2313646 A1 CA2313646 A1 CA 2313646A1 CA 002313646 A CA002313646 A CA 002313646A CA 2313646 A CA2313646 A CA 2313646A CA 2313646 A1 CA2313646 A1 CA 2313646A1
Authority
CA
Canada
Prior art keywords
trimming
cells
monitoring system
sensor
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002313646A
Other languages
French (fr)
Inventor
Dieter Draxelmayr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2313646A1 publication Critical patent/CA2313646A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored

Abstract

The invention relates to a monitoring system for trimming electronic components or sensors. Known systems cannot identify a failure or a malfunction in the digital trimming cells reliably enough. The invention therefore provides an additional trimming cell. A parity signal is produced which clearly indicates a fault in the monitoring system.

Description

, Description Monitoring system The present invention relates to a monitoring system for trimming electronic components or sensors in accordance with the preamble of claim 1.
In many electronic components and sensors, it is necessary to set the components and/or sensors in order to achieve the required accuracy. This setting sequence is usually referred to as the trimming of the corresponding component or sensor.
For this purpose, it is known to use digital trimming cells, e.g. in the form of EEPROM cells, zener zaps or fusible links. By means of these usually digital trimming cells, the corresponding electronic components or the sensor and the circuit connected thereto can then be controlled in such a way that a desired response is achieved.
There is a problem in achieving this trimming of the corresponding components with high reliability precisely with regard to electronic systems relevant to safety. This is because it is precisely in sensitive electronic systems that the required response of components must be ensured and, consequently, also the reliability in the trimming of these components.
In this respect, however, it has also been found that the trimming cells used failed in a manner dictated by the production batch or fell out of step in the course of their service life, but a clear indication of faulty behavior of the entire system was not obtained for these situations.
Such failures or malfunctions which, moreover, are not clearly indicated are unacceptable, however, precisely in systems relevant to safety.

97 P~6450 _ 2 _ The object of the invention, therefore, is to design a monitoring system of the generic type in such a way that the functioning of the trimming cells or a deviation therefrom or even a failure of trimming cells is reliably indicated.
In the case of a monitoring system of the generic type, this object is achieved according to the invention by means of the features of the characterizing part of claim 1.
An essential concept at the heart of the invention consists, therefore, in assigning a further trimming cell to the trimming cell or cells already present in the system. This further trimming cell is then designed or connected in such a way that the monitoring system generates a parity signal which permits a statement concerning the functioning or a failure of one or more trimming cells in the system.
In this case, the further digital trimming cell is advantageously connected in parallel with the other trimming cells whose functional monitoring is to be carried out in the system. The digital method of operation of the trimming cells that are usually used therefore allows the output signals of the trimming cells to be logically combined with one another, thereby obtaining an output signal for the parity checking.
For this purpose, the output signals of the trimming cells are fed directly or indirectly to a logic circuit which generates a .parity signal at its output e.g. only when one or more trimming cells exhibit faulty behavior.
Although, in principle, a parity signal is present only in the event of the failure of one or an odd number of trimming cells, this fulfills the high safety requirements since the fault should be indicated in the event of the failure of just a single trimming cell.
Examples of trimming cells that can be used for setting the desired response of sensors are 97 P 6450 _ 3 _ EEPROM or EPROM cells, zener zaps or fusible links.
In the case of digital processing, a fault in a trimming cell can be indicated by a status bit at the output of the logic circuit.
Since it is often the case that the interfaces provided can only transmit the sensor signal, it is necessary to indicate the fault state as a parity signal in another way. In these cases, a simple and expedient possibility is for the parity signal to be placed out of the normal operating range of the indication, that is to say to lie outside the normal range.
For example, in the case of an integrated pressure sensor at whose output, in normal operation, digital data are generated in the range +/- 0.75 as output signals, a malfunction of the trimming cells can be indicated with a full-scale stop at e.g. +/- 1, As a result, the monitoring system can be designed and defined in such a way that data lying outside the standard range signal faulty behavior, in particular of the trimming cells or of a trimming cell.
Therefore, when a fault is present, it is possible simply for the range full-scale value of the corresponding sensor to be output. In this way, attention is drawn to the irregular behavior of trimming cells and sensor with high reliability. This last because, in the event of faulty behavior of trimming cells, the sensor or sensors do not lie within the scope of their desired response.
Although good reliability can be assumed in the case of trimming cells, by means of the design of the monitoring =-system in the manner mentioned above, a fault in the system is indicated in a simple and efficient form and, consequently, the overall reliability is considerably improved.

97 P 6450 _ 4 _ The invention is explained in more detail below with reference to a schematic drawing of an exemplary embodiment.
The drawing shows a schematic block diagram of a monitoring system 1 according to the invention, with a sensor S1. In order to set the accuracy and the response, the sensor S1 has six bit inputs via which the sensor S1 can be trimmed.
On the input side, the trimming cells T1 to T6 receive a common control signal 4 and separately, furthermore, different input signals 5.
On the output side, the signals 61 to 66 of the trimming cells are passed to a register R. The output signals 81 to 86 of the register R then serve as input signals for setting the response of the sensor S1.
The register R serves, in particular, for enabling the simulation of the behavior of the sensor S1 in the event of the failure of one or more trimming cells T1 to T6. This allows the register R to be set in such a way that e.g. the failure of the trimming cell T3 can be run through as a test procedure and the response of the sensor S1 can already be ascertained in test terms. However, the register R also serves for determining the exact desired function of the sensor S1 without trimming cells, e.g. fusible links, having to be "blown".
The output signals 81 to 86 of the register R
are, as it were, bit lines for setting the sensor S1.
Therefore, the response or the accuracy of the sensor S1 is set via six bit lines.
In the example illustrated, the sensor S1 is bidirectionally connected to a process unit P1.
The sensor S1 may be e.g. a pressure sensor KP 100, which detects the pressure at the corresponding process unit P1 in a bidirectional mode of operation.

97 P 6450 _ 5 _ In order to achieve maximum security and reliability of the monitoring system, a further trimming cell Tp is provided as parity trimming cell in parallel with the six trimming cells T1 to T6 present in the example.
The output signal of this parity trimming cell Tp is fed to a logic block 10, which simultaneously receives the output signals 81 to 86 which identify the functionality or faulty behavior or even a failure of individual trimming cells T1 to T6 or a plurality of trimming cells T1 to T6.
In the logic block 10, these signals including the output signal of the further trimming cell Tp are processed and a parity signal Sp is output at the output e.g, in the event of a fault in one of the trimming cells T1 to T6.
This parity signal Sp is indicated by means of a display unit 11.
It is expedient for the parity signal Sp to be fed to the sensor S1 as well, e.g. in the sense of a blocking signal, since said sensor is set defectively.
The display indication 11 is connected to the sensor S1 via a bus 12, so that the corresponding sensor values can be indicated.
In the event of a parity signal Sp generated by the logic block 10, the indication of the corrPSponding sensor signal, as identification of a fault, can be placed in the full-scale region of the indication, whereby a fault in the monitoring system is clearly signaled.

Claims (8)

claims
1. A monitoring system for trimming electronic components or sensors, each component or sensor (S1) being assigned at least one digital trimming cell (T1 to T6) for regulating the setting of the components or of the sensor, characterized in that a further digital trimming cell (Tp) is assigned to the trimming cell or cells (T1 to T6) for the functional monitoring thereof in the system, and in that the further digital trimming cell (Tp) is designed for parity checking for the or with the other trimming cells (T1 to T6).
2. The monitoring system as claimed in claim 1, characterized in that the further digital trimming cell (Tp) is connected in parallel with the trimming cell or cells (T1 to T6), and in that the output signals (81 to 86) of the trimming cells (T1 to T6) are fed to a logic circuit (10), which generates a signal (Sp) for parity setting.
3. The monitoring system as claimed in claim 1 or 2, characterized in that the trimming cells (T1 to T6) are designed as EPROM cells, EEPROM cells, zener zaps or fusible links.
4. The monitoring system as claimed in either of claims 2 and 3, characterized in that the signal (Sp) for parity checking with regard to a fault in one or more trimming cells (T1 to T6) is a status bit.
5. The monitoring system as claimed in one of claims 1 to 3, characterized in that the signal (Sp) for parity checking is an indication outside the indicating range of the normal operation of the corresponding component or sensor (S1).
6. The monitoring system as claimed in claim 5, characterized in that the indication of a fault is indicated as datum of the full-scale stop of the indicating range.
7. The monitoring system as claimed in one of claims 1 to 6, characterized in that at least one storage device or register (R) is interposed between trimming cells (T1 to T6) and sensor(s) (S1), which allows a simulation of a failure of one or more trimming cells (T1 to T6).
8. The monitoring system as claimed in claim 7, characterized in that the exact desired function of the sensor (S1) can be determined by means of the storage device or register (R), without the inclusion of the trimming cells (T1 to T6).
CA002313646A 1997-12-12 1998-12-07 Monitoring system Abandoned CA2313646A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19755384.2 1997-12-12
DE19755384A DE19755384C2 (en) 1997-12-12 1997-12-12 System for trimming electronic components or sensors
PCT/DE1998/003587 WO1999031585A1 (en) 1997-12-12 1998-12-07 Monitoring system for a digital trimming cell

Publications (1)

Publication Number Publication Date
CA2313646A1 true CA2313646A1 (en) 1999-06-24

Family

ID=7851757

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002313646A Abandoned CA2313646A1 (en) 1997-12-12 1998-12-07 Monitoring system

Country Status (6)

Country Link
EP (1) EP1038223B1 (en)
JP (1) JP2002508566A (en)
KR (1) KR20010040297A (en)
CA (1) CA2313646A1 (en)
DE (2) DE19755384C2 (en)
WO (1) WO1999031585A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101039742B1 (en) * 2004-10-11 2011-06-08 주식회사 만도 An Electric Type Power Steering System
DE102008022948A1 (en) * 2008-05-09 2009-11-19 Continental Automotive Gmbh Pressure controlling method for common rail injection system, involves executing pressure control using rail pressure received by utilization of pressure sensor-individual characteristic line in motor control unit

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62291799A (en) * 1986-06-11 1987-12-18 Fujitsu Ltd Semiconductor memory device
JP2509297B2 (en) * 1987-08-31 1996-06-19 沖電気工業株式会社 Semiconductor memory device with self-correction function and microcomputer
JPH02150926A (en) * 1988-12-01 1990-06-11 Fuji Facom Corp Parity preparing device
JP2582160B2 (en) * 1989-07-20 1997-02-19 株式会社日立製作所 Sensor device
JPH0512899A (en) * 1991-07-01 1993-01-22 Fujitsu Ltd Semiconductor storage
JPH05346827A (en) * 1992-06-12 1993-12-27 Omron Corp Voltage adjusting circuit device
KR960011261B1 (en) * 1993-06-11 1996-08-21 삼성전자 주식회사 Circuit device value controlling circuit of semiconductor integrated circuit and method thereof
JP2639328B2 (en) * 1993-11-12 1997-08-13 日本電気株式会社 Trimming method and circuit
US5384746A (en) * 1994-01-28 1995-01-24 Texas Instruments Incorporated Circuit and method for storing and retrieving data
JPH08181277A (en) * 1994-12-21 1996-07-12 Matsushita Electric Works Ltd Adjusting circuit and adjusting method of the adjusting circuit
JPH08181616A (en) * 1994-12-22 1996-07-12 Hitachi Ltd Semiconductor integrated circuit

Also Published As

Publication number Publication date
JP2002508566A (en) 2002-03-19
EP1038223A1 (en) 2000-09-27
KR20010040297A (en) 2001-05-15
EP1038223B1 (en) 2002-04-03
WO1999031585A1 (en) 1999-06-24
DE59803672D1 (en) 2002-05-08
DE19755384C2 (en) 2000-05-04
DE19755384A1 (en) 1999-07-01

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