CA2185303A1 - Crosspoint switch with improved pin-outs and expansion inputs - Google Patents
Crosspoint switch with improved pin-outs and expansion inputsInfo
- Publication number
- CA2185303A1 CA2185303A1 CA 2185303 CA2185303A CA2185303A1 CA 2185303 A1 CA2185303 A1 CA 2185303A1 CA 2185303 CA2185303 CA 2185303 CA 2185303 A CA2185303 A CA 2185303A CA 2185303 A1 CA2185303 A1 CA 2185303A1
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- Canada
- Prior art keywords
- pins
- crosspoint
- devices
- data input
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0421—Circuit arrangements therefor
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
- H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Electronic Switches (AREA)
Abstract
A crosspoint device has a first side containing data input pins, and a second opposed side at which each pin opposite a data input pin is a "no connect" pin which is not connected to any circuit in the device. This allows the devices to be arranged in a matrix with data input traces bussed across the circuit board beneath each device to the next device without the need for vias, simplifying circuit board construction, reducing signal degradation due to signal reflections on high speed interconnect traces, and reducing crosstalk. Each device also has self terminated expansion data inputs on one side, with an on-board 2 x 1 multiplexer to connect either the crosspoint matrix or the expansion data inputs to the data outputs, further facilitating assembly of the devices into a compact array with reduced circuit board complexity, signal degradation, and crosstalk.
Description
~185303 Title: CROSSPOINT SWITCH WITH IMPROVED PIN-OUTS AND
EXPANSION INPUTS
FIELD OF THE INVENTION
This invention relates to a crosspoint switch. In particular it 5 relates to a unique pin-out arrangement for a crosspoint switch, and to expansion input port architecture for a crosspoint switch.
BACKGROUND OF THE INVENTION
Crosspoint switches are electronic devices that are used to route data inputs to data outputs via a programmed configuration. The 10 input/ output mapping can be altered at any time using programming logic inputs to the device, so that a configurable switching matrix can be designed.
One of the significant challenges in digital data switching matrix design is the connection of multiple crosspoint switches or devices 15 together to create larger switching matrices. In the past this has been accomplished by using complex multilayer circuit boards, and high speed switches or multiplexers which are connected to multiple crosspoint devices.
The use of external multiplexers and complex printed circuit 20 boards has led to many difficulties, including difficulties in assembling thematrix into a compact configuration, crosstalk problems, and difficulty in terminating traces on the circuit board.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention in one of 25 its aspects to provide a pin-out arrangement for a digital data crosspoint switch which facilitates the design of a switching matrix using a number of individual crosspoint devices, and which at the same time reduces signal crosstalk and circuit board routing complexity. In this aspect the invention provides a crosspoint device containing a crosspoint switch and having:
~18~303 (a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, a second pin being located opposite at least some of said input pins, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) the second pms opposite said data input pins being "no connect" pins which are not electronically connected to said crosspoint switch.
In another aspect the invention provides expansion input ports for digital crosspoint devices, so that the devices can again be assembled in a matrix in a simple manner while reducing the need for complex printed circuit boards and also reducing input/output crosstalk.
In this aspect the invention provides a crosspoint device containing a crosspoint switch and having:
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) said device also having a third and a fourth side each extending between said first and second sides, said third side containing output pins and said fourth side containing expansion data input pins coupled to said output pins, (f) said expansion data input pins being self terminated.
Further objects and aspects of the invention will appear from the following description, taken together with the accompanying 30 drawings.
~18~303 BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings: -Fig. lA is a block diagram of a prior art multiplexed input array of crosspoint devices;
Fig. lB is a block diagram of another prior art input array of crosspoint devices;
Fig. 2 is a block diagram of a multiplexed output array for crosspoint devices;
Fig. 3 is a block diagram showing prior art bussed outputs for a crosspoint device array;
Fig. 4A is a diagrammatic view of a pair of crosspoint devices according to the invention;
Fig. 4B is a diagrammatic view of a portion of a printed circuit board showing traces used with the device of Fig. 4A;
Fig. 5 is a block diagram of a crosspoint device having expansion input port architecture;
Fig. 6 shows in more detail a portion of the Fig. 5 arrangement;
Fig. 7 is a block diagram showing a matrix of devices 20 connected together and using the expansion input port architecture of Figs.
~ 5 and 6; and Fig. 8 shows optional detail for the Figs. 5 and 6 device.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Reference is~st made to Fig. 1, which shows a conventional 25 prior art crosspoint switch array having two n x n crosspoint devices 20, 22 having inputs 24, 26. In the past it was common to connect multiple crosspoint devices together to create larger switching matrices by the use of complex multi-layer circuit boards and high speed switches or multiplexers, such as multiplexer 28. Multiplexer 28 is connected to the 30 inputs 24, 26 to create an n x m switching matrix, where n<m. Similarly, the outputs of the crosspoint devices were required to be multiplexed '_ together to create a switching matrix, as shown in Fig. 2. In Fig. 2 the outputs 30, 32 of crosspoint devices 20, 22 are connected to another multiplexer 34 having outputs 36. (Alternatively, the inputs of crosspoint devices 22, 24 can simply be connected together as shown in Fig. lB, but this is not suitable for their outputs, as will be discussed.) It is possible to provide devices which have outputs which are turned "on" or "off" utilizing a configuration interface. These switching matrix designs would not require external multiplexers in order to be connected together, and are illustrated in Fig. 3, where two switching crosspoint devices 40, 42 are illustrated as being connected together at connections 44 on a circuit board 46. Unfortunately, the design shown in Fig. 3 may suffer from crosstalk problems, particularly in the connection area 44 where the output traces 48 of one crosspoint device 40 cross the output traces 50 of the other crosspoint device 42. In addition, it will suffer from signal degradation from the interconnection of "off" outputs with "on" outputs. Further, since vias in the circuit board are required to connect the crosspoint devices' outputs to the output bus, additional crosstalk problems can occur. The output traces on the circuit board are also difficult to control and to terminate properly.
Reference is next made to Fig. 4A, which shows a crosspoint device 54 which facilitates connection of the device to a printed circuit board, and which also has other advantages which will be described.
The crosspoint device 54 of Fig. 4A is rectangular in plan, having left and right sides 56, 58 and top and bottom sides 60, 62. The device 54 has input pins 64 at its left hand side, output pins 66 at its bottom side, control pins 68 at its right hand side, and self terminated expansion input pins 70 (to be described) at its top side. All of these pins, whether used or not, are soldered to the circuit board 72 (Fig. 4B) to which the device 54 is connected, for a secure mechanical connection.
It will be seen that the input pins 64 include a number of data input pins marked from IN0, IN0-B to IN7, IN7-B. According to the invention, the pins on the side of the device 54 opposite to these input ~185303 data pins, namely pins 74, are "no connect" pins and are not used for any other purpose. As best shown in Fig. 4B, the circuit board traces 76 which carry the data inputs to the data input pins IN0, IN0-B to IN7, IN7-B are bussed across the circuit board and are connected to the "no connect" pins 5 74 and continue across the circuit board to be connected to the next crosspoint device 54A, as shown in Fig. 4A.
Because the only pins on the right hand side 58 of the device 54 which are connected to the circuit board traces 76 are the "no connect"
pins 74, and since pins 74 are not connected to any internal circuitry in 10 device 54, it is possible to route the circuit board traces 76 along a singlelayer of the circuit board 72. There is no need to have these traces routed down to a lower layer of the circuit board to go under the pins 74 and then to route them back up to the surface of the board for connections.
The arrangement shown in Figs. 4A and 4B therefore has a 15 number of advantages. Firstly, it lowers the complexity of the circuit board 72 needed to hold a matrix of crosspoint devices, since fewer layers are needed for the circuit board. Secondly, it reduces the signal degradation effects which would normally be caused by vias and corners in the printed circuit board traces for high frequency digital data such as serial digital 20 video data. Thirdly, it facilitates the simple design of large matrices made from individual crosspoint devices, and it allows higher crosspoint device density on a switching matrix circuit board. Finally, it allows all inputs to have a single line termination, since any number of devices can be located on a single trace 76, and yet only one termination is needed, at the end of 25 that trace.
Reference is next made to Fig. 5, which shows expansion input port architecture for a crosspoint device 54. In the past, crosspoint devices have normally included data inputs 80 (connected to the data input pins of Fig. 4A), directed to an input buffer 82, which in turn is 30 connected to the matrix (shown for example as an 8 x 8 matrix) 84 of crosspoints or switches. The matrix 84 is in turn connected to the matrix an output buffer 86 connected to data outputs 88 (the output pins OUT1, ~185303 OUT1-B to OUT7, OUT7-B of Fig. 4A). The control inputs 90 are in turn connected to control input latches 92 which are used to control the matrix 84.
A difficulty with the prior art arrangement as described is that 5 it has been very difficult to connect multiple crosspoint devices together in a matrix. Since external multiplexers were used, the architecture became cumbersome.
As shown in Fig. 5, the invention in one aspect provides self terminated expansion data inputs 96 on the top side 60 of the crosspoint device 54. These are connected to pins EXP0, EXP0-B to EXP7, EXP7-B of Fig. 4A. The reference to "self terminated" means that there is a transmission line impedance 97 (Fig. 6) located internal to the expansion port input. An impedance 97 is thus connected across each pair of pins EXP0, EXP0-B to EXP7, EXP7-B. This impedance can take the form of an 15 active device (Bipolar, MOS, FET transistor(s)) or circuit or a passive device (resistor, capacitor, inductor) or circuit. Resistors 97 are shown as an exemplary implementation. Resistors 97 are integrated as part of the device 54 and are not external. The self terminated expansion data inputs 96 are connected through buffer 98 to a 2 x 1 multiplexer 100, which is in 20 turn connected to the crosspoint matrix 84 and to the data output buffer 86.
In Fig. 5 the control inputs 90 control the crosspoint matrix 84 as usual and also control the multiplexer 100 so that the desired outputs (either from the data inputs 80 or directly from the self terminated expansion data inputs 96, as selected) are fed to the combined output stage and buffer 86 25 and hence to the data outputs 88.
It will be seen that in operation, the multiplexer 100, under control of the control latches 92, will direct either the outputs from the crosspoint array, or the expansion data inputs, to output buffer 86, and hence to the data outputs 88. Thus, data received on the self terminated 30 expansion data inputs is routed directly through the device 54 to the data outputs, rather than being routed through the circuit board. This allows additional devices to be added easily to widen the matrix, as explained in connection with Fig. 7.
' 2~35303 Fig. 7 shows an example in which four crosspoint devices 54-1, 54-2, 54-3, 54-4 are connected together in a matrix. As shown, the data inputs 80-1 for device 54-1 are connected to the input pins 64-1 of device 54-1 and are also bussed across device 54-1 and are connected to the input 5 pins 64-2 of device 54-2 (using the arrangement of Figs. 4A, 4B).
A second set of data inputs 80-2 is connected to the data input pins 64-3 of device 54-3 and is also bussed across device 54-3 and connected to the data input pins 64-4 of device 54-4, again using the arrangement of Figs. 4A, 4B.
The data outputs 88-1 of device 54-1 are connected to the self terminated expansion data inputs 96-3 of device 54-3. Similarly, the data outputs 88-2 of device 54-2 are connected to the self terminated expansion data inputs 96-4 of device 54-4. The data outputs of devices S4-3, 54-4 are shown at 80-3, 80-4 respectively.
The arrangement shown in Fig. 7 avoids the need to run traces from the outputs of the crosspoint device to a common output bus, and therefore crosstalk between output channels, and signal degradation due to signal reflections on the transmission line, can be greatly reduced.
In addition, in the Fig. 7 arrangement fewer circuit board layers are needed 20 since the data outputs of each device simply line up. Further, because the data outputs are routed from the top of the switching matrix to the bottom through the devices 54 themselves and not beneath the devices, inputs can be simply bussed across the board without concern about input/output crosstalk (since the data input traces 76 do not cross output traces in the 25 circuit board). The use of self terminating expansion ports eliminates the need for external line terminating resistors, allowing a much denser interconnect between the data outputs of one crosspoint device and the expansion port inputs of another crosspoint device.
Reference is next made to Fig. 8, which shows a power saving 30 arrangement. Normally each crosspoint device 54 has an output voltage of approximately 800 mv. However the devices 54 themselves can be made to operate with data input voltages of only 400 mv. Therefore each ~185303 device 54 has the ability to provide data outputs at 400 mv when it is driving the expansion input part of another device 54, or to provide data outputs at 800 mv when it is driving an external device such as an ECL
logic gate or other electronic component which requires E(:~L or pseudo 5 ECL type input logic levels in the range of an 800 mv signal swing.
In addition to reducing the output voltage by one half, the associated internal current required to bias the output stage can also be reduced by one half for the same load impedance (i.e. 100 ohms), or by more than half if the load impedance is increased (e.g. to 200 ohms).
For this purpose, and as shown in Fig. 8, each output stage and buffer 86 is controlled by bandgap reference control circuit 100, which in turn is controlled by an external resistor 102. Depending on the value of resistor 102, the control circuit 100 sets the data outputs 88 at 400 mv or 800 mv .
Typically there are three modes of operation, as follows:
Output Value of OutputStage Di~erel,lial Mode Resistor 102 ECL Voltage Load Drive Power 2 KQ 800 mv 100 Q normal 2 4 KQ 400 mv 100 Q lower 3 6 KQ 400 mv 200 Q lowest The load drive resistors of 100 ohms (not shown) will simply be external resistors connected across the di~r~lllial data outputs. The 200 ohm resistors are the integrated resistors 97.
Using the Fig. 8 arrangement, the devices 54-1, 54-2 in Fig. 7 20 can for example be operated at lowest power, since they are simply driving further devices 54-3, 54-4. The devices 54-3, 54-4, whose outputs are connected to external circuits, will be operated at normal power. This arrangement saves power and reduces heat dissipation. -~18!;303 -g While preferred embodiments of the invention have been described, it will be appreciated that various changes can be made within the spirit of the invention, and all are intended to be within the scope of the appended claims.
EXPANSION INPUTS
FIELD OF THE INVENTION
This invention relates to a crosspoint switch. In particular it 5 relates to a unique pin-out arrangement for a crosspoint switch, and to expansion input port architecture for a crosspoint switch.
BACKGROUND OF THE INVENTION
Crosspoint switches are electronic devices that are used to route data inputs to data outputs via a programmed configuration. The 10 input/ output mapping can be altered at any time using programming logic inputs to the device, so that a configurable switching matrix can be designed.
One of the significant challenges in digital data switching matrix design is the connection of multiple crosspoint switches or devices 15 together to create larger switching matrices. In the past this has been accomplished by using complex multilayer circuit boards, and high speed switches or multiplexers which are connected to multiple crosspoint devices.
The use of external multiplexers and complex printed circuit 20 boards has led to many difficulties, including difficulties in assembling thematrix into a compact configuration, crosstalk problems, and difficulty in terminating traces on the circuit board.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention in one of 25 its aspects to provide a pin-out arrangement for a digital data crosspoint switch which facilitates the design of a switching matrix using a number of individual crosspoint devices, and which at the same time reduces signal crosstalk and circuit board routing complexity. In this aspect the invention provides a crosspoint device containing a crosspoint switch and having:
~18~303 (a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, a second pin being located opposite at least some of said input pins, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) the second pms opposite said data input pins being "no connect" pins which are not electronically connected to said crosspoint switch.
In another aspect the invention provides expansion input ports for digital crosspoint devices, so that the devices can again be assembled in a matrix in a simple manner while reducing the need for complex printed circuit boards and also reducing input/output crosstalk.
In this aspect the invention provides a crosspoint device containing a crosspoint switch and having:
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) said device also having a third and a fourth side each extending between said first and second sides, said third side containing output pins and said fourth side containing expansion data input pins coupled to said output pins, (f) said expansion data input pins being self terminated.
Further objects and aspects of the invention will appear from the following description, taken together with the accompanying 30 drawings.
~18~303 BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings: -Fig. lA is a block diagram of a prior art multiplexed input array of crosspoint devices;
Fig. lB is a block diagram of another prior art input array of crosspoint devices;
Fig. 2 is a block diagram of a multiplexed output array for crosspoint devices;
Fig. 3 is a block diagram showing prior art bussed outputs for a crosspoint device array;
Fig. 4A is a diagrammatic view of a pair of crosspoint devices according to the invention;
Fig. 4B is a diagrammatic view of a portion of a printed circuit board showing traces used with the device of Fig. 4A;
Fig. 5 is a block diagram of a crosspoint device having expansion input port architecture;
Fig. 6 shows in more detail a portion of the Fig. 5 arrangement;
Fig. 7 is a block diagram showing a matrix of devices 20 connected together and using the expansion input port architecture of Figs.
~ 5 and 6; and Fig. 8 shows optional detail for the Figs. 5 and 6 device.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Reference is~st made to Fig. 1, which shows a conventional 25 prior art crosspoint switch array having two n x n crosspoint devices 20, 22 having inputs 24, 26. In the past it was common to connect multiple crosspoint devices together to create larger switching matrices by the use of complex multi-layer circuit boards and high speed switches or multiplexers, such as multiplexer 28. Multiplexer 28 is connected to the 30 inputs 24, 26 to create an n x m switching matrix, where n<m. Similarly, the outputs of the crosspoint devices were required to be multiplexed '_ together to create a switching matrix, as shown in Fig. 2. In Fig. 2 the outputs 30, 32 of crosspoint devices 20, 22 are connected to another multiplexer 34 having outputs 36. (Alternatively, the inputs of crosspoint devices 22, 24 can simply be connected together as shown in Fig. lB, but this is not suitable for their outputs, as will be discussed.) It is possible to provide devices which have outputs which are turned "on" or "off" utilizing a configuration interface. These switching matrix designs would not require external multiplexers in order to be connected together, and are illustrated in Fig. 3, where two switching crosspoint devices 40, 42 are illustrated as being connected together at connections 44 on a circuit board 46. Unfortunately, the design shown in Fig. 3 may suffer from crosstalk problems, particularly in the connection area 44 where the output traces 48 of one crosspoint device 40 cross the output traces 50 of the other crosspoint device 42. In addition, it will suffer from signal degradation from the interconnection of "off" outputs with "on" outputs. Further, since vias in the circuit board are required to connect the crosspoint devices' outputs to the output bus, additional crosstalk problems can occur. The output traces on the circuit board are also difficult to control and to terminate properly.
Reference is next made to Fig. 4A, which shows a crosspoint device 54 which facilitates connection of the device to a printed circuit board, and which also has other advantages which will be described.
The crosspoint device 54 of Fig. 4A is rectangular in plan, having left and right sides 56, 58 and top and bottom sides 60, 62. The device 54 has input pins 64 at its left hand side, output pins 66 at its bottom side, control pins 68 at its right hand side, and self terminated expansion input pins 70 (to be described) at its top side. All of these pins, whether used or not, are soldered to the circuit board 72 (Fig. 4B) to which the device 54 is connected, for a secure mechanical connection.
It will be seen that the input pins 64 include a number of data input pins marked from IN0, IN0-B to IN7, IN7-B. According to the invention, the pins on the side of the device 54 opposite to these input ~185303 data pins, namely pins 74, are "no connect" pins and are not used for any other purpose. As best shown in Fig. 4B, the circuit board traces 76 which carry the data inputs to the data input pins IN0, IN0-B to IN7, IN7-B are bussed across the circuit board and are connected to the "no connect" pins 5 74 and continue across the circuit board to be connected to the next crosspoint device 54A, as shown in Fig. 4A.
Because the only pins on the right hand side 58 of the device 54 which are connected to the circuit board traces 76 are the "no connect"
pins 74, and since pins 74 are not connected to any internal circuitry in 10 device 54, it is possible to route the circuit board traces 76 along a singlelayer of the circuit board 72. There is no need to have these traces routed down to a lower layer of the circuit board to go under the pins 74 and then to route them back up to the surface of the board for connections.
The arrangement shown in Figs. 4A and 4B therefore has a 15 number of advantages. Firstly, it lowers the complexity of the circuit board 72 needed to hold a matrix of crosspoint devices, since fewer layers are needed for the circuit board. Secondly, it reduces the signal degradation effects which would normally be caused by vias and corners in the printed circuit board traces for high frequency digital data such as serial digital 20 video data. Thirdly, it facilitates the simple design of large matrices made from individual crosspoint devices, and it allows higher crosspoint device density on a switching matrix circuit board. Finally, it allows all inputs to have a single line termination, since any number of devices can be located on a single trace 76, and yet only one termination is needed, at the end of 25 that trace.
Reference is next made to Fig. 5, which shows expansion input port architecture for a crosspoint device 54. In the past, crosspoint devices have normally included data inputs 80 (connected to the data input pins of Fig. 4A), directed to an input buffer 82, which in turn is 30 connected to the matrix (shown for example as an 8 x 8 matrix) 84 of crosspoints or switches. The matrix 84 is in turn connected to the matrix an output buffer 86 connected to data outputs 88 (the output pins OUT1, ~185303 OUT1-B to OUT7, OUT7-B of Fig. 4A). The control inputs 90 are in turn connected to control input latches 92 which are used to control the matrix 84.
A difficulty with the prior art arrangement as described is that 5 it has been very difficult to connect multiple crosspoint devices together in a matrix. Since external multiplexers were used, the architecture became cumbersome.
As shown in Fig. 5, the invention in one aspect provides self terminated expansion data inputs 96 on the top side 60 of the crosspoint device 54. These are connected to pins EXP0, EXP0-B to EXP7, EXP7-B of Fig. 4A. The reference to "self terminated" means that there is a transmission line impedance 97 (Fig. 6) located internal to the expansion port input. An impedance 97 is thus connected across each pair of pins EXP0, EXP0-B to EXP7, EXP7-B. This impedance can take the form of an 15 active device (Bipolar, MOS, FET transistor(s)) or circuit or a passive device (resistor, capacitor, inductor) or circuit. Resistors 97 are shown as an exemplary implementation. Resistors 97 are integrated as part of the device 54 and are not external. The self terminated expansion data inputs 96 are connected through buffer 98 to a 2 x 1 multiplexer 100, which is in 20 turn connected to the crosspoint matrix 84 and to the data output buffer 86.
In Fig. 5 the control inputs 90 control the crosspoint matrix 84 as usual and also control the multiplexer 100 so that the desired outputs (either from the data inputs 80 or directly from the self terminated expansion data inputs 96, as selected) are fed to the combined output stage and buffer 86 25 and hence to the data outputs 88.
It will be seen that in operation, the multiplexer 100, under control of the control latches 92, will direct either the outputs from the crosspoint array, or the expansion data inputs, to output buffer 86, and hence to the data outputs 88. Thus, data received on the self terminated 30 expansion data inputs is routed directly through the device 54 to the data outputs, rather than being routed through the circuit board. This allows additional devices to be added easily to widen the matrix, as explained in connection with Fig. 7.
' 2~35303 Fig. 7 shows an example in which four crosspoint devices 54-1, 54-2, 54-3, 54-4 are connected together in a matrix. As shown, the data inputs 80-1 for device 54-1 are connected to the input pins 64-1 of device 54-1 and are also bussed across device 54-1 and are connected to the input 5 pins 64-2 of device 54-2 (using the arrangement of Figs. 4A, 4B).
A second set of data inputs 80-2 is connected to the data input pins 64-3 of device 54-3 and is also bussed across device 54-3 and connected to the data input pins 64-4 of device 54-4, again using the arrangement of Figs. 4A, 4B.
The data outputs 88-1 of device 54-1 are connected to the self terminated expansion data inputs 96-3 of device 54-3. Similarly, the data outputs 88-2 of device 54-2 are connected to the self terminated expansion data inputs 96-4 of device 54-4. The data outputs of devices S4-3, 54-4 are shown at 80-3, 80-4 respectively.
The arrangement shown in Fig. 7 avoids the need to run traces from the outputs of the crosspoint device to a common output bus, and therefore crosstalk between output channels, and signal degradation due to signal reflections on the transmission line, can be greatly reduced.
In addition, in the Fig. 7 arrangement fewer circuit board layers are needed 20 since the data outputs of each device simply line up. Further, because the data outputs are routed from the top of the switching matrix to the bottom through the devices 54 themselves and not beneath the devices, inputs can be simply bussed across the board without concern about input/output crosstalk (since the data input traces 76 do not cross output traces in the 25 circuit board). The use of self terminating expansion ports eliminates the need for external line terminating resistors, allowing a much denser interconnect between the data outputs of one crosspoint device and the expansion port inputs of another crosspoint device.
Reference is next made to Fig. 8, which shows a power saving 30 arrangement. Normally each crosspoint device 54 has an output voltage of approximately 800 mv. However the devices 54 themselves can be made to operate with data input voltages of only 400 mv. Therefore each ~185303 device 54 has the ability to provide data outputs at 400 mv when it is driving the expansion input part of another device 54, or to provide data outputs at 800 mv when it is driving an external device such as an ECL
logic gate or other electronic component which requires E(:~L or pseudo 5 ECL type input logic levels in the range of an 800 mv signal swing.
In addition to reducing the output voltage by one half, the associated internal current required to bias the output stage can also be reduced by one half for the same load impedance (i.e. 100 ohms), or by more than half if the load impedance is increased (e.g. to 200 ohms).
For this purpose, and as shown in Fig. 8, each output stage and buffer 86 is controlled by bandgap reference control circuit 100, which in turn is controlled by an external resistor 102. Depending on the value of resistor 102, the control circuit 100 sets the data outputs 88 at 400 mv or 800 mv .
Typically there are three modes of operation, as follows:
Output Value of OutputStage Di~erel,lial Mode Resistor 102 ECL Voltage Load Drive Power 2 KQ 800 mv 100 Q normal 2 4 KQ 400 mv 100 Q lower 3 6 KQ 400 mv 200 Q lowest The load drive resistors of 100 ohms (not shown) will simply be external resistors connected across the di~r~lllial data outputs. The 200 ohm resistors are the integrated resistors 97.
Using the Fig. 8 arrangement, the devices 54-1, 54-2 in Fig. 7 20 can for example be operated at lowest power, since they are simply driving further devices 54-3, 54-4. The devices 54-3, 54-4, whose outputs are connected to external circuits, will be operated at normal power. This arrangement saves power and reduces heat dissipation. -~18!;303 -g While preferred embodiments of the invention have been described, it will be appreciated that various changes can be made within the spirit of the invention, and all are intended to be within the scope of the appended claims.
Claims (11)
1. A crosspoint device containing a crosspoint switch and having:
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, a second pin being located opposite at least some of said input pins, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) the second pins opposite said data input pins being "no connect" pins which are not electronically connected to said crosspoint switch.
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, a second pin being located opposite at least some of said input pins, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) the second pins opposite said data input pins being "no connect" pins which are not electronically connected to said crosspoint switch.
2. The invention according to claim 1 wherein said device is connected to a circuit board, said input and said second pins all being soldered to said circuit board, and including data input traces on said circuit board connected to said input data pins, said data input traces extending beneath said device and also being connected to said no connect pins.
3. The invention according to claim 2 including at least two said crosspoint switch devices connected to said circuit board and all having input data pins connected to said data input traces on said circuit board.
4. The invention according to claim 3 wherein said data input traces run at a single level in said circuit board.
5. The invention according to claim 1 wherein said crosspoint device has a third side extending between said first and second sides, said third side including expansion data input pins.
6. The invention according to claim 5 wherein said expansion data input pins are self terminated.
7. The invention according to claim 6 wherein said crosspoint device has a fourth side opposite said third side, said fourth side having a set of data output pins coupled to said crosspoint switch and to said expansion data input pins.
8. The invention according to claim 7 and including a circuit board, and a plurality of said devices arranged on said circuit board in a plurality of rows and columns, said data input pins being arranged in rows and said data output pins of some of said devices being connected in said columns to said expansion data input pins of others of said devices.
9. The invention according to claim 8 wherein said devices include a first set of said devices which drive a second set of said devices, and wherein said second set of said devices are adapted to be connected to external circuit elements, and including means for operating the data output pins of said first set of devices at a lower output power than the data output pins of said second set of devices.
10. A crosspoint device containing a crosspoint switch and having:
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) said device also having a third and a fourth side each extending between said first and second sides, said third side containing output pins and said fourth side containing expansion data input pins coupled to said output pins, (f) said expansion data input pins being self terminated
(a) first and second opposed sides, (b) a plurality of input pins on said first side, (c) a plurality of second pins on said second side, (d) some of said input pins being data input pins coupled to said crosspoint switch, (e) said device also having a third and a fourth side each extending between said first and second sides, said third side containing output pins and said fourth side containing expansion data input pins coupled to said output pins, (f) said expansion data input pins being self terminated
11. The invention according to claim 10 wherein said crosspoint switch includes a crosspoint array, and a two to one multiplexer coupled to each of said crosspoint array and said self terminated expansion data input pins, said multiplexer being coupled to said data output pins for selectively directing outputs from said crosspoint array or from said self terminated expansion data inputs to said data output pins.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA 2185303 CA2185303A1 (en) | 1996-09-11 | 1996-09-11 | Crosspoint switch with improved pin-outs and expansion inputs |
| PCT/CA1997/000639 WO1998011756A1 (en) | 1996-09-11 | 1997-09-09 | Crosspoint switch |
| AU41945/97A AU4194597A (en) | 1996-09-11 | 1997-09-09 | Crosspoint switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA 2185303 CA2185303A1 (en) | 1996-09-11 | 1996-09-11 | Crosspoint switch with improved pin-outs and expansion inputs |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2185303A1 true CA2185303A1 (en) | 1998-03-12 |
Family
ID=4158891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2185303 Abandoned CA2185303A1 (en) | 1996-09-11 | 1996-09-11 | Crosspoint switch with improved pin-outs and expansion inputs |
Country Status (3)
| Country | Link |
|---|---|
| AU (1) | AU4194597A (en) |
| CA (1) | CA2185303A1 (en) |
| WO (1) | WO1998011756A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103645421B (en) * | 2013-12-13 | 2016-04-13 | 桂林电子科技大学 | High-speed interconnect path Crosstalk Faults method of testing |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3564896D1 (en) * | 1984-06-12 | 1988-10-13 | Siemens Ag | Space division multiplex switching network |
| EP0238712A1 (en) * | 1986-01-27 | 1987-09-30 | Siemens-Albis Aktiengesellschaft | Controlled commutator matrix |
| ATE103442T1 (en) * | 1988-12-23 | 1994-04-15 | Siemens Ag | MODULAR EXPANDABLE DIGITAL ONE-STAGE SWITCHING NETWORK IN ATM (ASYNCHRONOUS TRANSFER MODE) - TECHNOLOGY FOR FAST PACKET SWITCHED INFORMATION TRANSFER. |
| JP2775975B2 (en) * | 1990-03-28 | 1998-07-16 | ソニー株式会社 | Matrix switcher device |
| WO1992009176A1 (en) * | 1990-11-15 | 1992-05-29 | Nvision, Inc. | Switch composed of identical switch modules |
| DE4232267C2 (en) * | 1992-09-25 | 2001-08-16 | Siemens Ag | Printed circuit board with optimized module arrangement, especially for switching matrixes with a high data rate |
-
1996
- 1996-09-11 CA CA 2185303 patent/CA2185303A1/en not_active Abandoned
-
1997
- 1997-09-09 AU AU41945/97A patent/AU4194597A/en not_active Abandoned
- 1997-09-09 WO PCT/CA1997/000639 patent/WO1998011756A1/en active Application Filing
Also Published As
| Publication number | Publication date |
|---|---|
| WO1998011756A1 (en) | 1998-03-19 |
| AU4194597A (en) | 1998-04-02 |
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| Date | Code | Title | Description |
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