CA205283A - Mecanisme d'atterrissement repliable pour aeroplanes - Google Patents

Mecanisme d'atterrissement repliable pour aeroplanes

Info

Publication number
CA205283A
CA205283A CA205283A CA205283DA CA205283A CA 205283 A CA205283 A CA 205283A CA 205283 A CA205283 A CA 205283A CA 205283D A CA205283D A CA 205283DA CA 205283 A CA205283 A CA 205283A
Authority
CA
Canada
Prior art keywords
aeroplanes
landing gear
folding landing
folding
gear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA205283A
Other languages
English (en)
Inventor
H. Megaffin Morton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Publication date
Application granted granted Critical
Publication of CA205283A publication Critical patent/CA205283A/fr
Expired legal-status Critical Current

Links

CA205283A Mecanisme d'atterrissement repliable pour aeroplanes Expired CA205283A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA205283T

Publications (1)

Publication Number Publication Date
CA205283A true CA205283A (fr) 1920-11-02

Family

ID=35099062

Family Applications (1)

Application Number Title Priority Date Filing Date
CA205283A Expired CA205283A (fr) Mecanisme d'atterrissement repliable pour aeroplanes

Country Status (1)

Country Link
CA (1) CA205283A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6718431B2 (en) * 1997-10-10 2004-04-06 Rambus Inc. Apparatus and method for pipelined memory operations

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6718431B2 (en) * 1997-10-10 2004-04-06 Rambus Inc. Apparatus and method for pipelined memory operations

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