CA2046591A1 - High index color encoding system - Google Patents

Abstract

A high index color encoding system (10) is provided for the purpose of receiving RGB video input from a personal computer or similar device and generating video signals in other formats for use by conventional video equipment. The color encoding system (10) includes operational circuitry (30) adapted to shape and modify the chrominance portions of the signals at a relatively high carrier frequency of four times the NTSC standard frequency with the lower NTSC output carrier being reconstituted by a doubly balanced mixer (266) component, thus substantially improving signal quality. The operational circuitry further includes synchronization generation circuitry (148), a Y, I, Q matrix (66) for creating luminance and chrominance components from RGB signals, an I, Q
modulator (96) for producing high quality chrominance output and a dynamic aperture (246) for enhancing the rise slope of the luminance signal, among other components. Various available video outputs to the system (10) are user selectable and user adjustable for compatibility with desired end use equipment and formats. The primary expected uses of the system are in graphics generation applications, utilization of conventional video equipment for computer video display and in memorialization of computer display sequences.

Description

wo9o/os723 PCT/VS90/00749 ~ ~ ~q ~ ~ 9 ~

3 TECHNICAL FI~I~

The present invention relates generally to video and 6 television apparatus, and more particularly to signal 7 encoding systems relating to RGB input signals.
9 BACKGROUN'e ART
11 Numerous methods exist for creating, transmitting and 12 translating electrical signals corresponding to visual 13 images. These methods of creating and manipulating video 14 signals have, over the years, been developed in order to correspond with technology for electronically capturing 16 visual images and reproducing them at another site or in a 17 different medium.' A variety of different standards have been 18 created in order to achieve some predictability in this 19 field, but these standards differ widely throughout the world' "' due to differences in equipment and historical perspective.
21 Color signals are considerably more complex than black/white 22 and produce additional complications.
23 One result of the variety of different signal encoding 24 and processing systems and standards has been the necessity for devices to translate a given signal from one signal 26 scheme to another without substantial loss of resulting 27 picture quality. Some examples of various methods and 28 devices which have been utilized for this purpose are 29 illustrated in U. S. Patents No. 3,946,432, issued to A.
Goldberg et al.; No. 4,266,241, issued to B. H~ortzberg; No.
31 4,227,204, issued to J. Rossi; No. 4,739,313, issued to M.
32 Oudshoorn et al.; and No. 4,766,484 issued to J. Clayton et 33 al.
~4 Although a number of various techniques hav'e been 3~ developed for translating certain types of input signals to .6 certain types of outputs there remain gaps in the technology.
37 Various commercial devices exist for translating specific 38 inputs to specific outputs. Devices such as those described 3~ in the Oudshoorn et al patent are intended for use in converting a standard composite video signal for display on a !
SUaSTlTUTE SHEET

WO90/09723 ~ 1 PCT/US9~/00749 1 computer type monitor which utilizes RGB signals. Howeve 2 no products or methods are known to the inventor for 3 converting computer generated RGB inputs for encoding for 4 display in a variety of different display signal modes. The present invention is intended to fill that gap.
6 A common problem encountered in video signal processing 7 apparatus is the degradation of the output signal quality 8 caused by the encoding and decoding processes. The above 9 cited patents, in addition to various commercial devices and techniques, reflect a number of different attempts to 11 maximize the picture quality which can be derived as a result 12 of the video output signal generated thereby. However, due 13 to various inherent difficulties, no completely successful 14 and economically feasible methods have yet been devised.

18 Accordingly, it is an object of the present invention to 19 provide an economical asse~'oly for encoding RGB video signal input and providing video output signals in a variety of 21 formats, including NTSC standard.
~2 Another object of the present invention is to provide an 23 RGB input encoding device which generates excellent output 24 signal clarity and quality in each output format.
It is a further object of the present invention to 26 minimize or eliminate signal cross talk.
27 It is yet another object of the present invention to 28 provide an analog encoding assembly for RGB video signal 29 inputs.
It is a still further object of the present invention to 31 provide a single assembly which is capable of providing 32 simultaneous output to a variety of different end elements.
33 Briefly, the preferred embodiment of the present 34 invention is a h.igh index coherent color encoding system for RGB video input which is adapted to take video signals 36 generated in an RGB mode and to convert the signals for 37 output to devices requiring othex modes of video input 38 signals, such as composite video, Y/C format, and other 39 formats common to NTSC, PAL, VHS, SVHS and other industry standards and formats. The system is particularly well 51UB5~ITUT S~EE~

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WO90/09723 ~ 4~ ~ 9 ~ PCT/US90/00749 1 adapted for utilizing computer generated RGB outputs to 2 produce signals usable on a wide variety of devices not 3 normally intended for use with computers.
4 The preferred embodiment of the color encoding system is an assembly of electronic components arrayed in a particular 6 circuitry pattern for the purpose of modification of input 7 signals so as to produce appropriately modulated output 8 signals of varying configurations and frequencies. The 9 preferred embodiment particularly utilizes a method of modulation of the signals at a frequency substantially higher 11 than that of standard NTSC utilization with regeneration of 12 the NTSC frequency achieved by a doubly balanced mixer 13 component after the completion of the other signal processing 14 steps. This results in the elimination of cross talking among the signal components during processing, due to the 16 high frequency, and produces a higher quality NTSC output 17 signal. The particular frequency selected for the preferred 18 embodiment of the present invention is 14.318 MHz, or four 19 times the NTSC carrier frequency of 3.579 MHz, which is also 910 times the standard horizontal sync frequency.
21 An advantage of the present invention is that it permits 22 a single economical device to take input generated in RGB
23 format and provide output to most commercial video devices 24 which may be selected by the end user, thus eliminating the need for a variety of encoding and decoding devices.
26 Another advantage of the present invention is that the 27 analog dynamic aperture correction approach utilized 28 approximates a perfect s~uare wave and thus results in a 29 sharper output signal.
A further advantage of the present invention is that the 31 use of the higher frequency carrier during modulation permits 32 more efficient filtering and elimination of out of band 33 signal noise.
34 These and other objects and advantages of the present invention will become clear to those skilled in the art in 36 view of the description of the best presently known mode of 37 carrying out the invention and the industrial applicability 38 of the preferred embodiment as described herein and as 39 illustrated in the several figures of the drawing.
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WOgo/09723 PCT/US90/007~9 BRIEF DESCRIPTION OF THE DRAWINGS

3Fig. 1 is a cut-away perspective view of the preferred 4embodiment of the high index coherent color encoding system 5of the present invention;
6Fig. 2 (parts 2a and 2b) is a schematic illustration of 7the operational circuitry of the preferred embodiment;
8Fig. 3 is a schematic illustration of the I,Q modulator 9component of the preferred embodiment;
lOFig. 4 is a schematic illustration of the sync 11generation subcircuit component of the preferred embodiment;
12 and 13Fig. 5 is a schematic illustration of the local 14oscillator sync generation subcircuit component of the ~preferred embodiment.

17BEST MODE OF CARRYING OUT ~ INVEN~ION

19The present invention is a high index coherent color 20encoding system particularly adapted for encoding RGB video 21input for output in a variety of different sche~a. The 22preferred embodiment of the encoding system is adapted for 23providing output in NTSCtcomposite video), Y/C, PAL, 629/688 24KHz, and a variety of other output formats. The system is 2~adapted for utilization throughout the world with any color 26video output of the RGB type, such as the well CGA graphics 27scheme.
28A preferred embodiment of the high index coherent color 29encoding system of the present invention, shown as expected 30to be packaged for commercial utilization, is illustrated in 31a cut-away perspective view in Fig. 1 and is referred to by 32the general re~erence character lO. The color encoding 33system lO is shown as including a variety of electrical and 34electronic elements enclosed within a housing 12.
35The electrical power for the color encoding system lO is 36provided by a AC po,wer cord 14 which is adapted for 37connection to ordinary wall power. In the United States this 38will ordinarily be llO volt 60 cycle AC. The AC power cord 3914 connects to an internal power supply 16 which provides DC
40power to the internal components of the system lO. In the 5UBSTITUTE SHE~`

WO90/~9723 ~ $~ ~ ~ PCT/US90/00749 1 preferred embodiment lO, the internal power supply 16 2 provides output to the various other components at DC power 3 voltages of +12, +5, -5, and/or -12 volts.
4 Within the housing 12 is situated an array of potentiometers 18. The potentiometers 18 are variously 6 controlled either by external power control knobs 20 situated 7 on the front of the housing 12, where they are accessible to 8 the user, or by internal potentiometer controls 22, which may 9 be factory or technician adjusted to compensate for variations in various circuitry elements from unit to unit.
11 A user selectable LO (Local Oscillator) switch 24 is also 12 provided on the exterior of the housing 1~ to permit the user 13 to select the frequency of an alternate, lower freqency 14 chrominance output (VHS versus U-Matic) desired in a given situation.
16 The exterior of the housing also includes one or more 17 input ports 26 which are connected to a computer or similar 18 device and a plurality of output ports 28 which permit the 19 system 10 to be connected to one or more video output devices.
21 The input ports 26, the potentiometer array 18, the LO
22 switch 24 and the output ports 28 are all connected to an 23 operational circuitry subassembly 30 which is situated within 24 the housing 12. The primary thrust of the present invention is to be found in the operational circuitry 30. The 26 operational circuitry 30 appropriately modifies the signals 27 received through the input ports 26 and delivers usable 28 output signals to the output ports 28.
29 The preferred embodiment of the operational circuitry of the present invention is illustrated in a schematic view in 31 Fig. 2 (broken into Figs. 2a and 2b for illustration 32 purposes). In this illustration the operational circuitry 30 33 is illustrated schematically. For the purposes of discussion 34 the circuitry 30 is best understood from a consideration of various signals, signal pathways, and signal modification 36 components. Accordi~ngly, the following discussion will 37 center on the various signal modification components of the 38 invention and how each of them acts upon the various signals 39 translated therebetween.
~0 The operational circuitry 30 of the preferred embodiment ~i~STITUTE S~E~
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WO90/09723 ~, 3 ;1~ ~'2~ PCT/USs0/0074s 1 is adapted to operate upon a multiplicity of external~
2 generated input signals 32 which are combined with a 3 multiplicity of system-generated input signals 34 and carried 4 to a variety of signal modification elements 36 along electrically conductive pathways 38. The external input 6 signals 32 are received by the system 10 though the input 7 ports 26. The system-generatad input signals 34 are 8 adjustable signals derived from the internal power supply 16 g and the potentiometer array 18. At various schematic locations within the operational circuitry 30 the conductive 11 pathways 38 intersect at pathway branching junctions 40.
12 Once the external input signals 32 have been acted upon by 13 one or more of the signal modification elements 36 and, in a most cases, have been combined with system input signals 34, they are referred to as internal signals 42. When the 16- internal signals 42 have been finally modified to their form 17 for delivery to external devices they are referred to as 18 output signals 44.
19 With reference to Fig. 2a, the first of the signal modification elements 36 illustrated is an input 21 amplifier/clamp 46 which is adapted to receive external input 22 signals 32 in the nature of an red input ~ 48, a green input 23 G 50, and a blue input B 52 from the computer or similar RGB
24 output device. The R, G, and B input signals 48, 50 and 52 are typically in the form of amplitude modulated sine wave 26 signals delivered to the input amplifier/clamp 46 over 27 separate conductive pathways 38 from the input ports 26.
28 ~epending on the type of input from the RGB signal generating 29 device, these signals may also be in the form of TTL logic signals. The operational circuitry 30 is adapted to 31 successfully operate with either type of input.
32 The input amplifier/clamp 46 also receives as input a 33 pair of system generated input signals 34 in the nature of an 34 overall gain input 54 and a black level input 56. Both the 3~ overall gain system input 54 and the black level gain system 36 input 56 (also known as the clamp level input 56), are user 37 controlled via the potentiometer control knobs 20 associated 38 therewith appearing on the ~ront of the housing 12. These 3~ are voltage signals in the form of DC current and are utilized to amplify the voltage of the incoming R,G and B
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WO90/09723 ~ 'Jl PCT/US90/00749 1 signals 48, 50 and 52 to levels appropriate for utility 2 within the remainder of the operational circuitry 30. The 3 input amplifier/clamp 46 also receives as input an internal 4 signal 42 in the form of a blanking or clamp pulse BL 58.
The .blanking pulse BL 58 is generated within the ~.
. 6 synchronization signal generation components which will be 7 discussed hereinafter.
8 The output of the input amplifier/clamp 46 is in the . g form.of a trio of internal signals 32 which are in the form of amplified versions of the red, green and blue input .
11 signals 48, ~0 and 52. The internal signals 42 are in the 12 form of an amplified red signal R+ 60, and amplified green ;
13 signal G+ 62 and an amplified blue signal B+ 64. With the 14 exception of amplification, and DC level the R+, G+ and B+
60, 62 and 64 are unaltered from the R,G and B signals 48, 50 . 16 and 52. -- 17 The R+, G+ and B+ signals 60, 62 and 64 are then carried ~ 18 on conductive pathways 38 to a Y,I,Q matrix 66. In addition .. 19 to these three signals the Y,I,Q matrix 66 also receives as : 20 input the blanking pulse BL 58, a sync pulse SY 70 and a 21 burst flag pulse BF 72, generated by the synchronization 22 components. The blanking pulse 58 is branched at a first - 23 branch junction 68 from the blanking pulse BF58 delivered to 24 the input amplifier/clamp 46.
. 25 A group of system generated signals 34 also serve as - 26 inputs to the Y,I,Q matrix 66. These include a sync level ::. 27 signal SL 74, a burst level signal BV 76, a luminance level 28 signal YL 78 and a burst phase signal BP 80. The sync level . 29 signal 74 and the burst level signal 76 are in the range .. 30 mAmps and are internally tweaked or adjusted by the factory . 31 or the technical personnel utilizing the internal 32 potentiometer controls 22 in order to achieve the desired 33 shaping and level of output. The burst phase input 80 is - 34 utilized to conform the phase of the I & Q signals ~: 35 particularly and is also adjusted by the internal 36 potentiometer controlsl 22. The luminance level input 78 is 37 in the range of 0-12 to volts and is user adjusted by one of 38 the potentiometer control knobs 20 appearing on the housing 39 12 in order to provide the proper luminance output. .
: 40 The Y,I,Q matrix ~6 is a composite of three differential : ' ~;UE35TlT13Te. S~

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WogO/09723 PCT/US90/00749 1 amplifiers with a resistive matrix which is utilized 2 convert the R+, G+ and B+ signals 60, 62 and 64 into the 3 conventional color composite signals in the nature of a 4 luminance signal Y 82 an I chrominance signal 84 and a Q
chrominance signal 86 which are the output of the Y,I,Q
6 matrix 66. These three output signals are conventionally 7 generated as combinations of the incoming R+. G+ and B+
8 signals 60, 62 and 64 accord:in~ to established industry 9 ratios.
lo According to industry standard, and as utilized in the 11 color encoding system lO the luminance signal Y 82 is derived 12 as +0.30 R+, +0.59 G+ and +0.11 B+. The Y signal 82 13 corresponds to the black and white intensity of the video 14 signal.
The I chrominance signal 84 is one of the two 16 conventional chrominance or color component signals which is 17 standard in the industry. The I chrominance signal 84 is 18 comprised of +0.60 R+, -0.28 G+. and -0.32 B+. Similarly, 19 the Q chrominance signal 86, the other conventional chrominance component signal, is comprised of +0.21 R+, -0.52 21 G+, and +0.31 B+.
22 The Y,I, and Q signals 82, 84 and 86 generated in the 23 Y,I,Q matrix 66 are then delivered over separate conductive 24 pathways 38 to an additional signal modification element 36 in the form of a CTI delay 88. The CTI delay 88 is in the 26 nature of a chroma transient improvement component including 27 two color differential amplifiers whose rise time is 28 controlled by the rise time of the Y signal 82. The CTI
29 delay component is utilized to insure that the transient edges of the I and Q signals 84 and 86 are aligned, thereby 31 eliminating any color fringe in the video output. The delay 32 section of the CTI delay matches the chrominance path length 33 of the I and Q signals 84 and 86 to the path length of the Y
34 signal 82. An additional system generated input signal 34 in 3s the form of a Y/C delay input 90 is also provided from the 36 potentiometer arr~y, as adjusted by the internal 37 potentiometer controls 22, in order to achieve- the delay 38 factor.
39 The output of the CTI delay 88 is in the form of a delayed I signal I' 92 a the delayed Q signal Q' 94. The .. : .
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WO90/09723 ~ ~ 9 1 PCT/~S90/00749 1~ unaltered Y signal 78 is also a output of the CTI delay 88.
2The delayed I signal I' 92 and the delayed Q signal Q' 394 are then delivered, still over separate conductive 4pathways 38, to an I,Q modulator 96. The internal components 5of the I,Q modulator 96 are discussed in more detail 6hereinafter with respect to Fig. 3. The I,Q modulator 96 is 7utilized to modulate and shape the I' and Q' signals 92 and 894 to provide chrominance signal on a single carrier.
9A group of additional system-generated input signals 34 10are also delivered to the I,Q modulator 96. These signals 11are in the nature of an I gain signal IG 98, an I balance 12signal IB lO0, a Q gain signal QG 102 and a Q balance signal 13QB 104. The I gain signal 98 and the Q gain signal 102 are 14current signals in the range of 0-14 mAmps and are controlled 15within this range by the user via the potentiometer control 16knobs 20 on the housing 12 which correspond to Q gain and I
17gain. The I balance signal 100 and the Q balance signal 104 18are voltage signals which are adjusted utilizing the internal 19potentiometer controls 22 by the factory or technicians in 20order to achieve properly balanced output for the particular 21components chosen.
22The I,Q modulator 96 also receives as inputs a pair of 23phase shifted frequency carriers in the nature of a 24quadrupled carrier 0 degrees signal 4fsc0 106 and a 90 25degrees offset quadrupled carrier 4fsc90 108, both of which 26are generated by the synchronization components. The 27resulting output of the I,Q modulator 96 is in the form of a 28quadrupled chrominance signal C4 llO which is delivered to a 29second branching junction 112 and split into three 30components.
31The specific structure of the IQ modulator device 96 is 32illustrated in schematic fashion in Fig. 3~ In this 33 - illustration it may be seen that the delayed I signal I' 92 34is delivered to a first balanced modulator 114 where it is 35combined with the quad carrier 90 4fsc90 108, the I gain 36signal IG 98 and thle I balance signal IB lO0. The first 37balance modulator 114 provides amplitude modulation and 38suppression O:e the carrier while combining the chrominance 39information of the I' signal 92 with the quad carrier 90 108 40which is at the relatively high frequency of four times NTSC

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WO 90/09723 2 ~ ~ r~ PCI'/I~S90/00749 1 standard. The high frequency insures that no cro~ ~
2 interference occurs between the modulation information and 3 the carrier. This operates to eliminate moving dots or 4 chroma shimmer in the final video picture. The output of the first balanced modulator is a balanced I signal I'' 116.
6 Similarly, the delayed Q signal 94 is delivered to a 7 second balanced modulator 118 substantially similar to the 8 first balanced modulator 114. In the second balanced 9 modulator 118 the delayed Q signal Q' 94 is combined with the zero degree offset quad carrier 106, the Q gain signal QG 102 11 and the Q balance signal QB 104. The output of the second 2 balance modulator 118 is a balanced Q signal Q'' 120.
13 The balanced I signal I'' 116 and the balanced Q signal 14 Q'' 120 are carried along separate conductive pathways 38 to a third pathway junction 122. At the third pathway junction 16 122 the signals combine into a balanced chroma signal CB 124.
17 It is feasible to combine the balanced I signal I'' 116 and 8 the balanced Q signal Q'' 120 into the single balanced chroma 19 signal CB 124 since the carriers for the I and Q components are offset by ninety degrees of phase. This prevents 21 interference between the I and Q components and allows the 22 entire I and Q chrominance information to be carrier in the 23 same signal, the balanced chromisignal CB 124.
24 The balanced chroma signal 124 is then delivered to a first buffer amplifier 126. As will be the case for the 26 other buffer amplifiers to be described herein, the first 27 buffer amplifier 126 has a high input impedance of 28 approximately 10,000 Ohms and a medium output impedance of ~9 approximately 500 Ohms. The buffer amplifiers are also one-way signal flow components and thus act as the equivalent of 31 check values to prevent a undesirable signal bixing. The 32 output of the first buffer amplifier is an amplified CB
33 signal CB+ 128.
34 The amplified CB signal 128, still at a primary carrier frequency of 14.318 MHz, but aIso including various 36 extraneous frequenci,es which may have been part of the 37 original R, G. and B signals or of the various additional 38 system inputs, :is delivered to a first band pass filter 130.
39 The purpose of the first band pass filter 130 is to eliminate extraneous frequencies from the signal and to allow only ;
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W090/09723 ,~ PCT/~S90/00749 1 those portions of the signal falling within a narrow 2 frequency range to pass through. In tha case of the first 3 band pass filter 130 the center fre~uency is 14.318 MHz and 4 the permissible band width is + or - 750 K~z. Accordingly, the output of the first band pi~ss filter includes only those 6 portions of the signal which are carried on the ~uad carriers 7 106 and 108 (14.318 MHz) and eliminates all extraneous 8 frequencies. The output of the first band pass filter is the g quad chrominance signal C4 llO discussed above.
As also discussed above, t:he quad chrominance signal C4 11 llO is carried from the first band pass filter 130 to the 12 second junction 112 where it is split into three signal 13 components which will be discussed hereinafter with respect 14 to Fig. 2b.
~5 In order to complete the discussion with relation to 16 Fig. 2a, it is now necessary to consider the synchronization 17 signal generation components of the operational circuitry 30.
18 These components are illustrated in Figs. 2a, 4 and 5.
19 The only external input signal 32 which is delivered to the synchronization generation components is in the form of a 21 house composite sync input 132. The house composite sync 22 signal 132 is delivered to the color encoding system lO
23 through one of the input ports 26 and is either generated by 24 the end user device, such as a VCR or television device or is separately generated within the studio or user's facility by 26 a synchronization signal generator.
27 The house composite sync input 132 is delivered to a 28 synchronization separator 134 where it is separated into its 29 individual components. The three synchronization components which are of significance to the color encoding system lO are 31 a vertical synchronization pulse V 136, a horizontal 32 synchronization pulse H 138 and a field ID sync F 140. The 33 field ID signal 140, also known as a drum signal, is 34 utilized, particularly in VHS and SVHS video tape aquipment to determine the video head pase relative to the video 36 signal. The field ID signal 140 is a nearly direct output 37 and will be discussed further with respect to Fig. 2b.
38 The horizontal sync pulse H 138 at a frequency of 39 approximately 15.7 KHz is delivered to a ~irst one shot 142 which is in the nature of a timer device which operates on . . .
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WO90/097~3 PCT/US90/00749 1 the hori20ntal sync pulse H 138 by taking the asymmetric 2 pulse and shaping it into a symmetrical square wave by 3 adjusting the timing of the positive and negative components 4 to be equal. The output of the first one shot 142 is a horizontal reference signal Hr 144.
6 From the first one shot 142 the horizontal reference Hr 7 144 proceeds to a fourth pat:hway junction 146 where it 8 branches to two components. Prom the fourth junction 146 g the horizontal reference pulse 144 is delivered to a primary sync generation subcircuit 148 and a local oscillator (LO) 11 sync generator subcircuit 150. The primary sync generation 12 subcircuit 148 is illustrated in schematic detail in Fig. 4 13 while the LO generator subcircuit 150 is similarly 14 illustrated in Fig. 5.
Referring now to Fig. a, the primary sync generation 16 subcircuit 148 is illustrated in schematic rashion. In this 17 illustration it may be seen that the only inputs to the sync 18 generation subcircuit 148 are the vertical sync pulse 136 and 19 the horizontal reference pulse 144. These internal signals 42 are delivered to the sync generation subcircuit 148 which 21 includes subcomponents in the nature of phase locked loop 22 subcircuits which assure that the fre~uency and phase of the 23 outputs therefrom are very finely controlled. The sync 24 generator subcircuit 148 may be thought of as including a horizontal loop subcomponent 152 and a vertical loop 26 subcomponent 154.
27 Considering first the horizontal loop subcomponen. 152, 28 it may be seen that the horizontal reference Hr 144, as 29 generated within the first one shot 142, is delivered to a first phase detector 156. The first phase detector 156 locks 31 the phase of the horizontal reference Hr 144 signal by 32 comparing it with an additional signal as will b~ discussed 33 hereinafter, based upon such comparison delivers a first 34- oscillator control signal OC1 158 to a first voltage ~ -controlled oscillator (VCO1) 160. The OC1 signal 158 is a 36 variable voltage sighal utilized to adjust the oscillation 37 frequency of the first voltage controlled oscillator 160 to 38 the desired level.
39 The first voltage controlled oscillator ("VCO") 160 is utilized for the primary frequency generation which is ~;~13ST3Tll~

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WO90/~97~3 PCT/US90/00749 l3 1 referenced to the horizontal sync signal 138 derived from the 2 house composite sync 132. The first VcO 160 is precisely 3 set at a frequency of 57, 272, 727 .16 HZ or 57 . 27 MHZ . If 4 this frequency is not achieved the horizontal loop 152 will tend to unbalance and the OC1 signal 158 will ~e adjusted by 6 the first phase detector 156 until the proper frequency of 7 oscillation obtains.
8 The output of the first ~CO 160 is at a frequency of 9 57.27 MHz and is in the form of a high frequency square wave 162. The HF signal 162 is then delivered to a second buffer 11 amplifier 164 where it is ampl:ified to produce an amplified 12 high frequency reference wave HF+ 166.
13 The amplified high frequency reference HR~ 166 is then 14 delivered to a quadrature divider i68. The quadrature divider 168 is a precision divider element which precisely 16 divides the hlgh frequency reference HR 166 into four 17 output signals, each at 14.32 MHz, offset from each other by 18 phase. In this case, each of the~four output signals of the 19 quadrature divider 168 are offset by ninety degrees of phase such that there is no mutual interference between 21 perpendicularly phased signals. Of course, if signals which 22 are 180 degrees offset from each other are combined they will 23 cancel. Two of these signals have been previously discussed, 24 these being the quad carrier 4fsc0 106 and the quad carrier 90 4fsc90 108 which are delivered to the IQ modulator 96. A
26 third output is a 180 degrees of offset quad carrier 180 27 4f5C180 170 which remains within the horizontal loop 152 and 28 is also known as the clock signal CLK 170. The fourth output 29 signal from the quadrature divider 168 is a 270 degrees ofset quad carrier 270 4f5C270 172 which will be discussed 31 hereinafter.

32 The clock signal CLX 170 continues within the horizontal 33 loop 152 to a synchronization generator 174. The sync 34 generator 174 is a complex frequency generation component which will be discussed in more detall hereinafter, but 36 includes as one of its outputs as horizontal drive pulse 176 37 which continues within the horizontal loop 152. The 38 horizontal drive pulse HD 176 is delivered to a second one 39 shot 178 which modifies the horizontal drive HD signal 176 to produce a square wave signal referred to as a modified .
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WOso/os723 PCT/US9~/00749 1 hori20ntal ~r~v~3 ~ ~ 180. The horizontal loop 152 is th 2 completed by delivering the modified horizontal drive signal 3 HD' 180 back to the first phase detector 156, where the phase 4 is compare with the horizontal reference signal Hr 144, as discussed above, and the OCl signal 158 is altered if 6 necessary.
7 The vertical loop 154 is much simpler in structure. In 8 the vertical loop 154 the vertical sync pulse 136 is 9 delivered to a vertical reset component 182. The vertical reset 182 generates as output a vertical reset signal Vr 184 ll which is delivered to the sync generator 174. The sync 12 generator 174 outputs a vertical drive signal 18~ which 13 completes the vertical loop 154 by being delivered back to 14 the vertical reset 182. The vertical reset 182 compares the vertical drive signal 186 with the vertical sync pulse 136 16 ultimately generated by the user's devices. If the signals 17 do not match then the vertical reset signal Vr 184 delivered 18 to the sync generator 174 resets the internal counters of the 19 sync generator 174 until a match is achieved and the phase is appropriately locked.
21 Returning now to the consideration of the sync generator 22 174, this component is in the nature of a an array of counter 23 elements, adaptable to be reset to zero by the vertical reset 24 signal 184. These counter elements act upon frequency pulse inputs to generate a multiplicity of internal signals 42 26 which are utliized by various signal modification components ~-27 36. The sync generator 174 receives as inputs only the clock 28 pulse 170 and the vertical reset pulse 184 (which serves 29 only to reset the counters when the phase lock is reset).
The sync generator 174 acts upon the clock pulse 174 by 31 using the counter array to modify and divide the clock pulse 32 signal 174 in order to provide a variety of output pulses, 33 some of which have been discussed previously. These include 34 the blanking pulse 58 which ls in the nature of a 15.73 KHz square wave pulse having a pulse duration of about 11 36 microseconds, the b,urst flag signal 70, which is in the 37 nature of a 15.73 KHz square wave pulse having a pulse 38 duration of about 1 microsecond, and the sync pulse 72 which 39 is in the nature of a 15.73 KHz square wave pulse having a pulse duration of about 4 microseconds. Additional, . . .
~7~BSTJTIJTE SHEE7 W090/09723 PCT/VS90/00,49 1. previously discussed, internal signals 42 which are generated 2by the sync generator 174 are the horizontal drive pulse HD
3176 and the vertical drive pulse VD 186.
4The final internal signal 42 generated by the sync 5generator 174 is in the nature of an NTSC standard carrier 6fsc 188. The NTSC carrier fsc 188 is a frequency pulse at 7the standard NTSC frequency of 3,579,545.4545 Hz, generally 8known as 3.58 MHz. This frequency is the frequency which has 9been established by U.S. national standards as the frequency 10at which chrominancè signals are output to video devices and, 11ïn the preferred operational circuitry 30, is one fourth the 12f`requency of the clock pulse CL 174.
13Within the sync generation subcircuit 148 the NTSC
14standard carrier 188 is delivered to a first doubly balanced 15mixer 190. The first doubly balanced mixer 190 also receives 16as input the quadcarrier 270 signal 172 from the quadrature 17divider 168. The first doubly balanced mixer 190 is in the 18nature of signal frequency combination component which has 19the effect of combining the incoming signals in a manner such 20that the output is a combined signal with one component 21having a frequency of the sum of the incoming signals while 22the other component is at a frequency equal to the difference 23between the incoming signals. In the case of the first 24doubly balanced mixer 190 the output is in the form of a 25mixed 3,5 carrier 3~5fsc 192 including synchronization pulse 26components having a frequency of 10.74 MHz and 17.85 MHz.
27From the first doubly mixer 190 the mixed 3,5 carrier 28192 is delivered to a second band pass filter 194. The 29second band pass filter 194 has a center frequency 10.7 MHz 30and a vary narrow band width of + or - 20 KHz. The second 31band pass filter 194 filters out extraneous frequencies and 32passes as an output only a weak tripled carrier 3fsc~ 196 33having a frequency of 10.74 MHz.
34The weak tripled carrier 196 is then delivered to a 35third buffer amplifier 198 which amplifies the signal to ~:
36produce as an output Q tripled carrier 3fsc 200.
37Referring now to Fig. 5, the structure of the local 38oscillator ("~0") subcircuit 150 is illustrated in a more 39detailed schematic fashion. From the structure illustrated 40in Fig. 5 it may be seen that the local oscillator subcircuit ~ ~ ! . . . . .

', ' ' ~

WOsQ/09723 PCT/~90/00749 ~,f~ ! 16 1 150 is a frequency ~eneration array similar in nature to t 2 sync generation subcircuit 148 and that a portion thereof is 3 a phase lock loop. The local oscillator subcircuit 150 4 utilizes a L0 loop 202 in order to lock the phase of the output signal. Many of the components of the L0 loop 202 are 6 similar to those of the horizontal loop subcomponent 152 7 illustrated in Fig. 4.
8 The input signal to the L0 generator subcircuit 150 is 9 the horizontal reference Hr signal 144, as is the case with the sync generation su~circuit 148. The horizontal reference 11 signal 144 is delivered to a second phase detector 204. The 12 second phase detector 204 operates in a manner similar to the 13 first phase detector 156 and generates as its output a second 14 oscillator control pulse oC2 206. The second oscillator control pulse 206 is utilized as a voltage signal to control 16 the frequency of oscillation of a second voltage controlled 17 oscillator 208. The second voltage controlled oscillator 208 18 is similar in structure to the first voltage control 19 oscillator 160 in that its precise frequency of oscillation is determined by the voltage signal delivered as the second 21 oscillator control signal 206, but a difference in the 22 frequency involved. The second voltage controlled oscillator 23 208 is adapted to oscillate in the frequency range 24 surrounding 54 MHz and, dependent on the signal recei~ed as a result of the remainder of the L0 loop subcomponent 202, will 26 ordinary oscillate at 54.51923065 MHz or 54.755244.64 MHz.
27 The output of the second voltage controlled oscillator 208 28 will be at one of these two frequencies and will be in the 29 nature of a local oscillator carrier LC 210.
From the second voltage controlled oscillator 208 the 31 local oscillator carrier LC 210 is delivered to a fifth 32 pathway junction 212 where it is split into two branches with 33 one of the branches being delivered to a fourth buffer 34 amplifier 214. The fourth buffer amplifier 214, which is arrayed within the L0 loop subcomponent 202, amplifies the 36 local oscillator calrrier 210 to produce an amplified LC
37 signal LC+ 216. The amplified LC signal LC+ 216 is then 38 delivered to a U/V switch subassembly 218. The U/V switch 39 subassembly 218 is a user selectable switch which permits the user to determine whether the output of the local oscillator .S~iE3STlT~Tr S~

: . .. .. - .. , . ,. . .. . . .. . . . .: .: : . .

:
090/09723 ,~ ;t~ ~ PcT/us9o/oo749 1 subassembly 150 is suita~le for use with u-matic standard or 2 VHS standard video equipment.
3 As is shown in Fig. 5, the amplified LC signal LC+ 216 4 is delivered within the U/V switch 218 to a sixth pathway junction 220. The branches from the sixth pathway junction 6 220 are delivered either to a first frequency divider 222 or 7 a second frequency divider 22~. The first frequency divider 8 222 and the second frequency divider 224 are counter based g components which are utilized to produce a frequency output signal which is obtained by clividing the frequency of the 11 input by a preselected constant val-ue in order to obtain the 12 desired output. In the case of the first frequency divider 13 222, the constant utilized for division is 3,465. This 14 number is selected in order to yield a result of 15.73 KHz when the incoming frequency from the second voltage control 16 oscillator 208 is at a frequency of 54.52 MHz. Similarly, 17 the second voltage divider 224 has a division constant of 18 3,480 in order to obtain the same 15.73 KHz output when the 19 input signal frequency of the amplified LC signal 216 is 54.76 MHz.
21 The selection between the first frequency divider 22 and 22 the second frequency divider 224 is made by way of a toggle 23 switch 226, the position of which is controlled by a U/V
24 select siqnal 228 generated by the L0 switch 24 situated on the system housing 12. The user will make this selection 26 depending on the type of output desired.
27 Because of the self balancing nature of the L0 loop 28 subcomponent 202, the output of the U/V switch subassembly 29 218 is independent of the position of the U/V toggle switch 226. In either switch position, once a steady state has been 31 achieved, the output will be in the form of a 15.73 KHz 32 signal known as a low reference signal LR 230.
33 The low reference signal LR 230 is then delivered to a 34 third one shot 232 which generates as its output a symmetrical square wave referred to as a squared low 36 reference signal LR'I 234 which is then delivered back to the 37 second phase detector 204. When the L0 loop subcomponent 202 38 is in a steady state the squared L0 reference signal LR' 234 39 and the incoming horizontal reference signal Hr 144 will match exactly as to frequency and phase and the second ~B~7TVTE 5~

: '' '.

WOso/097'3 2 ~ 18 PCTIUS~0/00749 1 oscillator control signal 206 generated by the second phc~
2 detector 204 will cause the second voltage controlled 3 oscillator 208 to oscillate at the frequency corresponding to 4 the appropriate setting of the U/v switch 24.
As the result of th~ operation of the LO loop components 6 202, the local oscillator carri~er LC 210 output by the second 7 voltage controlled oscillator 208 will he either at 54.52 MHz 8 or 54.76 MHz. Therefore, the signal delivered to the fifth 9 junction 212 will be at one of` these two frequencies. The `lO branch component of the local oscillator carrier LC 210 is 11 then delivered to a fifth buffer amplifier 236. Just as in 12 the case of the fourth buffer amplifier 214, the output of : ;~
13 the fifth buffer amplifier 236 is an amplified local 14 oscillator carrier LC 216. From the fifth buffer amplifier 236 this signal is delivered to a third frequency divider 16 238.
17 The third frequency divider 238 is similar in nature to 18 the first and second frequency dividers 222 and 224 and is l9 selected to have a division constant of four. As a result; ~ .
the output of the third frequency divider 238 will be a ~:
21 quartered LC+ signal LC+/4 at a frequency of 13.63 MHz or 22 13.68 ~Hz depending upon the position of the U/V switch 24.
23 The quartered LC+ signal LC+/4 240 is then delivered to a 24 sixth buffer amplifier 242 where the voltage of the signal is amplified to create an amplified local oscillator signal 26 which is referred to as the LO signal 244. Depending upon the 27 position of the LO U/V switch 24, the frequency of the LO
28 signal 244 will be either 13.63 MHz or 13.68 MHz. The LO
29 signal 244 is the only output of the local oscillator ~ subcircuit 150 and its utilization within the rem~inder of 31 the operational circuitry 30 will discussed hereinafter with 32 respect to Fig. 2b.
33 Referring now to Fig. 2b, the remainder of the 34 operational circuitry 30 is illustrated in schematic fashion, showing the manner in which the operational circuitry 30 36 continues to process ~he internal signals 42 generated in the 37 components shown in Fig. 2a in order to produce the varlety 38 of output signals 44.
39 The first signal to be considered is the luminance ~ i signal Y 82 which is delivered to a signal modification i ~B~;TIl-UTE: S~lEEr -:

' ' ' WO qO/~9723 ~ J~ Pcr/usgo/l)O74g 1 component 36 in the nature of a dynamic aperture 246. The 2 dynamic aperture 246 also receives as inputs the blanking 3 signal BL 58 and a system generated equalization signal 2~8.
4 The dynamic aperture 246 is primarily an array of Schmidt triggers which operate on the Y signal, typically in the form 6 of a sine wave, by effectively decreasing the rise time of 7 the Y signal and causing it to more closely approximate a 8 square wave. The dynamic aperture 246 accomplishes this 9 purpose without altering the effective pathlength. The net output of the dynamic aperture 246 is in the form of a 11 squared luminance signal Y' 250"
12 The desirability of approximating a square wave in the 13 squared luminance signal Y' 250 is that this maximizes the 14 fine detail and high resolution performance. The utilization of the dynamic aperture 246 within the preferred 16 embodiment 10 is one of the reasons for its superior 17 performance.
18 The squared luminance signal Y' 250 is then delivered to 19 a gated amplifier 252. The gated amplifier 252 is selected to have a high input impedance of approximately 10,000 ohms 21 and a medium output impedance of approximately 500 ohms. The 22 amount of gain within the gated amplifier 252 is controlled 23 by a gate pulse.
24 In the case of the gated amplifier 252 the gate pulse is derived from the quad chrominance signal C~ 110. As is shown 26 in Fig. 2b, the quad chrominance signal C4 110 is delivered 27 to a seventh buffer amplifier 254 which outputs an amplified 28 quad chrominance signal C4+ 256 which operates as the gate 29 pulse for the gated amplifier 252.
The manner in which the gated amplifier 252 operates in 31 the present invention lo is that a high value quad 32 chrominance signal C4+ 256 causes a substantial reduction in 33 the gain provided by the gated amplifier 252. The purpose of 34 this gain reduction is to effectively chop the luminance signal when there is a particularly high rate of change in 36 the value of the chrominance signal. This chopping, which is 37 of a very short duration, acts to eliminate deleterious 38 signal edge effects which may be caused by coincidence of 39 chroma-envelope wi-th the luma-input. If the edge interference is not eliminated it is possible to get a -~ ~STITIJTE SE~E~:r .`: .

.. . .

. , . .

WO go/09723 ~ L 20 ~CI`/IJS90/00749 1 crawling edge effect on the video screen due to crosstalk~ ~
2 between the luminance components of the output and the 3 chrominance components of the output.
4 The output of the gated amplifier 252 is in the nature of a chopped luminance signal Y'' 258 which is then delivered 6 to a seventh junction 260. One branch of the chopped 7 luminance Y'' 2~8 is then clelivered to a first driver 8 amplifier 262. The first driver amplifier 262, and each of 9 the the other driver amplifiers to be found within the operational circuitry 30, is selected to have a high input 11 impedance of approximately 10,000 ohms and a very low output 12 impedance of approximately 6 ohms.
13 The output of the first driver amplifier 262 is the 14 luminance output signal Yx 264. The luminance output Yx 264 is in the nature of a shaped and modified luminance signal 16 which is appropriate for direct use by various output 17 devices. In the case of output to a black and white video 18 device the luminance output Yx is the only video signal 19 required. It is noted that the frequency of the luminance output Yx 264 is unaltered from that of the original 21 luminance signal 82 generated by the Y,I,Q matrix 66 with the 22 only significant alterations in the nature o~ the signal 23 occurring from the shaping operations of the dynamic aperture 24 246 and the gated amplifier 252. The standard power level of the luminance output Yx 264 is lVpp (one volt peak to peak).
26 Turning now to the subject or chrominance signal 27 processing, it may be seen in Fig. 2b that another branch of 28 the quad chrominance signal C4 is delivered to a eighth 29 buffer amplifier 265. The eighth buffer amplifier 265 creates an additional amplified quad chrominance signal C4+
31 256 which is then delivered to a second doubly balanced mixer 32 266. The additional input to the second doubly balanced 33 mixer 266 is the tripled carrier 3fsc 200 generated within 34 the sync generation su~circuit 148. The output of the Second doubly balanced mixer 266 is a mixed 1,7 chrominance 1,7C
36 268. The mixed 1,7 chrominance 1,7C signal 268 includes 37 carrier frequencies equal to the NTSC carrier frequency of 38 3.58 MHz (4 NTSC - 3 NTSC) and at 7 times the NTSC carrier 39 frequency or 25.06 MHz (4 NTSC + 3 NTSC).
~0 The mixed 1,7 chrominanc2 signal 1,7C 268 is then ..

S~ST3TIJllE~ 5~E~T

W090/097~3 ~ 9 ~CT/US90/00~49 1 delivered to a third band pass filter 270. The third band 2 pass filter 270 has a center frequency of 3.58 MHz and a band 3 width of + or ~ 750 KHz. The third band pass filter 270 4 filters out the 7 NTSC frequency components and other harmonics outside of the band width and delivers only an NTSC
6 chrominance signal CN 272 as its output.
7 The NTSC chrominance signal CN 272 is then delivered to 8 a ninth junction 274 where it is branched into two components g with one of the components proceeding to a ninth buffer amplifier 276 which amplifies the signal to provide an 11 amplified NTSC chrominance signal CN+ 278. The amplified 12 NTSC chrominance signal CN+ 278 is then delivered to a second 13 driver amplifier 280 which produces as its output a 14 conventional NTSC chrominance output signal CNX 282. This signal is on a carrier of 3.58 MHz and has a 285 mVpp burst 16 power level. The NTSC chrominance output CNX 282 is usable 17 by those devices operating under the NTSC standard and 18 particularly those which utilize separate luminance and 19 chrominance inputs. These Y/C input devices will operate properly utilizing as their inputs the luminance output Yx 21 264 and the NTSC chrominance output CNX 282. These two 22 signals will be combined within the appropriate device for 23 provision of a complete video signal.
24 For devices which utilize only a single input combining the luminance and chrominance signals into what is commonly 26 referred to as a composite video signal, such as most 27 conventional television sets, it is desirable to produce such 28 a combined output. In the present invention of a color 29 encoding system 10, the operational circuitry 30 includes components and pathways to accomplish this purpose. As is 31 illustrated in Fig. 2b, a further branch of the NTSC
32 chrominance signal CN 272 from the ninth junction 274 is 33 delivered to a tenth buffer amplifier 28~ which outputs an 34 additional amplified N~SC chrominance signal CN+ 278. This signal is then delivered to an adder component 28S, shown in 36 Fig. 2b as contained within a dotted line.
37 Additional input to the adder component 286 is provided 38 by an additional branch of the chopped luminance signal Y'' 39 258 from the seventh junction 260. The chopped luminance signal Y'' 258 is delivered to an eleventh buffer amplifier :, S~iBST~TVTE S~E. ~

.. . , ` . ~. .

WO90/09723 ~ 22 PCT/US90/00749 1 288 to provide an amplified chopped luminance Y''+ ~89. T~
2 amplified chopped luminance Y''+ 289 is delivered to the 3 adder component 286, where it is added to the amplified NTSC
4 chrominance signal CN+ 278. The structure of the adder component 286 is simple in nature and includes a first 6 resistor 290 on the chrominance line and a second resistor 7 292 on the luminance line. The first resistor 290 and the 8 second resistor 292 act to isolate the signals for addition 9 with avoidance of interference. The chrominance and luminance signals are then adcled to each other at a tenth 11 junction 2g4 to produce a composite video signal 296. The 12 composite video signal 296 is then delivered to a third 13 driver amplifier 298 which amplifies the signal to produce a 14 composite video output CVx 300. The composite video output .
CVx 300 includes both the luminance information and the 16 chrominance information and is adaptable for usage by 17 standard composite video devices such as ordinary color 18 television sets. The composite video output CVx has a pulse 19 power level of lVpp, the same as the separate luminance output Yx ~64.
21 Certain types of video devices require that the 22 chrominance signal be delivered on a frequency other than 23 NTSC standard carrier. Included among these devices are U-24 matic standard devices which require an output at 688.37 KHz and VHS devices which require an output at 629.370 KH2. The 26 color encoding system 10 is also adapted to provide outputs 27 to these types of devices. .
28 In order to provide such outputs the final branch of the .. :.
29 quad chrominance signal C4 llO is delivered to a twelfth 30- buffer amplifier 302 to produce an additional amplified quad 31 chrominance signal C4~ 256 which is delivered to a third 32 doubly balanced mixer 304. :
33 The additional input to the third doubly balanced mixer 3a 304 is the local oscillator signal LO 244. As discussed above, dependlng upon the setting of the U/V switch 24, the 36 local oscillator signal LO 244 will either be at a frequency 37 of 13.63 MHz or 13.68 NHz. ~he output of the third doubly 38 balanced mixer 304 is therefore in the form of the sum and 39 the difference of the incoming frequencies and, depending upon the setting of U/V switch 24 will be at frequency pairs . . _ .
5U~3STITUF~

W090/09723 ~ ~v 1 PCT/US90/00749 ,` 1 of 27.95 MHz and 688.37 KHz for U-matic and 28.00 MHz and 2 629.37 KHz for VHS.
3 The output of the third doubly balanced mixer 304, 4 referred to as a mixed chroma-L0 signal MCL 306 is then delivered to a low pass filter 308. The low pass filter 308 6 selected for the preferred operational circuitry 30 has a cut 7 off frequency of 1.28 MHz. The net effect of the low pass 8 filter 308 is to eliminate the high frequency carrier - 9 components and to produce a chrominance-L0 signal CL0 310 at a frequency of either 688 KHz or 629 KHz.
11 The chrominance-L0 signal CL0 310 is then delivered to a - 12 thirteenth buffer amplifier 312 which outputs an amplified - 13 chroma-L0 signal CL0+ 314 and delivers it to a fourth driver 14 amplifier 316. The output of the fourth driver amplifier 316 is a chroma-L0 output CL0x 318 which includes all of the r - 16 chrominance information on a selected carrier of 688 MHz or 17 629 MHz as selected by the user. The burst power level of - 18 the CL0x signal 318 is-285 mVpp. Within the appropriate :19 video device this chroma-L0 output signal CL0x 318 is combined with the luminance output Yx 264 to regenerate the 21 complete video signal.
. 22 The final output of the operational circuitry 30 is in :` 23 the form of a field ID signal which is derived from the field 24 ID sync signal F 138 generated by the synchronization separator 134, as illustrated in Fig. 2a. To achieve this 26 output the field ID sync signal F 140 is delivered to a fifth 27 driver amplifier 320 which produces a field ID output Fx 3Z2.
28 The field ID output Fx 322 is a timing signal utilized by 29 certain video tape systems, particularly VHS, and has a frequency of 30 Hz.
-- 31 All of the outputs of the operational circuitry 30 are 32 delivered to the output ports 28 of the color encoding system - 33 10 for utilization by whatever variety of video equipment ` 34 desired by the user. In this manner, the conversion of the R,G and B inputs 48, 50 and 52 is completed such that the 36 video signals generated by a computer or other RGB type - 37 device may be utilized by conventional video devices.
38 The precise orientation of the various components 36 39 within the operational circuitry 30 may be substantially altered, as long as the operatlonal structure remains the , ~.
~;V!BSTITILITE S~
~ . ~, . . . . -.. . . , . ~ ....

? ,, : WO90/09723 ~, , PCT/VS90/00749 2 ~ 3 ~ ~ 24 1 same, without degrading the quality of the resultant outputr 2 Furthermore, the values selected for the various signal 3 modification elements 36 may be modif.ied with a minimum of 4 negative effects.
Those skilled in the art will readily observe that 6 numerous other modifications of the high index coherent color 7 encoding system lO of the present inv~ntion and its 8 individual components may be made while retaining the 9 teachings of the invention. Accordingly, the above disclosure is not intended as limiting. The appended claims 11 are therefore to be interpreted as encompassing the entire 12 spirit and scope of the invention.

16 The industrial applicability of the high index coherent 17 color encoding system lO of the present invention will be 18 clear to those skilled in the art from the above description.
19 Substantial and widespread uses exist for a device capable of converting computer generated RGB output to standard video 21 input.
22 Various envisioned uses include the generation of video 23 graphics designed on personal computer devices and the 24 preparation of computer generated video presentations. Even recreational and hobby type computer users will find utility 26 in the present invention. For example, the device could be 27 utilized to create a video record of a graphics adventure or 28 arcade type computer game. This type of output could be 29 utilized for further study of fast moving components within the game or for competition purposes.
31 A wide variety of other utilizations and adaptions of 32 the present invention will no doubt be recognized by those 33 sXilled in the art and by potential users. The capability of 34 converting RGB computer graphics output into video tape or color television signals will open plethora of possibilities.
36 The requirement for dedicated computer monitors will no 37 lonqer be absolute since a user may attach the computer to 38 the color encoding system 10 and then output to preexisting 39 devices having other primary uses.
From the above it may be seen that the high index 5UBSTITUlTE: 5~E i :;

: W090/09723 25 ~ ,3~ PCT/US9OtO0749 - l coherent color encoding system 10 of the present invention is : 2 adaptable to a myriad quantity of available uses. It may - 3 therefore be expected that the present invention is likely to 4 have extremely widespread industrial applicability and - 5 commercial utility.

''' 9 ,.'"

5~BSTlTlJTE~ ~

Claims (20)

1. A color encoding system for RGB type video input information, comprising:
input means for receiving the RGB information;
operational circuitry means for converting the RGB
information into Y luminance signals and I and Q
chrominance signals, and further for combining said I
and Q signals to a single chrominance signal on a common carrier frequency, and further for combining said Y
luminance signal with said single chrominance signal to provide a single composite video signal; and output means for delivering video output signals from the operational circuitry means to external devices;
wherein the operational circuitry means is characterized by modulating said chrominance signals at a substantially higher frequency than said common carrier frequency and then mixing and filtering said higher frequency to generate said single chrominance signal on said common carrier frequency.

2. The color encoding system of claim 1 wherein said common carrier frequency is selected to be the NTSC standard carrier and said higher frequency is four times said NTSC standard carrier.

3. The color encoding system of claim 1 wherein said mixing is accomplished by a doubly balanced mixer component.

4. The color encoding system of claim 1 wherein said filtering is accomplished by a band pass filter.

5. The color encoding system of claim 1 wherein said filtering is accomplished by a low pass filter.

6. The color encoding system of claim 1 wherein said Y luminance signal is shaped by dynamic aperture means for enhancing the rise slope of said Y luminance signal.

7. The color encoding system of claim 1 and further including power supply means for providing DC voltage to the operational circuitry;
a voltage level control array intermediate said power supply means and the operational circuitry for separating said DC voltage into component signals and for adjusting the levels of said component signals ; and array adjustment means for selectively acting upon said voltage control array for performing said adjusting of said component signals.

8. The color encoding system of claim 7 wherein a housing is provided to enclose the system and at least a portion of said array adjustment means includes control members accessible from the exterior of said housing.

9. The color encoding system of claim 1 wherein the operational circuitry receives as input, in addition to said RGB information, a synchronization signal provided from external equipment and a variety of system generated input signal selectively created within the system; and said output video signals include a Y luminance output, a composite video output on an NTSC standard carrier frequency, a chrominance output on said NTSC standard carrier frequency, and a chrominance output on a carrier frequency lower than said NTSC carrier frequency.

10. An operational circuitry assembly for encoding input in the form of separate Red (R), Green (G), and Blue (B) video component signals, comprising:
synchronization signal generation means for providing internal sync and carrier signals to selected components within the circuitry assembly;
a Y,I,Q matrix component for producing a Y luminance signal and I and Q chrominance component signals from the R,G, and B input signals;
an I,Q modulator component for separately modulating said I and Q signals at a relatively high first carrie frequency and for encoding said modulated I and Q
signals into a combined chrominance signal on a single carrier, said I and Q components being present in said combined chrominance signal in a perpendicular phase relationship;
adder means for adding said Y luminance signal to said combined chrominance signal to produce a composite video signal; and output amplifier means for providing output signals derived from said Y luminance signal, said combined chrominance signal and said composite video signal.

11. The operational circuitry assembly of claim 10 and further including a dynamic aperture component intermediate the Y,I,Q
matrix component and the adder and output amplifier means for shaping said Y luminance signal by enhancing the rise slope such that said Y luminance signal-approximates a square wave signal.

12. The operational circuitry assembly of claim 10 and further including doubly balanced mixer means for combining said combined chrominance signal with a second carrier frequency to produce a mixed chrominance signal having an additive component and a subtractive component; and filter means for selectively filtering out one of said additive and said subtractive components to provide a filtered chrominance signal on a third carrier frequency.

13. The operational circuitry assembly of claim 12 wherein said first carrier frequency is selected to be four times the NTSC standard carrier frequency;
said second carrier frequency is selected to be three times the NTSC standard carrier frequency; and said filter means filters out said additive component such that said third carrier frequency is equal to the NTSC standard carrier frequency.

14. The operational circuitry assembly of claim 12 and further including second doubly balanced mixer means for combining an additional branch of said combined chrominance signal with a fourth carrier frequency to produce a second mixed chrominance signal, having additive and subtractive components;
second filter means for filtering out one of said additive and subtractive components to provide a second filtered chrominance signal on a fifth carrier frequency; and wherein the output amplifier means are further adapted to provide an output derived from said second filtered combined chrominance signal.

15. The operational circuitry assembly of claim 14 wherein said first carrier frequency is selected to be four times the NTSC standard carrier frequency;
said fourth carrier frequency is selectable by a user controlled switch; and said filter means filters out said additive component such that said fifth carrier frequency is, depending upon the position of said user controlled switch, equal to either a U-matic standard frequency or a VHS standard frequency.

16. The operational circuitry assembly of claim 10 and further including an input amplifier/clamp component for modifying the R, G, and B signals prior to delivery to the Y,I,Q matrix component; and a CTI delay component for delaying said I and Q
chrominance component signals prior to delivery to the I,Q matrix component.

17. The operational circuitry assembly of claim 11 and further including gated amplifier means subsequent to said dynamic aperture component for chopping said Y luminance signal based upon additional input to said gated amplifi?
means in the form of said combined chrominance signal, said chopping acting to minimize deleterious edge effects which may be caused by coincidence of the Y
luminance signal with the envelope of the chrominance signals.

18. In a color encoding system for encoding RGB color video inputs for output as video signals in other signal formats, the improvement comprising:
matrixing the separate R, G, and B input signals to provide a luminance component and two or more distinct chrominance components;
modulating said chrominance components at a modulation carrier frequency substantially higher than the desired output carrier frequency; and reconstituting said chrominance components as a combined chrominance signal carried on said desired output carrier frequency.

19. The improvement of claim 18 wherein said modulation carrier frequency is selected to be four times the NTSC standard carrier frequency;
said desired output carrier frequency is selected to be said NTSC standard frequency; and the reconstituting is accomplished by utilizing a doubly balanced mixer and a frequency pass filter.

20. The improvement of claim 18 wherein said luminance component is shaped to approximate a square wave by a dynamic aperture component.