CA2042171A1 - High-speed packet switching apparatus and method - Google Patents

Abstract

An improved digital packet switching apparatus enabling enhanced packet transmission and high bandwidth packet transfer. The digital packet switching methods and apparatus permit selectively switching digital signal packet between a set of nodes. The invention includes multiple processing cells, each having a processor coupled to an associated content-addressable memory element. Packet processors, electrically coupled to the memory elements, selectively receive packets from the nodes and transmit the packets into at least one of the plural memory elements; or receive packets from the memory elements and transmit the packets to at least one of the nodes. One aspect of the invention includes memory management elements, coupled to the memory elements, for accessing one or more of the information-representative signals stored in the plural memory elements. The in-cell processors can include access request elements for requesting access to an information-representative signal. The access request element can also generate an ownership-request signal to request priority access to an information-representative signal. In another aspect of the invention, the memory element associated with the requesting processor includes control elements for selectively transmitting the access-request signal to the memory management element. The memory management elements can also include memory coherence elements. These coherence elements respond to certain ownership-request signals by exclusively allocating physical storage space in the memory element associated with the requesting processor and storing the requested information-representative signal therein.