CA2026663A1 - Idle channel noise reduction in a line card having a dsp equalizer - Google Patents
Idle channel noise reduction in a line card having a dsp equalizerInfo
- Publication number
- CA2026663A1 CA2026663A1 CA 2026663 CA2026663A CA2026663A1 CA 2026663 A1 CA2026663 A1 CA 2026663A1 CA 2026663 CA2026663 CA 2026663 CA 2026663 A CA2026663 A CA 2026663A CA 2026663 A1 CA2026663 A1 CA 2026663A1
- Authority
- CA
- Canada
- Prior art keywords
- noise reduction
- line card
- idle channel
- channel noise
- increases
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Dc Digital Transmission (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
IDLE CHANNEL NOISE REDUCTION IN A LINE CARD
HAVING A DSP EQUALIZER
Abstract of the Disclosure Idle channel noise reduction is achieved in a line card having an analog gain/attenuator, a codec, and a digital signal processor including an equalizer and a digital gain/attenuator. A peak detector samples output from the codec each 8 kHz cycle. A level decision compares the sample to a stored peak value, and replaces the stored peak value with the sample if it is greater. A controller, at a second predetermined interval, increases analog gain in steps and increases digital attenuation in similar steps if the stored peak value is greater than the predetermined threshold. Otherwise, the controller increases analog attenuation in steps and increases digital gain in similar steps.
- i -
HAVING A DSP EQUALIZER
Abstract of the Disclosure Idle channel noise reduction is achieved in a line card having an analog gain/attenuator, a codec, and a digital signal processor including an equalizer and a digital gain/attenuator. A peak detector samples output from the codec each 8 kHz cycle. A level decision compares the sample to a stored peak value, and replaces the stored peak value with the sample if it is greater. A controller, at a second predetermined interval, increases analog gain in steps and increases digital attenuation in similar steps if the stored peak value is greater than the predetermined threshold. Otherwise, the controller increases analog attenuation in steps and increases digital gain in similar steps.
- i -
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA 2026663 CA2026663C (en) | 1990-09-19 | 1990-09-19 | Idle channel noise reduction in a line card having a dsp equalizer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA 2026663 CA2026663C (en) | 1990-09-19 | 1990-09-19 | Idle channel noise reduction in a line card having a dsp equalizer |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2026663A1 true CA2026663A1 (en) | 1992-03-20 |
CA2026663C CA2026663C (en) | 1999-08-03 |
Family
ID=4146079
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA 2026663 Expired - Fee Related CA2026663C (en) | 1990-09-19 | 1990-09-19 | Idle channel noise reduction in a line card having a dsp equalizer |
Country Status (1)
Country | Link |
---|---|
CA (1) | CA2026663C (en) |
-
1990
- 1990-09-19 CA CA 2026663 patent/CA2026663C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA2026663C (en) | 1999-08-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |