CA2011133C - Packet communication system and method of controlling same - Google Patents
Packet communication system and method of controlling sameInfo
- Publication number
- CA2011133C CA2011133C CA002011133A CA2011133A CA2011133C CA 2011133 C CA2011133 C CA 2011133C CA 002011133 A CA002011133 A CA 002011133A CA 2011133 A CA2011133 A CA 2011133A CA 2011133 C CA2011133 C CA 2011133C
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- Prior art keywords
- packets
- buffers
- output
- instantaneousness
- priority data
- Prior art date
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- Expired - Lifetime
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- 238000000034 method Methods 0.000 title claims abstract description 9
- 239000000872 buffer Substances 0.000 claims abstract description 124
- 230000005540 biological transmission Effects 0.000 claims abstract description 20
- 230000002401 inhibitory effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
- 239000012141 concentrate Substances 0.000 description 2
- 241000282320 Panthera leo Species 0.000 description 1
- 230000006735 deficit Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02A—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
- Y02A30/00—Adapting or protecting infrastructure or their operation
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Abstract
ABSTRACT OF THE DISCLOSURE
A packet communication system which communicates various communication information such as voice, data or images in the form of a packet and which provides a transmission quality which satisfies both of high instantaneousness and low discard properties and a method of controlling the system. A counter counts the respective numbers of stays of packets in priority-classified buffers. The percentages of output of packets from the respective buffers and both of the percentages of output of packets from and the percentages of input of packets to the respective buffers are controlled in accordance with the counted numbers of stays of packets in the respective buffers and information on the priorities of the packets.
A packet communication system which communicates various communication information such as voice, data or images in the form of a packet and which provides a transmission quality which satisfies both of high instantaneousness and low discard properties and a method of controlling the system. A counter counts the respective numbers of stays of packets in priority-classified buffers. The percentages of output of packets from the respective buffers and both of the percentages of output of packets from and the percentages of input of packets to the respective buffers are controlled in accordance with the counted numbers of stays of packets in the respective buffers and information on the priorities of the packets.
Description
3 ~: ~
This invention relates to packet communication systems which communicate various communication information on voice, --~
data, images, etc., and methods of controlling same, and more particularly to such a system which provides a transmission ~-quality which satisfies both of high instantaneousness and low discard properties, and a method of controlling the system.
Aspects of the prior art and present invention will be described by reference to the accompanying drawings, in which:
FIG. 1 is a general schematic of a packet communication `~
system;
lS FIGS. 2(a) and 2(b) are a conventional buffer -arrangement;
FIG. 3 is a block diagram of one embodiment of a buffer and input and output controllers as the main portion of the ;~
present invention;
FIG. 4 illustrates the format structure of a packet; ~;
FIG. 5 is a detailed schematic of the output controller;
FIG. 6 is a detailed schematic of an output control ROM
of FIG. 5;
FIG. 7 is a detailed schematic of the input controller;
and FIG. 8 illustrates the discard of an input packet in ;~
accordance with the number of strays of packets.
.
As shown in a block diagram of FIG. 1, generally, a packet communication system which packetizes and transmits ~`
various pieces of information on voice, data images, etc., generated from various information terminals includes a high~
speed data terminal 9-1, a low-speed data terminal 9-2, a -1~ ' ' ~ ' .
., qP
' , ~ ' ' : ' :, ' ' : ~
h ~
voice terminal 9-3, etc. terminal interfaces 10-1 to 10-3 corresponding to the respective information terminals; a line interface 12 to a multiplexing line 13; a high-speed packet : :`
bus 11 connecting the respective interfaces 10-1 to 10-3 and line interface 12. In this arrangement, the information ;.
generated by each of the terminals 9-1 to 9-3 is decomposed to predetermined information units by the corresponding one of the terminal interfaces 10-1 to 10-3, combined with an addressee information, etc., into a communication unit packet and input to the line interface .., ~ ~ ......
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This invention relates to packet communication systems which communicate various communication information on voice, --~
data, images, etc., and methods of controlling same, and more particularly to such a system which provides a transmission ~-quality which satisfies both of high instantaneousness and low discard properties, and a method of controlling the system.
Aspects of the prior art and present invention will be described by reference to the accompanying drawings, in which:
FIG. 1 is a general schematic of a packet communication `~
system;
lS FIGS. 2(a) and 2(b) are a conventional buffer -arrangement;
FIG. 3 is a block diagram of one embodiment of a buffer and input and output controllers as the main portion of the ;~
present invention;
FIG. 4 illustrates the format structure of a packet; ~;
FIG. 5 is a detailed schematic of the output controller;
FIG. 6 is a detailed schematic of an output control ROM
of FIG. 5;
FIG. 7 is a detailed schematic of the input controller;
and FIG. 8 illustrates the discard of an input packet in ;~
accordance with the number of strays of packets.
.
As shown in a block diagram of FIG. 1, generally, a packet communication system which packetizes and transmits ~`
various pieces of information on voice, data images, etc., generated from various information terminals includes a high~
speed data terminal 9-1, a low-speed data terminal 9-2, a -1~ ' ' ~ ' .
., qP
' , ~ ' ' : ' :, ' ' : ~
h ~
voice terminal 9-3, etc. terminal interfaces 10-1 to 10-3 corresponding to the respective information terminals; a line interface 12 to a multiplexing line 13; a high-speed packet : :`
bus 11 connecting the respective interfaces 10-1 to 10-3 and line interface 12. In this arrangement, the information ;.
generated by each of the terminals 9-1 to 9-3 is decomposed to predetermined information units by the corresponding one of the terminal interfaces 10-1 to 10-3, combined with an addressee information, etc., into a communication unit packet and input to the line interface .., ~ ~ ......
.~
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2 0 1 1 ~ 3 3 12 via the high-speed packet bus 11. The line interface 12 selects a multiplexing line 13 connecting to the addressee in accordance with information on the addressee in the input packet and transmits the packet to the multiplexing line 13 on a time-divisional basis.
:. :
If communication information generated by the . -respective terminals 9-1 to 9-3 concentrates in a given ~ , - - ,-:
time in such packet communication system, so-called congestion of packets occurs in the communication system. '~
In order to cope with this situation, a buffer is conventionally provided generally to store packets as a ~ ~ -queue in the line interface 12.
In the buffer structure shown in FIG. 2(a), a buffer BF1 is provided to store and output received - - -packets Pl - P4 in order of the inputs. Another buffer~ ~ -arrangement, for example, shown in FIG. 2(b), includes a plurality of buffers BFl - BF3, a demultiplexer DMPX which distributes received packets Pl - P4 in accordance with the priority of the packets, and a multiplexer MPX which selects an output packet in accordance with the priority of the packets. In this arrangement, for example, packets .
Pl and P4 of high priorities are stored in the buffer BF
and transmitted preferentially while packets Pl and P3 of lower priority are stored in the buffers BF2 and BF3 in accordance with their priorities and are transmitted after the packets Pl and P4 of highest priority are transmitted.
The communication information handled by such packet communication system is divided mainly into twoS
201 1133 ~
,~ .. ,. ~
:. :
If communication information generated by the . -respective terminals 9-1 to 9-3 concentrates in a given ~ , - - ,-:
time in such packet communication system, so-called congestion of packets occurs in the communication system. '~
In order to cope with this situation, a buffer is conventionally provided generally to store packets as a ~ ~ -queue in the line interface 12.
In the buffer structure shown in FIG. 2(a), a buffer BF1 is provided to store and output received - - -packets Pl - P4 in order of the inputs. Another buffer~ ~ -arrangement, for example, shown in FIG. 2(b), includes a plurality of buffers BFl - BF3, a demultiplexer DMPX which distributes received packets Pl - P4 in accordance with the priority of the packets, and a multiplexer MPX which selects an output packet in accordance with the priority of the packets. In this arrangement, for example, packets .
Pl and P4 of high priorities are stored in the buffer BF
and transmitted preferentially while packets Pl and P3 of lower priority are stored in the buffers BF2 and BF3 in accordance with their priorities and are transmitted after the packets Pl and P4 of highest priority are transmitted.
The communication information handled by such packet communication system is divided mainly into twoS
201 1133 ~
,~ .. ,. ~
information which requires high instanta~eousness and ~-whose value itself would be impaired like the information on voic~ if transmission delay and/or reversal of packets .-. :.
with reference to time occurs; and information which requires a low discard property in order to prevent possible impairment to the meaning of the entire ~: .
information, for example, caused by a failure of packets in data from data terminals, etc. Therefore, it is necessary to control inputting and/or outputting a packet -;
queue so as to satisfy high instantaneousness and low discard properties of the information even if congection should be avoided using buffers such as those as shown FIGs. 2(a) and (b). ;~
In the buffer arrangement of FIG. 2(a), packets ~- .
can only be output in order of their reception, so that `~
information of high instantaneousness cannot be output ~;
preferentially. In the bu~fer structure of FIG. 2(b), , . :~
information of high instantaneousness is given high priority, 80 that it can be output preferentially to ~ ~
thereby ensure high instantaneousness. By such system, ~-however, information of lower priority increasingly tends ;
to stay in the buffer to thereby cause an overflow and a ;
. .
problem of transmission delay exceeding an acceptable limit because information of higher priority is preferentially processed. In the buffer arrangement of ~ -:,. . .
FIG. 2(b1, the sequence of packet outputting is determined only in accorda~lce with priority irrespective of the -i number of stays of packets in the priority-classified ~ `
: :'''.: '' ' i '~.'.
~`-` ` 2011133 buffers. Therefore, if communication information concentrates in the buffer arrangement temporarily from the ~
various information terminals, transmission delays of packets ~;
of lower priority would increase and packets would overflow easily. Possible packets arriving after the overflow would be discarded to thereby degrade their transmission quality.
As mentioned above, the prior art packet communication system avoids congestion of packets using one or more -~-buffers, but selects the sequence of information outputting in accordance with priorities of the packets alone irrespective of the number of packet stays. Therefore, transmission delay of packets of lower priorities increases and those packets are easily discarded to thereby cause the problem that the transmission quality satisfying both of high instantaneous and low discard properties cannot be obtained. -,''''- ,~
The present invention provides a packet communication ~y~tem and method of controlling same to obtain a transmission quality which satisfies both of high instantaneous and low discard properties.
.:
The packet communication system according to the present invention includes means for counting the .
' '" '.
2011~3~
- s respective numbers of stays of packets in priority~
classified information buffers, and means for controlling the output percentages or both of the respective output ;~ ~ -percentages and input percentages of packets from and to the respective buffers in accordance with combinations of the counted numbers of strays of packets and information on priorities of the packets. ~-In the present invention, the output percentages ~;
or both of the output percentages and input percentages of packets from and to the respective buffers are controlled -in accordance with combinations of priority-classified packets and priorities of the packets. ~or the outputting ; -~
of packets, the number of packets having high instantaneousness property output from buffers where the number of strays of packets is large is increased so as to ~ -;
reduce the number of packet strays rapidly while if the number of packet strays is large, packets of lower priorities are not admitted to thereby avoid the overflow of the buffers. Therefore, packets of high instantaneousness property is output at a higher output frequency. Packets of lower priorities received when the --number of packet strays iB not so large are output before ;~
transmission delay becomes large because packets of higher ~;
priorities are output in a short time. Thus, the overflow of the buffers i8 avoided beforehand and a transmission quality which satisfies both of high instantaneousness and low discard properties is ensured.
As just described, according to the present ~". .:' :. ~'"
1 3 3 ::
. ~ `
invention, the output percentages of or both of the output percentages and input percentages of packets from and to the buffers are controlled in accordance with combinations of priorities of packets and the numbers of stays of the packets -~
in the buffers. Therefore, packets of higher priorities are output early to thereby improve the transmission quality of ~ k voice, etc., which is required to have hiqh instantaneousness property. since buffers where the number of stays of packets ;
is large are selected very frequently, packets of lower priorities are output before the transmission delay becomes large to thereby satisfies both of high instantaneousness and low discard properties. In addition, since the admission of a request for reception of a packet which would cause an overflow of the buffers is inhibited, the overflow of the buffers is prevented beforehand to thereby solve the ~ t .
congestion of packets early.
~. ~; `'.'"
.: ' .
. ',, '.
" ` 3 3 FIG. 3 is a block diagram of one embodiment of a buffer ~ ~-section and input and output controllers for the buffer section as the main portion of the inventive packet communication system. The embodiment includes an input : :::
control unit 1, a buffer section 2 which includes :~ -;
instantaneousness priority-classified buffers 2-1 to 2-4, an output control unit 3, an output control counter 4, a number~
of packets stays counter S, and comparator 6.
The input control unit 1 receives data DATA of a packet having a format shown in FIG. 4, priority indicative data Pd of two bits, PdO and Pdl, concerning discard property and `~
priority indicative data Pr of two bitæ PrO and Prl .~
concerning instantaneousness property, and a request for ~ `m reception Req from a terminal (not shown). It also receives :
a packet discarding command signal Pdsp from the comparator .
6. The input control unit 1 outputs an acknowledqe signal ACK to a terminal which .,'~." ' 25 .
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-" 2011133 has requested the reception of the packet when the reception of the packet is possible. When the reception - ;
of the packet is acknowledged, the input control unit 1 outputs a packet input pulse Pin to the counter 5. The received packet is tra~sferred to and stored in buffers 2- ;~
1 to 2-4 of priorities corresponding to the contents of the instantaneousness priority-classified indicative bits ~ `f.;~
PrO and Prl. In the format of the packet of FIG. 4, reference characters DLA de~otes the address of a destination terminal to which the packet is to be transferred and ACN the number of an access channel to form the transmission path between the terminal interface which transmitted the packet and the line interface, and CK an error indicative bit. -;
The output control unit 3 receives packet output request signals Req (Prl) - Req (Pr4) from buffers 2-1 to 2-4 corresponding to four different priorities Prl - Pr4 .''`, where Prl ~ Pr2 ~ Pr3 ~ Pr4 expressed by priority indicative bits PrO and Prl, and packet data PD (Prl) - PD
(Pr4), and outputs output acknowledge signals ACK (Prl) -ACK (Pr4) to the respective buffers 2-1 to 2-4. It also r~ceives from the comparator 6 a 4-bit count Q for causi~g the buffers 2-1 to 2-4 to output packets stored in those buffers in 16 differe~t output patterns, and buffer stay signals Utrl - Utr4 indicating that the numbers of stays of packets in the respective buffers 2-1 to 2-4 have exceeded the thresholds Thrl to Thr4 of the number of stays of packets determined for the corresponding buffers ,, ~
~' ;`.~`,s~
.. ~ ~ ....
--:" 2011133 ::
g 2-1 to 2-4 (according to priority). , -The number-of-packet stays counter 5 counts ~ .
respective packet stays in the priority-classified buffers 2-1 to 2-4 and the overall number of packet stays using ~ .
packet input pulses Pin from the input control unit 1 and packet output pulses Po from the output control unit 3.
The respective numbers of stays in the buffers 2-1 to 2-4 are input as counts Qul - Qu4 to the comparator 6 while the overall number of stays is input as a count value of ~ u~
Qu to the comparator 6.
The comparator 6 compares the received counts . `
Qu1 - Qu4 from the counter 5 and corresponding thresholds `~
Thrl - Thr4 for the numbers of stays determined according to priority and outputs a buffer stay signal Utri (i = 1-4) for a buffer where the relations Qul ? Thrl, Qu2 ~ - .
Thr2, Qu3 ~ Thr3, or Qu4 ~ Thr4 hold. It also compares ~ -the count value Qu and respective thresholds Thdl - Thd4 wh~re Thdl ~ Thd2 ~ Thd3 7 Thd4 determined according ~ r ~'~
to discard priority property and outputs a signal Pdspl which inhibits the reception of packets of all the first :~
"i""~,;.,.;, ,~,."~æ
to fourth different discard priorities expressed by di~card priority indicative bits pdO and pdl if ~ Qu ;.
Thdl~ a signal Pdsp2 which inhibits the:reception of packets of the first to third priorities if Thdl ~- ~ Qu ?
Thd2~ a ~ignal Pdsp3 which inhibits the reception of . ... .
packets of the first and second priorities if Thd2 - ~Qu >
Thd3~ and a signal Pdsp4 which inhibits the reception of a packet of the first priority which expresses the highest -"`""",,,',"'".' ' ' .'. ' . .
2011133 ~: ~
- 10 ~
discard priority if Thd3 - ~ Qu > Thd4. These signals Pdspi (i = 1-4) are input to the input control unit 1.
FIG. 5 illustrates the detailed structure of the main portion of the output control unit 3. It is arranged that the respective output frequencies of the buffers 2-1 to 2-4 are controlled by output acknowledge signals ACK
(prl) - ACK (pr4) stored in the read only memory (ROM) 30.
ROM 30 receives the respective output request signals Req (prl) - Req (pr 4) from the buffers 2-1 to 2-4, the respective buffer stay signals Utrl - Utr4 from the ~ -comparator 6 and counts Q from the counter 4. As shown in . . ~
FIG. 6, the ROM 30 includes 32 memory planes 30-1 to 30-32 corresponding to the number of combinations "32" of the ;~
maximum value "4" indicative of concurrent generation of packet output requests Req (prl) - Req (pr4) and kinds of generation of stay signals Utrl - Utr4 "0-5n. Each of the memory planes 30-1 to 30-32 has 16 (rows) x 4 (columns) addresses corresponding to combinations of the maximum ; -~, count "16~ of the counter 4 and output acknowledge signals ACK ~prl) - ACK (pr4) to the respective buffers 2-1 to 2-4 and beforehand stores output acknowledge signals shown by inclined lines in the addresses in the direction of extension of columns at an appropriate percentage. One of the memory planes 30-1 to 30-32 is selected in accordance with one of combinations of output request signals Req ~.`
~prl) - Req (pr4) from the corresponding buffers 2-1 to 2-4 and buffer stay signals Utrl - Utr4. For example, when none of the stay signals Utrl - Utr4 are generated and '.'` '`;",',,'-,~
output request signals Req (prl) - Req (pr4) are generated from all the buffers, the memory plane 30-1 is selected.
The addresses in the direction of row extension in the memory plane 30-1 are selected sequentially in accordance with the count Q of the counter 4, so that output acknowledge signals ACK (prl) - ACK (pr4) set in the -~
addresses in the direction of row extension are output. ;~
For example, when the memory plane 30-1 is selected, ACK
(prl) - ACK (pr4) are output at a ratio of 9 : 4 : 2 : 1.
When output request signals Req (prl) - Req (pr4) are generated from all the buffers 2-1 to 2-4 and the stay of packets occurs in the buffer 2-4, the memory plane 30-32, for example, is selected and the output acknowledge signals ACK (prl) - ACX (pr4) are output at the ratio of 5 : 2 : 1 : 8. For the priority, the relation-prl pr2 pr3 pr4 holds.
As mentioned above, since packets of lower ;~
instantaneousness priority are output at a proper . . .
fr~quencies by changing the frequencies of outputting packets of respective priorities in accordance with combinations of output requests from the buffers 2-1 to 2-4 and the number of packet stays, transmission delay of packets of lower instantaneousness priorities is prevented from increasing. By changing the stored contents of the ~ ,~
ROM 30, the number of stays and transmission delay times of packets of respective priorities can be controlled.
FIG. 7 iB a detailed schematic of the input control unit 1 which includes an input control ROM 10 ~ - ..,...:. , ....,. .", , jl .
',, '' ,'','.
-- 2011133 ~
which determin~s whether a packet should be accepted or not, and a demultiplexer (DMPX) 11 which determi~es the -~
instantaneousness priority of the received packet and distributes it to a corresponding buffer. The input control ROM 10 receive~ an input request signal Req, a ~ ~
discard priority indicative bits pdO - pdl, and packet ~ ~.
discard command signals Pdspl - Pdsp4 as an address signal and outputs an input acknowledge signal ACK when the reception of a packet is permitted. DMPX 11 receives packet data DATA, instantaneousness priority indicative ::
bits prO - prl and an input acknowledge signal ACK.
As mentioned above, the comparator 6 compares the total count SQu of stays of packets in all the ~ ;
buffers 2-1 to 2-4 and discard thresholds Thdl - Thd4 ;~
(where Thdl ~ Thd2 ? Thd3 ~ Thd4) and outputs a signal Pdspl which inhibits the reception of packets of all four kinds (or the first to fourth) of discard priorities expressed by bit~ pdO - pdl; a signal Pdsp2 which inhibits the reception of packete of the first to third priorities (in other words, admits the reception of only a packet of :.
the lowe~t discard property) if ~ Qu ~ Thd2 a signal ` -Pdp~3 which inhibit~ the reception of packets of the first and second priorities if ~Qu ~ Thd3t and a signal Pdsp4 ;~
which inhibits the reception of a packet of the first priority (or the highest discard priority) if ~ Qu ~
. ,: .. .. .,.:
Thd4. When the input control ROM 10 receives an input ..
request signal Req, it determines whether the discard .;~
priority of the input packet indicated by the discard . .
" . ~ !, .' '.'.'~ "'"`' . .' ' '.": ~ ,''', "'.': , 'j':~'': .1, priority indicative bits pdO and pdl corresponds to the priority in which the reception of the input packet is inhibited by the discard indicative signals Pdspl - Pdsp4.
If ~ot, it outputs an input acknowledge signal ACK. Thus, the received packet is distributed by the DMPX 11 to and stored in a buffer of a priority indicated by instantaneousness priority indicative bits prO and prl. ;~
If the discard priority of the input packet indicated by the discard priority indicative bits pdO and pdl corresponds to the priority in which the reception of the packets is inhibited by the discard indicative signals Pdspl - Pdsp4, tbe control ROM10 outputs no input acknowledge signal ACK. Thus, the input packet is discarded without being entried. -;;
Therefore, if the total count ~ Qu of packet stays changes as shown by the curve of FIG. 8, the packet the input request of which is made is discarded as shown by hatched portion in FIG. 7 in accordance with its ~ ,~
di~card priority to thereby avoid excessive congection of packets. ~;
While in the above embodiment the buffer group is composed of four buffer rows, it should be noted that the number of buffer rows may be set to a~y value, of ;
course. While the output frequency of packets is controlled by the output control ROM, it may be controlled by a microprocessor.
: .,~ ,~., .
with reference to time occurs; and information which requires a low discard property in order to prevent possible impairment to the meaning of the entire ~: .
information, for example, caused by a failure of packets in data from data terminals, etc. Therefore, it is necessary to control inputting and/or outputting a packet -;
queue so as to satisfy high instantaneousness and low discard properties of the information even if congection should be avoided using buffers such as those as shown FIGs. 2(a) and (b). ;~
In the buffer arrangement of FIG. 2(a), packets ~- .
can only be output in order of their reception, so that `~
information of high instantaneousness cannot be output ~;
preferentially. In the bu~fer structure of FIG. 2(b), , . :~
information of high instantaneousness is given high priority, 80 that it can be output preferentially to ~ ~
thereby ensure high instantaneousness. By such system, ~-however, information of lower priority increasingly tends ;
to stay in the buffer to thereby cause an overflow and a ;
. .
problem of transmission delay exceeding an acceptable limit because information of higher priority is preferentially processed. In the buffer arrangement of ~ -:,. . .
FIG. 2(b1, the sequence of packet outputting is determined only in accorda~lce with priority irrespective of the -i number of stays of packets in the priority-classified ~ `
: :'''.: '' ' i '~.'.
~`-` ` 2011133 buffers. Therefore, if communication information concentrates in the buffer arrangement temporarily from the ~
various information terminals, transmission delays of packets ~;
of lower priority would increase and packets would overflow easily. Possible packets arriving after the overflow would be discarded to thereby degrade their transmission quality.
As mentioned above, the prior art packet communication system avoids congestion of packets using one or more -~-buffers, but selects the sequence of information outputting in accordance with priorities of the packets alone irrespective of the number of packet stays. Therefore, transmission delay of packets of lower priorities increases and those packets are easily discarded to thereby cause the problem that the transmission quality satisfying both of high instantaneous and low discard properties cannot be obtained. -,''''- ,~
The present invention provides a packet communication ~y~tem and method of controlling same to obtain a transmission quality which satisfies both of high instantaneous and low discard properties.
.:
The packet communication system according to the present invention includes means for counting the .
' '" '.
2011~3~
- s respective numbers of stays of packets in priority~
classified information buffers, and means for controlling the output percentages or both of the respective output ;~ ~ -percentages and input percentages of packets from and to the respective buffers in accordance with combinations of the counted numbers of strays of packets and information on priorities of the packets. ~-In the present invention, the output percentages ~;
or both of the output percentages and input percentages of packets from and to the respective buffers are controlled -in accordance with combinations of priority-classified packets and priorities of the packets. ~or the outputting ; -~
of packets, the number of packets having high instantaneousness property output from buffers where the number of strays of packets is large is increased so as to ~ -;
reduce the number of packet strays rapidly while if the number of packet strays is large, packets of lower priorities are not admitted to thereby avoid the overflow of the buffers. Therefore, packets of high instantaneousness property is output at a higher output frequency. Packets of lower priorities received when the --number of packet strays iB not so large are output before ;~
transmission delay becomes large because packets of higher ~;
priorities are output in a short time. Thus, the overflow of the buffers i8 avoided beforehand and a transmission quality which satisfies both of high instantaneousness and low discard properties is ensured.
As just described, according to the present ~". .:' :. ~'"
1 3 3 ::
. ~ `
invention, the output percentages of or both of the output percentages and input percentages of packets from and to the buffers are controlled in accordance with combinations of priorities of packets and the numbers of stays of the packets -~
in the buffers. Therefore, packets of higher priorities are output early to thereby improve the transmission quality of ~ k voice, etc., which is required to have hiqh instantaneousness property. since buffers where the number of stays of packets ;
is large are selected very frequently, packets of lower priorities are output before the transmission delay becomes large to thereby satisfies both of high instantaneousness and low discard properties. In addition, since the admission of a request for reception of a packet which would cause an overflow of the buffers is inhibited, the overflow of the buffers is prevented beforehand to thereby solve the ~ t .
congestion of packets early.
~. ~; `'.'"
.: ' .
. ',, '.
" ` 3 3 FIG. 3 is a block diagram of one embodiment of a buffer ~ ~-section and input and output controllers for the buffer section as the main portion of the inventive packet communication system. The embodiment includes an input : :::
control unit 1, a buffer section 2 which includes :~ -;
instantaneousness priority-classified buffers 2-1 to 2-4, an output control unit 3, an output control counter 4, a number~
of packets stays counter S, and comparator 6.
The input control unit 1 receives data DATA of a packet having a format shown in FIG. 4, priority indicative data Pd of two bits, PdO and Pdl, concerning discard property and `~
priority indicative data Pr of two bitæ PrO and Prl .~
concerning instantaneousness property, and a request for ~ `m reception Req from a terminal (not shown). It also receives :
a packet discarding command signal Pdsp from the comparator .
6. The input control unit 1 outputs an acknowledqe signal ACK to a terminal which .,'~." ' 25 .
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': : ' ' ., ,! ', ` ~
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. ~ ~ , -.
,, " , . . .. .
''','""~'; "`.''''"";
-" 2011133 has requested the reception of the packet when the reception of the packet is possible. When the reception - ;
of the packet is acknowledged, the input control unit 1 outputs a packet input pulse Pin to the counter 5. The received packet is tra~sferred to and stored in buffers 2- ;~
1 to 2-4 of priorities corresponding to the contents of the instantaneousness priority-classified indicative bits ~ `f.;~
PrO and Prl. In the format of the packet of FIG. 4, reference characters DLA de~otes the address of a destination terminal to which the packet is to be transferred and ACN the number of an access channel to form the transmission path between the terminal interface which transmitted the packet and the line interface, and CK an error indicative bit. -;
The output control unit 3 receives packet output request signals Req (Prl) - Req (Pr4) from buffers 2-1 to 2-4 corresponding to four different priorities Prl - Pr4 .''`, where Prl ~ Pr2 ~ Pr3 ~ Pr4 expressed by priority indicative bits PrO and Prl, and packet data PD (Prl) - PD
(Pr4), and outputs output acknowledge signals ACK (Prl) -ACK (Pr4) to the respective buffers 2-1 to 2-4. It also r~ceives from the comparator 6 a 4-bit count Q for causi~g the buffers 2-1 to 2-4 to output packets stored in those buffers in 16 differe~t output patterns, and buffer stay signals Utrl - Utr4 indicating that the numbers of stays of packets in the respective buffers 2-1 to 2-4 have exceeded the thresholds Thrl to Thr4 of the number of stays of packets determined for the corresponding buffers ,, ~
~' ;`.~`,s~
.. ~ ~ ....
--:" 2011133 ::
g 2-1 to 2-4 (according to priority). , -The number-of-packet stays counter 5 counts ~ .
respective packet stays in the priority-classified buffers 2-1 to 2-4 and the overall number of packet stays using ~ .
packet input pulses Pin from the input control unit 1 and packet output pulses Po from the output control unit 3.
The respective numbers of stays in the buffers 2-1 to 2-4 are input as counts Qul - Qu4 to the comparator 6 while the overall number of stays is input as a count value of ~ u~
Qu to the comparator 6.
The comparator 6 compares the received counts . `
Qu1 - Qu4 from the counter 5 and corresponding thresholds `~
Thrl - Thr4 for the numbers of stays determined according to priority and outputs a buffer stay signal Utri (i = 1-4) for a buffer where the relations Qul ? Thrl, Qu2 ~ - .
Thr2, Qu3 ~ Thr3, or Qu4 ~ Thr4 hold. It also compares ~ -the count value Qu and respective thresholds Thdl - Thd4 wh~re Thdl ~ Thd2 ~ Thd3 7 Thd4 determined according ~ r ~'~
to discard priority property and outputs a signal Pdspl which inhibits the reception of packets of all the first :~
"i""~,;.,.;, ,~,."~æ
to fourth different discard priorities expressed by di~card priority indicative bits pdO and pdl if ~ Qu ;.
Thdl~ a signal Pdsp2 which inhibits the:reception of packets of the first to third priorities if Thdl ~- ~ Qu ?
Thd2~ a ~ignal Pdsp3 which inhibits the reception of . ... .
packets of the first and second priorities if Thd2 - ~Qu >
Thd3~ and a signal Pdsp4 which inhibits the reception of a packet of the first priority which expresses the highest -"`""",,,',"'".' ' ' .'. ' . .
2011133 ~: ~
- 10 ~
discard priority if Thd3 - ~ Qu > Thd4. These signals Pdspi (i = 1-4) are input to the input control unit 1.
FIG. 5 illustrates the detailed structure of the main portion of the output control unit 3. It is arranged that the respective output frequencies of the buffers 2-1 to 2-4 are controlled by output acknowledge signals ACK
(prl) - ACK (pr4) stored in the read only memory (ROM) 30.
ROM 30 receives the respective output request signals Req (prl) - Req (pr 4) from the buffers 2-1 to 2-4, the respective buffer stay signals Utrl - Utr4 from the ~ -comparator 6 and counts Q from the counter 4. As shown in . . ~
FIG. 6, the ROM 30 includes 32 memory planes 30-1 to 30-32 corresponding to the number of combinations "32" of the ;~
maximum value "4" indicative of concurrent generation of packet output requests Req (prl) - Req (pr4) and kinds of generation of stay signals Utrl - Utr4 "0-5n. Each of the memory planes 30-1 to 30-32 has 16 (rows) x 4 (columns) addresses corresponding to combinations of the maximum ; -~, count "16~ of the counter 4 and output acknowledge signals ACK ~prl) - ACK (pr4) to the respective buffers 2-1 to 2-4 and beforehand stores output acknowledge signals shown by inclined lines in the addresses in the direction of extension of columns at an appropriate percentage. One of the memory planes 30-1 to 30-32 is selected in accordance with one of combinations of output request signals Req ~.`
~prl) - Req (pr4) from the corresponding buffers 2-1 to 2-4 and buffer stay signals Utrl - Utr4. For example, when none of the stay signals Utrl - Utr4 are generated and '.'` '`;",',,'-,~
output request signals Req (prl) - Req (pr4) are generated from all the buffers, the memory plane 30-1 is selected.
The addresses in the direction of row extension in the memory plane 30-1 are selected sequentially in accordance with the count Q of the counter 4, so that output acknowledge signals ACK (prl) - ACK (pr4) set in the -~
addresses in the direction of row extension are output. ;~
For example, when the memory plane 30-1 is selected, ACK
(prl) - ACK (pr4) are output at a ratio of 9 : 4 : 2 : 1.
When output request signals Req (prl) - Req (pr4) are generated from all the buffers 2-1 to 2-4 and the stay of packets occurs in the buffer 2-4, the memory plane 30-32, for example, is selected and the output acknowledge signals ACK (prl) - ACX (pr4) are output at the ratio of 5 : 2 : 1 : 8. For the priority, the relation-prl pr2 pr3 pr4 holds.
As mentioned above, since packets of lower ;~
instantaneousness priority are output at a proper . . .
fr~quencies by changing the frequencies of outputting packets of respective priorities in accordance with combinations of output requests from the buffers 2-1 to 2-4 and the number of packet stays, transmission delay of packets of lower instantaneousness priorities is prevented from increasing. By changing the stored contents of the ~ ,~
ROM 30, the number of stays and transmission delay times of packets of respective priorities can be controlled.
FIG. 7 iB a detailed schematic of the input control unit 1 which includes an input control ROM 10 ~ - ..,...:. , ....,. .", , jl .
',, '' ,'','.
-- 2011133 ~
which determin~s whether a packet should be accepted or not, and a demultiplexer (DMPX) 11 which determi~es the -~
instantaneousness priority of the received packet and distributes it to a corresponding buffer. The input control ROM 10 receive~ an input request signal Req, a ~ ~
discard priority indicative bits pdO - pdl, and packet ~ ~.
discard command signals Pdspl - Pdsp4 as an address signal and outputs an input acknowledge signal ACK when the reception of a packet is permitted. DMPX 11 receives packet data DATA, instantaneousness priority indicative ::
bits prO - prl and an input acknowledge signal ACK.
As mentioned above, the comparator 6 compares the total count SQu of stays of packets in all the ~ ;
buffers 2-1 to 2-4 and discard thresholds Thdl - Thd4 ;~
(where Thdl ~ Thd2 ? Thd3 ~ Thd4) and outputs a signal Pdspl which inhibits the reception of packets of all four kinds (or the first to fourth) of discard priorities expressed by bit~ pdO - pdl; a signal Pdsp2 which inhibits the reception of packete of the first to third priorities (in other words, admits the reception of only a packet of :.
the lowe~t discard property) if ~ Qu ~ Thd2 a signal ` -Pdp~3 which inhibit~ the reception of packets of the first and second priorities if ~Qu ~ Thd3t and a signal Pdsp4 ;~
which inhibits the reception of a packet of the first priority (or the highest discard priority) if ~ Qu ~
. ,: .. .. .,.:
Thd4. When the input control ROM 10 receives an input ..
request signal Req, it determines whether the discard .;~
priority of the input packet indicated by the discard . .
" . ~ !, .' '.'.'~ "'"`' . .' ' '.": ~ ,''', "'.': , 'j':~'': .1, priority indicative bits pdO and pdl corresponds to the priority in which the reception of the input packet is inhibited by the discard indicative signals Pdspl - Pdsp4.
If ~ot, it outputs an input acknowledge signal ACK. Thus, the received packet is distributed by the DMPX 11 to and stored in a buffer of a priority indicated by instantaneousness priority indicative bits prO and prl. ;~
If the discard priority of the input packet indicated by the discard priority indicative bits pdO and pdl corresponds to the priority in which the reception of the packets is inhibited by the discard indicative signals Pdspl - Pdsp4, tbe control ROM10 outputs no input acknowledge signal ACK. Thus, the input packet is discarded without being entried. -;;
Therefore, if the total count ~ Qu of packet stays changes as shown by the curve of FIG. 8, the packet the input request of which is made is discarded as shown by hatched portion in FIG. 7 in accordance with its ~ ,~
di~card priority to thereby avoid excessive congection of packets. ~;
While in the above embodiment the buffer group is composed of four buffer rows, it should be noted that the number of buffer rows may be set to a~y value, of ;
course. While the output frequency of packets is controlled by the output control ROM, it may be controlled by a microprocessor.
: .,~ ,~., .
Claims (12)
1. A packet communication system which produces packets of information from communication information received from one of a plurality of types of sources, wherein the packets include a portion of the communication information and control information which includes instantaneousness priority data representative of the degree of instantaneousness required to transmit the communication information, and discard priority data representative of the degree to which a portion of the communication data may be discarded without significantly effecting the quality of the transmission of the communication information, the system comprising:
a plurality of buffers provided for temporarily storing said packets, wherein each buffer stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; input control means for receiving the packets and writing the received packets into a corresponding one of the plurality of buffers in accordance with the instantaneousness priority data of the received packets; first counting means for counting the number of packets currently stored in each buffer on the basis of the numbers of packets written in and read out from each buffer;
and output control means for respectively controlling a frequency at which the packets are to be read from each buffer in accordance with the number of packets stored in each buffer.
a plurality of buffers provided for temporarily storing said packets, wherein each buffer stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; input control means for receiving the packets and writing the received packets into a corresponding one of the plurality of buffers in accordance with the instantaneousness priority data of the received packets; first counting means for counting the number of packets currently stored in each buffer on the basis of the numbers of packets written in and read out from each buffer;
and output control means for respectively controlling a frequency at which the packets are to be read from each buffer in accordance with the number of packets stored in each buffer.
2. The packet communication system of claim 1, further comprising:
comparing means for comparing the number of packets stored in each buffer with a plurality of first threshold values set for each of the respective buffers, wherein said output control means further controls the frequency at which the packets are read from each buffer in accordance with the output of said comparing means.
comparing means for comparing the number of packets stored in each buffer with a plurality of first threshold values set for each of the respective buffers, wherein said output control means further controls the frequency at which the packets are read from each buffer in accordance with the output of said comparing means.
3. The packet communication system of claim 2, wherein said output control means further controls the frequency at which the packets are read from each buffer in accordance with the output of said comparing means and output requests from the buffers.
4. The packet communication system of claim 2, further comprising:
output control counter means for repetitively outputting a count value which is incremented by a predetermined value in synchronism with a predetermined clock signal, wherein said output control means further controls the frequency at which the packets are read from each buffer in accordance with the output of said comparing means, the output requests from the buffers, and a count value of said output control counter means.
output control counter means for repetitively outputting a count value which is incremented by a predetermined value in synchronism with a predetermined clock signal, wherein said output control means further controls the frequency at which the packets are read from each buffer in accordance with the output of said comparing means, the output requests from the buffers, and a count value of said output control counter means.
5. The packet communication system of claim 4, wherein said output control means includes a memory including a plurality of addressable memory planes corresponding in number with the number of possible combinations of the outputs of said comparing means and the output requests from the respective buffers such that each of the memory planes are addressed by a particular combination of outputs from said comparing means and output requests from the respective buffers, each memory plane causes an output acknowledge signal to be output to a selected one of the buffers each time the count value of said output control counter means is incremented, and the output acknowledge signal permits said output control means to read a packet from the selected buffer.
6. The packet communication system of claim 1, further comprising:
second counting means for counting the total number of packets stored in all of the plurality of buffers on the basis of the numbers of packets written in and read out from the plurality of buffers, wherein said input control means controls writing of packets into the respective buffers in, accordance with the total number of packets stored in the plurality of buffers.
second counting means for counting the total number of packets stored in all of the plurality of buffers on the basis of the numbers of packets written in and read out from the plurality of buffers, wherein said input control means controls writing of packets into the respective buffers in, accordance with the total number of packets stored in the plurality of buffers.
7. The packet communication system of claim 6, further comprising:
comparing means for comparing the total number of packets stored in the plurality of buffers with a plurality of second threshold values set in accordance with the discard priority data, wherein said input control means controls writing of packets into the respective buffers in accordance with a comparison result of said comparing means.
comparing means for comparing the total number of packets stored in the plurality of buffers with a plurality of second threshold values set in accordance with the discard priority data, wherein said input control means controls writing of packets into the respective buffers in accordance with a comparison result of said comparing means.
8. The packet communication system of claim 7, wherein said input control means controls writing of packets into the respective buffers in accordance with the comparison result of said comparing means and input requests for the buffers.
9. The packet communication system of claim 8, wherein said input control means includes a memory for storing a plurality of input acknowledge signals which permit writing of packets into the respective buffers, wherein each of the input acknowledge signals is addressable with respect to the comparison result of said comparing means, the input requests, and the discard priority data, and wherein the input control means controls writing of packets into the respective buffers in accordance with the input acknowledge signal read out from said memory.
10. A packet communication system which produces packets of information from communication information received from one of a plurality of types of sources, wherein the packets include a portion of the communication information and control information which includes instantaneousness priority data representative of the degree of instantaneousness required to transmit the communication information, and discard priority data representative of the degree to which a portion of the communication data may be discarded without significantly effecting the quality of the transmission of the communication information, the system comprising:
a plurality of buffers provided for temporarily storing said packets, wherein each buffer stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; counting means for counting the number of packets stored in each buffers and the total number of packets stored in all of the plurality of buffers on the basis of the numbers of packets written in and read out from each of the buffers; comparator means for comparing the numbers of packets stored in the respective buffers with a plurality of first threshold values which are set in association with the plurality of buffers to output an output control signal indicating that the number of packets stored in each buffer respectively exceeds each of the plurality of first threshold values, and for comparing the total number of packets stored in the plurality of buffers with a plurality of second threshold values which are set in association with the discard priority data to output a plurality of acknowledge inhibiting signals indicating that the total number of packets stored in the respective buffers respectively exceeds each of the plurality of second threshold values; output control counter means for repetitively outputting a count value which is incremented by a predetermined value in synchronism with a predetermined clock signal, input control means for controlling writing of packets into the respective buffers in accordance with the acknowledge inhibiting signals output from said comparator means, input requests for the buffers, the discard priority data, and the instantaneousness priority data; and output control means for controlling a frequency at which the packets are read from each buffer in accordance with the output control signal output from said comparator means, the output requests from the respective buffers, and count values of said output control counter means.
a plurality of buffers provided for temporarily storing said packets, wherein each buffer stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; counting means for counting the number of packets stored in each buffers and the total number of packets stored in all of the plurality of buffers on the basis of the numbers of packets written in and read out from each of the buffers; comparator means for comparing the numbers of packets stored in the respective buffers with a plurality of first threshold values which are set in association with the plurality of buffers to output an output control signal indicating that the number of packets stored in each buffer respectively exceeds each of the plurality of first threshold values, and for comparing the total number of packets stored in the plurality of buffers with a plurality of second threshold values which are set in association with the discard priority data to output a plurality of acknowledge inhibiting signals indicating that the total number of packets stored in the respective buffers respectively exceeds each of the plurality of second threshold values; output control counter means for repetitively outputting a count value which is incremented by a predetermined value in synchronism with a predetermined clock signal, input control means for controlling writing of packets into the respective buffers in accordance with the acknowledge inhibiting signals output from said comparator means, input requests for the buffers, the discard priority data, and the instantaneousness priority data; and output control means for controlling a frequency at which the packets are read from each buffer in accordance with the output control signal output from said comparator means, the output requests from the respective buffers, and count values of said output control counter means.
11. A method of controlling a packet communication system which produces packets of information from communication information received from one of a plurality of types of sources, wherein the packets include a portion of the communication information, an addressee's address, and control information which includes instantaneousness priority data representative of the degree of instantaneousness required to transmit the communication information, and discard priority data representative of the degree to which a portion of the communication data may be discarded without significantly effecting the quality of the transmission of the communication information; stores the packets in a plurality of buffers, wherein each of a plurality of buffers stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; reads the packets out of the respective buffers according to the instantaneousness priority data; and transmits the packets to an addressee's address, the method comprising the steps of:
counting the number of packets stored in each buffer;
and controlling output of packets from each buffer in accordance with the counted number of packets stored in each buffer.
counting the number of packets stored in each buffer;
and controlling output of packets from each buffer in accordance with the counted number of packets stored in each buffer.
12. A method of controlling a packet communication system which produces packets of information from communication information received from one of a plurality of types of sources, wherein the packets include a portion of the communication information, and addressee's address, and control information which includes instantaneousness priority data representative of the degree of instantaneousness required to transmit the communication information, and discard priority data representative of the degree to which a portion of the communication data may be discarded without significantly effecting the quality of the transmission of the communication information; stores the packets in a plurality of buffers, wherein each of a plurality of buffers stores packets having instantaneousness priority data which is different from the instantaneousness priority data of packets stored in the other buffers; reads the packets out of the respective buffers according to the instantaneousness priority data; and transmits the packets to an addressee's address, the method comprising the steps of:
counting the number of packets stored in each buffer;
counting the total number of packets stored in the plurality of buffers; controlling input of packets into the buffers in accordance with the total number of packets stored in the plurality of buffers and the discard priority data; and controlling output of packets from the respective buffers in accordance with the respective numbers of packets stored in the respective buffers.
counting the number of packets stored in each buffer;
counting the total number of packets stored in the plurality of buffers; controlling input of packets into the buffers in accordance with the total number of packets stored in the plurality of buffers and the discard priority data; and controlling output of packets from the respective buffers in accordance with the respective numbers of packets stored in the respective buffers.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50521/1989 | 1989-03-01 | ||
| JP5052189A JP2758194B2 (en) | 1989-03-01 | 1989-03-01 | Packet communication device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2011133A1 CA2011133A1 (en) | 1990-09-01 |
| CA2011133C true CA2011133C (en) | 1994-10-25 |
Family
ID=12861285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002011133A Expired - Lifetime CA2011133C (en) | 1989-03-01 | 1990-02-28 | Packet communication system and method of controlling same |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2758194B2 (en) |
| CA (1) | CA2011133C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3445459B2 (en) * | 1997-02-07 | 2003-09-08 | 沖電気工業株式会社 | Cell assembly equipment |
| JP2008098879A (en) * | 2006-10-11 | 2008-04-24 | Nec Access Technica Ltd | Band controller, control method and program for control |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4680248A (en) * | 1985-08-19 | 1987-07-14 | Hercules Incorporated | Use of desiccant to control edge fusion in dry film photoresist |
-
1989
- 1989-03-01 JP JP5052189A patent/JP2758194B2/en not_active Expired - Lifetime
-
1990
- 1990-02-28 CA CA002011133A patent/CA2011133C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2758194B2 (en) | 1998-05-28 |
| CA2011133A1 (en) | 1990-09-01 |
| JPH02228148A (en) | 1990-09-11 |
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