CA1332449C - Echo compensator - Google Patents
Echo compensatorInfo
- Publication number
- CA1332449C CA1332449C CA000528336A CA528336A CA1332449C CA 1332449 C CA1332449 C CA 1332449C CA 000528336 A CA000528336 A CA 000528336A CA 528336 A CA528336 A CA 528336A CA 1332449 C CA1332449 C CA 1332449C
- Authority
- CA
- Canada
- Prior art keywords
- digital
- analogue
- echo compensator
- adder circuit
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
- H04B3/238—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Optical Communication System (AREA)
- Filters That Use Time-Delay Elements (AREA)
- Manufacturing And Processing Devices For Dough (AREA)
- Electrophotography Configuration And Component (AREA)
- Lock And Its Accessories (AREA)
- Primary Cells (AREA)
Abstract
ABSTRACT
Fig. 1 AN ECHO COMPENSATOR
On a trunk line for digital signals, a digital subtractor circuit (3a) and an adaptive transversal filter (7) are connected between the transmitting path (6) and the receiving path (19) in a shunt arm. Digital signals are transmitted on the trunk line (6,19) in the original frequency band of 0.3 to 3.4 kHz. Via a digital adder circuit (11a), a received signal on the receiving path has superimposed a dc voltage or a digital wobble- or noise signal in the original frequency ranges of 0 to 0.3 and 3.4 to 4 kHz, which are generated in a digital additional signal generator (15a). This inhibits the coefficients from moving out a given range. When analogue-to-digital and digital-to-analogue converters are included for the digital operation of the adaptive transversal filter (7), connection to analogue trunk lines is also possible. These echo compensators are used in particular in international gateway exchanges.
Fig. 1 AN ECHO COMPENSATOR
On a trunk line for digital signals, a digital subtractor circuit (3a) and an adaptive transversal filter (7) are connected between the transmitting path (6) and the receiving path (19) in a shunt arm. Digital signals are transmitted on the trunk line (6,19) in the original frequency band of 0.3 to 3.4 kHz. Via a digital adder circuit (11a), a received signal on the receiving path has superimposed a dc voltage or a digital wobble- or noise signal in the original frequency ranges of 0 to 0.3 and 3.4 to 4 kHz, which are generated in a digital additional signal generator (15a). This inhibits the coefficients from moving out a given range. When analogue-to-digital and digital-to-analogue converters are included for the digital operation of the adaptive transversal filter (7), connection to analogue trunk lines is also possible. These echo compensators are used in particular in international gateway exchanges.
Description
---1-- .
6 133~9 AN E~HQ COMPENSATQP
This invention relates to an echo compensator in which an adaptive transversal filter hag its input connected to the receiving path and its output to the minus lnput of a subtractor circuit in the transmitting ~ath of a digital or - when analogue-to-digital or digital-to-analogue convertere are used rOr the digital operation Or the adaptive transversal filter - analogue trunk line and where the output of the subtractor circuit is connected to the control input Or .
the adaptive transversal filter.
An echo compensator Or this kind i8 disclosed for examp}e ln German patent specirication OS 20 63 271. Adaptive ~ran~versal filter~ are also described ln the magazine "Prequenz" 28(1974)5, pages 118-122 and 28(1974)6, pages 155 to 161.
In international gateway;exchanges echo compensators are arranged at the interraces between a very long internatlonal trunk line, such as a sea cable link or a satellite link, and a national line which leads into a four-wire/two-wire ~unction in the form of a hybrld Junction and an adJoining two-wire line, the so-called end ~ -~
echo path. ;
If the hybrid ~unctions incompletely separate the outward and return patha, the delay ~time Or the signal gives rise to echoes.
From the transmitting station a speech signal returns in attenuated form to the ~peaker following the delay time across the outward and return paths. On a trunk line the delay time can amount to 300 ms-and on the-end echo path 40 ms. The longer the path of the echo, the more ": '':: :::
~` disturbing the effect.
., :-2 1 3 3 2 ~ 20365-2668 For the generation of an artificial echo, echo compensators were each provided with a transversal filter, the coefficients of which are automatically set up in such a way that all similarity between a received signal and a transmitted signal is eliminated. Thus the transversal filter represented a ~ ;~
simulation of the end echo path. However, it has been proved that ;
the control process was not satisfactory since the coefficients ~ -~
were able to move out of a given range, which is associated with considerable noise development at the transmitting path output.
By way of an improvement in German patent specification OS 26 47 305 there is disclosed an arrangement in which either all the coefficients are added or those coefficients whlch exceed a -threshold are counted. If the sum or counting result exceeds a threshold value, the entire set of coefficients is reset.
It is an aim of the invention to provide an improved echo compensator.
According to this invention there is provided an echo compensator comprising a transmitting path and a receiving path, said receivlng path havlng æignal4 thereon lying ln a given useful frequency range;
a subtractor including a positive input and an output ;
connected in said transmitting path, and a negative input;
' an adaptive transversal filter means for setting coefficients including a first input, an output connected to said negative input of said subtractor, and a control input connected to said output of said subtractor;
an adder including an inpu~ connected to said receiving path, a control input and an output connected to said first input of ,~
1332~ ~9 2a 20365-2668 said adaptive transversal filter means; and an auxiliary signal generator means connected to said control input of said adder for providing an auxiliary signal to be added to signals derived from the receiving path which has a constant voltage or a frequency which lies outside said given useful frequency range so that operation of the transversal filter means is improved through a change of a setting of coefficients.
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Advantageously the additional signal generator may comprise a dc voltage generator, a wobble generator or a noise generator. The two latter are provided ~or a userul frequency range of h 300 to 3400 Hz and in particular with frequency ranges of O to 100 Hz and 3.9 to 4 kHz. If the additional signal iB to be further processed in digital form, analogue-to-digital conversion must be carried out.
The invention is based on the recognition that the regulating procedure in the transversal filter can only be performed ~ . .
for rrequencies which are actually contained in the received signal.
Therefore in the absence Or frequencies coefficient sets can be formed (or, where these have been altered as a result of disturbances, are not restored)and, although they compensate the echo, they are considerably greater than is necessary. This involves the disadvantages that the modulation capabillty is reduced and, ln the case of ~tepped control in which the step size is dependent upon the size Or the coefricient, excessively large steps result.
It iB advantageous that the noise generator should comprise a clock signal generator, a clock rate divider and a programmable read only store ~PROM), where the clock rate divider switches over the addresses Or the programmable read only store at a fixed clock rate. -An echo compensator for the compensation of compressed digital signals on the trunk line can advantageously be constructed in that the subtractor circuit 18 provided as a digital subtractor circuit preceded by a first digital expander and followed by a digital compressor, and the adder circuit i8 provided as a digital ' .
' . -4-1 3 3 ~
adder circuit having its fir~t input preceded by a ~econd digital e~pander. The dlgital adder circuit and the second second digital expander can be replaced by a third digital e~pander which is to add a dc voltage. The compressor and the expanders can comprise programmable read only stores (PROM).
An echo compensator for analogue signals on the trunk line can be advantageously constructed in that the output of the adaptive transversa5 filter i8 rollowed by a digital-to-analogue converter and a rirst low-pass fllter, the control input Or the adaptire transversal filter is preceded by a first band-pass filter and an analogue-to-dlgital converter and the adder circuit is a digital adder circuit preceded by a band-pass filter and a further analogue-to-digital converter. The digital adder circuit can be replaced by an analogue adder circuit and the analogue adder circuit -and the further analogue-to-digital converter can be interchanged. ; , Analogue signals can be compensated by arranging the subtractor circuit is a digital subtractor circuit preceded by a band-pass filter and an analogue-to-digital converter and is followed by a digital-to-analogue converter and a low-pass filter, and the ;~;~
adder circuit is a digital adder circuit preceded by a further band-pass filter and~a further analogue-to-digltal converter.
mbodiments of this inventlon will now be described, by way ;~
:
o~ example, with reference to the accompanying drawings in which~
Fig. 1 is a blocX clrcuit dlagram of a first form of echo compensator embodying the invention and for use with compressed digital signals;
1332L~9 Flg. 2 i8 a block circuit diagram Or a known adaptive transversal filter used in the echo compensator shown in Fig. l;
Pig. 3 iB a block circuit diagram Or a nolse generator or wobble generator;
Fig. 4 is a block circuit diagram of a second form of echo compensator embodying the invention and for use with compressed digital signals;
Pig. 5 18 a block circuit diagram of a third form o~ echo compensator embodying the invention but for use with analogue signals;
Pig. 6 is a block circuit dlagram of a fourth form of echo compensator embodying the invention but for use with analogue signals; and Fig. 7 is a block circuit diagram Or a fifth ~orm of echo comgensator embodying the invention but for use with analogue signals.
In Fig. 1 there is shown an echo compensator embodYing the invention and connécted to a trunk line via which compressed digital signals are transmitted. The arrangement includes a transmitting path 6, with input 1 and output 5, and a receiving path 19, with input 17 and output 18. Inserted into the transmitting path 6 i~ a digital espander 2, a digital subtractor circuit 3a and a digital compressor I . ~ I .
4. A shunt arm contains an adaptive transversal filter 7 with input 10, control input 9 and output 8, a digital adder circuit lla with a rlrst lnput 13 and a second input 14, a digital espander 16 and an additional signal generator 15a for generating digital ~ignals. The ,. ~
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companding 18 carried out between 8 bits and 13 bits. The compressors and expanders can comprise programmable read only stores (PROM).
A Compressed digital signal incoming in the receiving path 19, which correspondg to an analogue signal in the frequency range rrom 300 to 3400 ~z, iE espanded in-the digital expander 16 in order to cancel the compression and in the digital adder circuit lla is added to an additional signal supplied by the additional signal generator 15a. The sum is fed to the lnput 10 Or the adaptive ~ ~
transversal rilter 7. At its control input 9, the transversal rilter ~ ,;
7 simultaneously receives an error signal emanating ~rom the digital subtractor circuit 3a. Its coerficients are automatically set such ~;
that the signal generated at ita output 8 becomes as similar as possible to the signal occurring at the transmitting path input l. In this case the dirrerence between the two signals ~ormed by the : . .
digital subtractor circuit 3a becomes a minimum.
The additional signal is either a dc voltage or a wobble ~signal or noise signal in the rrequency range from O to 100 Hz and 3900 to 4000 Hz, which are in each case converted into a digital signal. These ~requency ranges are surficiently spaced from the userul signal ~requency range (300 to 3400 Hz). As a dc voltage or signals with such~a frequency do not occur at the input 1 Or the tran~mitting path 6, the adaptive transversal filter 7 will automatically set its coefficient oet in such manner that said signals also disappear at the output 5 of the tran~mitting path 6. In this way the described disadvantage~ o~ known echo compensators are avoided.
In Flg. 2 there is ~hown an adaptive transversal filter 7. -It contains an adder circuit 20 and in each case three hundred and twenty multiplier circuits 21,25 and 29, stores 22,26 and 30, adder circuits 23,27 and 31, sign-multiplier circuits (correlators) 24,28 and 32 and delay elements 33,34 and 35. The 13-bit codewords at the inputs 9 and 10 are processed in parallel at the 8-kH~-clock rate. In the codewords occurring at the input 10, because Or the additionally superimposed noise-wobble-or dc voltage, 14 bits are pos~ible. Less than 13 bits may occur at the input 9; possibly only one sign-bit.
The simple sine correlation can also be replaced by a more complicated circuit in which the step ~ize iB dependent upon various parameters ~uch as reception level, transmission level, coerficient size etc.
The signal occurring at the input 10 is fed with a staggered delay Or 125~8 to the rirst inputs - which are connected to the outputs Or the delay chain 33 to 35 - Or the sign-multipller clrcuit~
24,28 and 32. At the same time the output signal of the dlgital subtractor circult 3a 18 fed vla the control input 9 to the second inputs Or the slgn-multipller circults 24,28 and 32. The latter emlt a posltlve output slgnal when slgnals o~ equal polarity occur at their two inputs. Otherwi~e they emit a negative output signal. In the digital adder circuits 23,27 and 31 these output signals are 1. ~ ' I .
added to the contents Or the stores 22,26 and 30. The resultant sum ~lgnals are on the one hand multlplied in the multiplier circuits 21,25 aDd 29 wlth the signals occurring at the tappings Or the delay chain 33 to 35 and on the other hand are fed as new contents into the .
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stores 22,26 and 30. The output ~ignals of the multiplier circuit~
21,25 and 29 are added in the adder circult 20 and emitted at the ;~
output 8.
Usually the stores 22,26 and 30 are not to be loaded.
However, up to a determinate limit value they can be positively or negatively loaded; ror example via a two's complement representation in which, in a specific range, codewords are available both for positive and for negatlve values.
The echo compensator can thus set its coefficients in ~ ~ -optimum fashion after a specific length Or time. However, this is not co when, in the case of speech signals on the receiving path in the frequency range below 300 Hz and above 3400 ~z, no signals occur. As a result coe~ficient sets (contents of the stores 22,26,30) can form ~ ;
which, although they compensate the echo, are considerably greater than necessary. This can also be caused by interference signals.
If on the one hand it iB assumed that, with an unfavourable situation, all stores 22,26 and 30 have a content of a relatively high positive value, then following multiplication in the multiplier ~ ;
circults 21,25 and 29 with a received signal in the delay chain 33 to ~
, , , 35 which is both positive and negative with equal rrequency over a period of time, without a superimpo~ed additional signal and followlng accumulatlon in the adder clrcuit 20, a signal would occur at the output 8 which is positlve or negatlve wlth equal probability, Followlng negatlon in the subtractor clrcuit 3a, a corresponding error gignal will remain at the control lnput 9. Time-averaged correction Or the content~ Or the storea 22,26 and 30 by the ~-''-,' :,.
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sign-multiplication circuits i9 therefore not possible and the contents remain erroneously too positive.
If, howe~er, a negative additional signal is superimposed upon the received signal, then the multiplication wieh the posit~ve contents Or the stores 22,26 and 30 ln the multiplier circuits 21,25 and 29 result ln negative signals which accumulate in the ~adder circult 20 to rorm a negative signal at the output 8. Following subsequent negation in the digital subtractor circult 3a, a ~ .
k~ predomlnantly positive signal occurs at the control input 9. The sign multipller circuits 24,28 and 32 now mainly emit negative Islghals since the received signal, together with the additional signal, is predomlnantly negative. As a result the coerricients and the contents Or the stores 22,26 and 30 are reduced in the desired way in the direction Or zero. A similar procedure~would occur ir a positive additional signal had been superimposed.
In Fig. 3 there is shown an additional signal generator which consists Or a clock signal generator 36, a clock rate divider 37 and a programmable read-only store (PROM) 38. The clock signal is fed ~rom the clock rate divider 37, via ror example ten address lines, to the PROM 38.~The PROM contain3 the amplitude values Or the ~ -sum Or the sine signals Or 7.8 Hz to 101.6 Hz and 3898 Hz to 4000 Hz with a frequency separation Or 7.8125 Hz.~This sum signal corresponds approsimately to a white noise signal with the frequency range-or O
to 100 Hz and 3900 to 4000 Xz. If the amplitude values Or the individual sine slgnals, instead Or the amplitude values Or the sum the individual sine signals are-~tored consecutively in the PROM, a wobble s~gnal with an~appropriate freq~ency range occurs.
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In Fig. 4 there is shown an echo compensator generally -similar to the arrangement in Fig. 1. However, here it has been ;~
possible to dispense with an adder circuit because a dc voltage superimposition i8 directly programmed into the digital expander 39 in the form of a PROM. Because of the additional dc voltage the expander 39 may possibly need to e~pand to 14 bits. -In Flg. 5 there is shown an echo compensator for a trunk line on which analogue signals are transmltted. The arrangement again includes a transmitting path 6 having an input 1 and an output 5, into which an anlogue subtractor circuit 3b i8 interposed. The receiving path 19 commences with an ~nput 17 and ends with an output 18. The shunt arm includes a low-pass filter 40, band-pass rilters 42 and 45, analogue-to-digital converters 43 and 44, a digital-to-analogue converter 41, the transversal filter 7, the digital adder circuit lla and the additional signal generator 15a.
The core of the echo compensator comprising the transversal fllter 7, the digital adder circuit lla and the addltional signal generator 15a, operates ln the same way as the corresponding ~;
arrangement in Fig. 1. In the other portions of the echo compensator ~,~;' shown in Fig. 5, digital signals are obtained via band-pass filters 42,45 and analogue-to-digital converters 43,44 and discharged via the ~
dlgltal-to-analogue converter 41 and the low-pass filter 41 The ~;
~ubtractor circuit 3b ~ust operate in analogue rashion. ~' The arrangement shown in Fig. 6 differs from that shown in Flg. 5 ln that the analogue-to-digital converter 44 and the adder clrcult have been interchanged. The digital adder circuit lla has , , 1332~
been replaced by an analogue adder circult llb. Apart Prom the fact that the addition now takes place in analogue form, the mode of operation i8 identical to that Or the arrangement shown in Fig. 5. ~ -In Fig. 7 there is shown a Purther echo compenEator in~a trunX line for analogue signals. Here, however, conversion of the transmitted signal into digital signals take3 place on the transmitting path. For this purpose the arrangement includes a band-pass filter 46, an analogue-to-digital converter 47~ a digital G subtractor circuit 3a, a digital-to-analogue converter 48 and a low-pass ~ilter 49. Otherwise the echo compensator is similar to and operatea ln the same manner as that shown in Fig. 5.
:, ~ ' ' ' ' ' ~ , .
' ' ' ~,
6 133~9 AN E~HQ COMPENSATQP
This invention relates to an echo compensator in which an adaptive transversal filter hag its input connected to the receiving path and its output to the minus lnput of a subtractor circuit in the transmitting ~ath of a digital or - when analogue-to-digital or digital-to-analogue convertere are used rOr the digital operation Or the adaptive transversal filter - analogue trunk line and where the output of the subtractor circuit is connected to the control input Or .
the adaptive transversal filter.
An echo compensator Or this kind i8 disclosed for examp}e ln German patent specirication OS 20 63 271. Adaptive ~ran~versal filter~ are also described ln the magazine "Prequenz" 28(1974)5, pages 118-122 and 28(1974)6, pages 155 to 161.
In international gateway;exchanges echo compensators are arranged at the interraces between a very long internatlonal trunk line, such as a sea cable link or a satellite link, and a national line which leads into a four-wire/two-wire ~unction in the form of a hybrld Junction and an adJoining two-wire line, the so-called end ~ -~
echo path. ;
If the hybrid ~unctions incompletely separate the outward and return patha, the delay ~time Or the signal gives rise to echoes.
From the transmitting station a speech signal returns in attenuated form to the ~peaker following the delay time across the outward and return paths. On a trunk line the delay time can amount to 300 ms-and on the-end echo path 40 ms. The longer the path of the echo, the more ": '':: :::
~` disturbing the effect.
., :-2 1 3 3 2 ~ 20365-2668 For the generation of an artificial echo, echo compensators were each provided with a transversal filter, the coefficients of which are automatically set up in such a way that all similarity between a received signal and a transmitted signal is eliminated. Thus the transversal filter represented a ~ ;~
simulation of the end echo path. However, it has been proved that ;
the control process was not satisfactory since the coefficients ~ -~
were able to move out of a given range, which is associated with considerable noise development at the transmitting path output.
By way of an improvement in German patent specification OS 26 47 305 there is disclosed an arrangement in which either all the coefficients are added or those coefficients whlch exceed a -threshold are counted. If the sum or counting result exceeds a threshold value, the entire set of coefficients is reset.
It is an aim of the invention to provide an improved echo compensator.
According to this invention there is provided an echo compensator comprising a transmitting path and a receiving path, said receivlng path havlng æignal4 thereon lying ln a given useful frequency range;
a subtractor including a positive input and an output ;
connected in said transmitting path, and a negative input;
' an adaptive transversal filter means for setting coefficients including a first input, an output connected to said negative input of said subtractor, and a control input connected to said output of said subtractor;
an adder including an inpu~ connected to said receiving path, a control input and an output connected to said first input of ,~
1332~ ~9 2a 20365-2668 said adaptive transversal filter means; and an auxiliary signal generator means connected to said control input of said adder for providing an auxiliary signal to be added to signals derived from the receiving path which has a constant voltage or a frequency which lies outside said given useful frequency range so that operation of the transversal filter means is improved through a change of a setting of coefficients.
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"''''",:
I' I '',',' ,", ~',.
' .'.`, '`'~ ':
; r~
.,'''~ ~ ~
c ~ :
1 3 3 2 ~
Advantageously the additional signal generator may comprise a dc voltage generator, a wobble generator or a noise generator. The two latter are provided ~or a userul frequency range of h 300 to 3400 Hz and in particular with frequency ranges of O to 100 Hz and 3.9 to 4 kHz. If the additional signal iB to be further processed in digital form, analogue-to-digital conversion must be carried out.
The invention is based on the recognition that the regulating procedure in the transversal filter can only be performed ~ . .
for rrequencies which are actually contained in the received signal.
Therefore in the absence Or frequencies coefficient sets can be formed (or, where these have been altered as a result of disturbances, are not restored)and, although they compensate the echo, they are considerably greater than is necessary. This involves the disadvantages that the modulation capabillty is reduced and, ln the case of ~tepped control in which the step size is dependent upon the size Or the coefricient, excessively large steps result.
It iB advantageous that the noise generator should comprise a clock signal generator, a clock rate divider and a programmable read only store ~PROM), where the clock rate divider switches over the addresses Or the programmable read only store at a fixed clock rate. -An echo compensator for the compensation of compressed digital signals on the trunk line can advantageously be constructed in that the subtractor circuit 18 provided as a digital subtractor circuit preceded by a first digital expander and followed by a digital compressor, and the adder circuit i8 provided as a digital ' .
' . -4-1 3 3 ~
adder circuit having its fir~t input preceded by a ~econd digital e~pander. The dlgital adder circuit and the second second digital expander can be replaced by a third digital e~pander which is to add a dc voltage. The compressor and the expanders can comprise programmable read only stores (PROM).
An echo compensator for analogue signals on the trunk line can be advantageously constructed in that the output of the adaptive transversa5 filter i8 rollowed by a digital-to-analogue converter and a rirst low-pass fllter, the control input Or the adaptire transversal filter is preceded by a first band-pass filter and an analogue-to-dlgital converter and the adder circuit is a digital adder circuit preceded by a band-pass filter and a further analogue-to-digital converter. The digital adder circuit can be replaced by an analogue adder circuit and the analogue adder circuit -and the further analogue-to-digital converter can be interchanged. ; , Analogue signals can be compensated by arranging the subtractor circuit is a digital subtractor circuit preceded by a band-pass filter and an analogue-to-digital converter and is followed by a digital-to-analogue converter and a low-pass filter, and the ;~;~
adder circuit is a digital adder circuit preceded by a further band-pass filter and~a further analogue-to-digltal converter.
mbodiments of this inventlon will now be described, by way ;~
:
o~ example, with reference to the accompanying drawings in which~
Fig. 1 is a blocX clrcuit dlagram of a first form of echo compensator embodying the invention and for use with compressed digital signals;
1332L~9 Flg. 2 i8 a block circuit diagram Or a known adaptive transversal filter used in the echo compensator shown in Fig. l;
Pig. 3 iB a block circuit diagram Or a nolse generator or wobble generator;
Fig. 4 is a block circuit diagram of a second form of echo compensator embodying the invention and for use with compressed digital signals;
Pig. 5 18 a block circuit diagram of a third form o~ echo compensator embodying the invention but for use with analogue signals;
Pig. 6 is a block circuit dlagram of a fourth form of echo compensator embodying the invention but for use with analogue signals; and Fig. 7 is a block circuit diagram Or a fifth ~orm of echo comgensator embodying the invention but for use with analogue signals.
In Fig. 1 there is shown an echo compensator embodYing the invention and connécted to a trunk line via which compressed digital signals are transmitted. The arrangement includes a transmitting path 6, with input 1 and output 5, and a receiving path 19, with input 17 and output 18. Inserted into the transmitting path 6 i~ a digital espander 2, a digital subtractor circuit 3a and a digital compressor I . ~ I .
4. A shunt arm contains an adaptive transversal filter 7 with input 10, control input 9 and output 8, a digital adder circuit lla with a rlrst lnput 13 and a second input 14, a digital espander 16 and an additional signal generator 15a for generating digital ~ignals. The ,. ~
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O -6- ~ 332~
companding 18 carried out between 8 bits and 13 bits. The compressors and expanders can comprise programmable read only stores (PROM).
A Compressed digital signal incoming in the receiving path 19, which correspondg to an analogue signal in the frequency range rrom 300 to 3400 ~z, iE espanded in-the digital expander 16 in order to cancel the compression and in the digital adder circuit lla is added to an additional signal supplied by the additional signal generator 15a. The sum is fed to the lnput 10 Or the adaptive ~ ~
transversal rilter 7. At its control input 9, the transversal rilter ~ ,;
7 simultaneously receives an error signal emanating ~rom the digital subtractor circuit 3a. Its coerficients are automatically set such ~;
that the signal generated at ita output 8 becomes as similar as possible to the signal occurring at the transmitting path input l. In this case the dirrerence between the two signals ~ormed by the : . .
digital subtractor circuit 3a becomes a minimum.
The additional signal is either a dc voltage or a wobble ~signal or noise signal in the rrequency range from O to 100 Hz and 3900 to 4000 Hz, which are in each case converted into a digital signal. These ~requency ranges are surficiently spaced from the userul signal ~requency range (300 to 3400 Hz). As a dc voltage or signals with such~a frequency do not occur at the input 1 Or the tran~mitting path 6, the adaptive transversal filter 7 will automatically set its coefficient oet in such manner that said signals also disappear at the output 5 of the tran~mitting path 6. In this way the described disadvantage~ o~ known echo compensators are avoided.
In Flg. 2 there is ~hown an adaptive transversal filter 7. -It contains an adder circuit 20 and in each case three hundred and twenty multiplier circuits 21,25 and 29, stores 22,26 and 30, adder circuits 23,27 and 31, sign-multiplier circuits (correlators) 24,28 and 32 and delay elements 33,34 and 35. The 13-bit codewords at the inputs 9 and 10 are processed in parallel at the 8-kH~-clock rate. In the codewords occurring at the input 10, because Or the additionally superimposed noise-wobble-or dc voltage, 14 bits are pos~ible. Less than 13 bits may occur at the input 9; possibly only one sign-bit.
The simple sine correlation can also be replaced by a more complicated circuit in which the step ~ize iB dependent upon various parameters ~uch as reception level, transmission level, coerficient size etc.
The signal occurring at the input 10 is fed with a staggered delay Or 125~8 to the rirst inputs - which are connected to the outputs Or the delay chain 33 to 35 - Or the sign-multipller clrcuit~
24,28 and 32. At the same time the output signal of the dlgital subtractor circult 3a 18 fed vla the control input 9 to the second inputs Or the slgn-multipller circults 24,28 and 32. The latter emlt a posltlve output slgnal when slgnals o~ equal polarity occur at their two inputs. Otherwi~e they emit a negative output signal. In the digital adder circuits 23,27 and 31 these output signals are 1. ~ ' I .
added to the contents Or the stores 22,26 and 30. The resultant sum ~lgnals are on the one hand multlplied in the multiplier circuits 21,25 aDd 29 wlth the signals occurring at the tappings Or the delay chain 33 to 35 and on the other hand are fed as new contents into the .
... . .
.~ f'`
r -8- ~ :
1 3 3 ~
stores 22,26 and 30. The output ~ignals of the multiplier circuit~
21,25 and 29 are added in the adder circult 20 and emitted at the ;~
output 8.
Usually the stores 22,26 and 30 are not to be loaded.
However, up to a determinate limit value they can be positively or negatively loaded; ror example via a two's complement representation in which, in a specific range, codewords are available both for positive and for negatlve values.
The echo compensator can thus set its coefficients in ~ ~ -optimum fashion after a specific length Or time. However, this is not co when, in the case of speech signals on the receiving path in the frequency range below 300 Hz and above 3400 ~z, no signals occur. As a result coe~ficient sets (contents of the stores 22,26,30) can form ~ ;
which, although they compensate the echo, are considerably greater than necessary. This can also be caused by interference signals.
If on the one hand it iB assumed that, with an unfavourable situation, all stores 22,26 and 30 have a content of a relatively high positive value, then following multiplication in the multiplier ~ ;
circults 21,25 and 29 with a received signal in the delay chain 33 to ~
, , , 35 which is both positive and negative with equal rrequency over a period of time, without a superimpo~ed additional signal and followlng accumulatlon in the adder clrcuit 20, a signal would occur at the output 8 which is positlve or negatlve wlth equal probability, Followlng negatlon in the subtractor clrcuit 3a, a corresponding error gignal will remain at the control lnput 9. Time-averaged correction Or the content~ Or the storea 22,26 and 30 by the ~-''-,' :,.
~,, .,: .
' `
~'`
~332~4~
sign-multiplication circuits i9 therefore not possible and the contents remain erroneously too positive.
If, howe~er, a negative additional signal is superimposed upon the received signal, then the multiplication wieh the posit~ve contents Or the stores 22,26 and 30 ln the multiplier circuits 21,25 and 29 result ln negative signals which accumulate in the ~adder circult 20 to rorm a negative signal at the output 8. Following subsequent negation in the digital subtractor circult 3a, a ~ .
k~ predomlnantly positive signal occurs at the control input 9. The sign multipller circuits 24,28 and 32 now mainly emit negative Islghals since the received signal, together with the additional signal, is predomlnantly negative. As a result the coerricients and the contents Or the stores 22,26 and 30 are reduced in the desired way in the direction Or zero. A similar procedure~would occur ir a positive additional signal had been superimposed.
In Fig. 3 there is shown an additional signal generator which consists Or a clock signal generator 36, a clock rate divider 37 and a programmable read-only store (PROM) 38. The clock signal is fed ~rom the clock rate divider 37, via ror example ten address lines, to the PROM 38.~The PROM contain3 the amplitude values Or the ~ -sum Or the sine signals Or 7.8 Hz to 101.6 Hz and 3898 Hz to 4000 Hz with a frequency separation Or 7.8125 Hz.~This sum signal corresponds approsimately to a white noise signal with the frequency range-or O
to 100 Hz and 3900 to 4000 Xz. If the amplitude values Or the individual sine slgnals, instead Or the amplitude values Or the sum the individual sine signals are-~tored consecutively in the PROM, a wobble s~gnal with an~appropriate freq~ency range occurs.
':
~ .
- 1332~
In Fig. 4 there is shown an echo compensator generally -similar to the arrangement in Fig. 1. However, here it has been ;~
possible to dispense with an adder circuit because a dc voltage superimposition i8 directly programmed into the digital expander 39 in the form of a PROM. Because of the additional dc voltage the expander 39 may possibly need to e~pand to 14 bits. -In Flg. 5 there is shown an echo compensator for a trunk line on which analogue signals are transmltted. The arrangement again includes a transmitting path 6 having an input 1 and an output 5, into which an anlogue subtractor circuit 3b i8 interposed. The receiving path 19 commences with an ~nput 17 and ends with an output 18. The shunt arm includes a low-pass filter 40, band-pass rilters 42 and 45, analogue-to-digital converters 43 and 44, a digital-to-analogue converter 41, the transversal filter 7, the digital adder circuit lla and the additional signal generator 15a.
The core of the echo compensator comprising the transversal fllter 7, the digital adder circuit lla and the addltional signal generator 15a, operates ln the same way as the corresponding ~;
arrangement in Fig. 1. In the other portions of the echo compensator ~,~;' shown in Fig. 5, digital signals are obtained via band-pass filters 42,45 and analogue-to-digital converters 43,44 and discharged via the ~
dlgltal-to-analogue converter 41 and the low-pass filter 41 The ~;
~ubtractor circuit 3b ~ust operate in analogue rashion. ~' The arrangement shown in Fig. 6 differs from that shown in Flg. 5 ln that the analogue-to-digital converter 44 and the adder clrcult have been interchanged. The digital adder circuit lla has , , 1332~
been replaced by an analogue adder circult llb. Apart Prom the fact that the addition now takes place in analogue form, the mode of operation i8 identical to that Or the arrangement shown in Fig. 5. ~ -In Fig. 7 there is shown a Purther echo compenEator in~a trunX line for analogue signals. Here, however, conversion of the transmitted signal into digital signals take3 place on the transmitting path. For this purpose the arrangement includes a band-pass filter 46, an analogue-to-digital converter 47~ a digital G subtractor circuit 3a, a digital-to-analogue converter 48 and a low-pass ~ilter 49. Otherwise the echo compensator is similar to and operatea ln the same manner as that shown in Fig. 5.
:, ~ ' ' ' ' ' ~ , .
' ' ' ~,
Claims (12)
1. An echo compensator comprising a transmitting path and a receiving path, said receiving path having signals thereon lying in a given useful frequency range;
a subtractor including a positive input and an output connected in said transmitting path, and a negative input;
an adaptive transversal filter means for setting coefficients including a first input, an output connected to said negative input of said subtractor, and a control input connected to said output of said subtractor;
an adder including an input connected to said receiving path, a control input and an output connected to said first input of said adaptive transversal filter means; and an auxiliary signal generator means connected to said control input of said adder for providing an auxiliary signal to be added to signals derived from the receiving path which has a constant voltage or a frequency which lies outside said given useful frequency range so that operation of the transversal filter means is improved through a change of a setting of coefficients.
a subtractor including a positive input and an output connected in said transmitting path, and a negative input;
an adaptive transversal filter means for setting coefficients including a first input, an output connected to said negative input of said subtractor, and a control input connected to said output of said subtractor;
an adder including an input connected to said receiving path, a control input and an output connected to said first input of said adaptive transversal filter means; and an auxiliary signal generator means connected to said control input of said adder for providing an auxiliary signal to be added to signals derived from the receiving path which has a constant voltage or a frequency which lies outside said given useful frequency range so that operation of the transversal filter means is improved through a change of a setting of coefficients.
2. An echo compensator as claimed in claim 1, wherein said auxiliary signal generator means comprises a constant voltage generator.
3. An echo compensator as claimed in claim 1, wherein the auxiliary signal generator means comprises a wobble generator with frequency ranges outside the predetermined transmission range of the trunk line.
4. An echo compensator as claimed in claim 1, wherein the auxiliary signal generator means comprises a noise generator with frequency ranges outside the predetermined transmission range of the trunk line.
5. An echo compensator as claimed in claim 3 or claim 4, wherein the auxiliary signal generator means provide frequency ranges of 0 to 100 Hz and 3.9 to 4 kHz.
6. An echo compensator as claimed in claim 4 wherein the noise generator comprises a clock signal generator, a clock rate divider and a PROM, and the clock rate divider is arranged to switch the addresses of the PROM at a fixed clock rate.
7. An echo compensator as claimed in claim 1, wherein the auxiliary signal generator means generates digital auxiliary signals.
8. An echo compensator as claimed in claim 1, wherein for processing compressed digital signals on the trunk line, the subtractor circuit is provided as a digital subtractor circuit preceded by a first digital expander and followed by a digital compressor, and the adder circuit is provided as a digital adder circuit having its first input preceded by a second digital expander.
13a
13a
9. An echo compensator as claimed in claim 8, wherein in place of the digital adder circuit and the second digital expander, a third digital expander is provided which adds a dc voltage to the received signal.
10. An echo compensator as claimed in claim 1 wherein for processing analogue signals on the trunk line, the output of the adaptive transversal filter is followed by a digital-to-analogue converter and a first low-pass filter, the control input of the adaptive transversal filter is preceded by a first band-pass filter and an analogue-to-digital converter and the adder circuit is a digital adder circuit preceded by a band-pass filter and a further analogue-to-digital converter.
11. An echo compensator as claimed in claim 1, wherein for processing analogue signals on the trunk line, the subtractor circuit is a digital subtractor circuit preceded by a band-pass filter and an analogue-to-digital converter and is followed by a digital-to-analogue converter and a low-pass filter, and the adder circuit is a digital adder circuit preceded by a further band-pass filter and a further analogue-to-digital converter.
12. An echo compensator as claimed in claim 10 or claim 11, wherein the digital adder circuit is replaced by an analogue adder circuit and the analogue adder circuit and the further analogue-to-digital converter are interchanged.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3602803 | 1986-01-30 | ||
| DEP3602803.7 | 1986-01-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1332449C true CA1332449C (en) | 1994-10-11 |
Family
ID=6292977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000528336A Expired - Fee Related CA1332449C (en) | 1986-01-30 | 1987-01-28 | Echo compensator |
Country Status (8)
| Country | Link |
|---|---|
| EP (1) | EP0231854B1 (en) |
| JP (1) | JPH06101668B2 (en) |
| AT (1) | ATE62365T1 (en) |
| AU (1) | AU574282B2 (en) |
| CA (1) | CA1332449C (en) |
| DE (1) | DE3768975D1 (en) |
| ES (1) | ES2021285B3 (en) |
| GR (1) | GR3001866T3 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3874997T2 (en) * | 1987-07-20 | 1993-03-25 | Nippon Electric Co | Echo compensator. |
| DE3875028D1 (en) * | 1987-07-29 | 1992-11-05 | Siemens Ag | Echo compensator. |
| AT391784B (en) * | 1987-11-25 | 1990-11-26 | Siemens Ag Oesterreich | METHOD FOR ADAPTIVELY COMPENSATING AN ECHO IN A COMMUNICATION DEVICE |
| DE4202206C2 (en) * | 1992-01-28 | 1998-06-10 | Bosch Gmbh Robert | Analog / digital compensator with level control for a hybrid circuit |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2496364A1 (en) * | 1980-12-17 | 1982-06-18 | Trt Telecom Radio Electr | ECHO CANCELLATOR FOR DIGITAL TELEPHONE TRANSMISSION IMPLEMENTING A PSEUDO-LOGARITHMIC ENCODING LAW |
| FR2556530B1 (en) * | 1983-10-28 | 1986-04-04 | Telediffusion Fse | ECHO CORRECTION DEVICE, ESPECIALLY FOR A DATA BROADCASTING SYSTEM |
| FR2569322B1 (en) * | 1984-08-17 | 1986-12-05 | Trt Telecom Radio Electr | ECHO CANCELER USING DELTA MODULATION |
| GB2164827B (en) * | 1984-09-19 | 1988-04-20 | Nec Corp | Method of cancelling echoes in full-duplex data transmission system |
| AU4695485A (en) * | 1984-09-21 | 1986-03-27 | Alcatel N.V. | Digital hybrid |
-
1987
- 1987-01-27 EP EP87101065A patent/EP0231854B1/en not_active Expired - Lifetime
- 1987-01-27 ES ES87101065T patent/ES2021285B3/en not_active Expired - Lifetime
- 1987-01-27 AT AT87101065T patent/ATE62365T1/en not_active IP Right Cessation
- 1987-01-27 DE DE8787101065T patent/DE3768975D1/en not_active Expired - Fee Related
- 1987-01-28 CA CA000528336A patent/CA1332449C/en not_active Expired - Fee Related
- 1987-01-29 AU AU68095/87A patent/AU574282B2/en not_active Ceased
- 1987-01-30 JP JP62018803A patent/JPH06101668B2/en not_active Expired - Lifetime
-
1991
- 1991-04-26 GR GR90401175T patent/GR3001866T3/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| ES2021285B3 (en) | 1991-11-01 |
| GR3001866T3 (en) | 1992-11-23 |
| EP0231854B1 (en) | 1991-04-03 |
| JPH06101668B2 (en) | 1994-12-12 |
| AU6809587A (en) | 1987-08-13 |
| EP0231854A1 (en) | 1987-08-12 |
| ATE62365T1 (en) | 1991-04-15 |
| AU574282B2 (en) | 1988-06-30 |
| DE3768975D1 (en) | 1991-05-08 |
| JPS62183230A (en) | 1987-08-11 |
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