CA1323689C - Apparatus for combining video signals - Google Patents

Abstract

Abstract A processing circuit for receiving a shaped video signal V3' and an associated key signal K3 and providing output signals in response thereto. The processing circuit has at least a first mode of operation and includes a first system operative in the first mode of the processing circuit to generate an output video signal V3" given by V3" = V3' + A, where A is independent of V3'. The circuit also includes a second system operative in the first mode to generate an output key signal having a constant value.

Description

APPARATUS FOR COMBINING VIDEO SIGNALS

This is a division of copending Canadian Patent Application Serial No. 529,089 which was filed on February 5, 1987.
This invention relates to apparatus for combining video signals.
A background discussion of apparatus for combining video signals will be discussed in conjunction with the drawings.

Summary of the Invention In a preferred embodiment of the invention, first and second shaped video signals V1' and V2' are combined in accordance with associated first and second key signals K1 and R~ and a priority signal P12, by generating a third shaped video signal V3' which is given by V3~ = V1'tl - K2(1 ~ P12)] + V2 (1 1 12) and third key signal K3 which is given by K3 1 - (1 - K1)(1 - K2).
The value of the priority signal P12 determines the relative weighting given to the key signals K
and K2 in forming the third video signal V3', and this in turn determines whether the scenes represented by the component signals V1 and V2 are perceived in the composite picture as representing foreground objects or background objects. The priority signal P1z may be varied over several frames of the video signals, so that the background objects appear to pass through the foreground objects and become foreground objects themselves. In a split-screen effect, by having a change in the value of the priority signal P12 occur at the split, objects that appear to be in the foreground on one side of . ~ , , -' .
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the composite image can be made to appear in the background on the other side of the composite image, and vice-versa.
In accordance with one aspect of the invention there is provided a processing circuit for receiving a shaped video signal V3 ~ and an associated key signal K3 and providing output signals in response thereto, said processing circuit having at least a first mode of operation and comprising first means operative in the first mode of the processing circuit to generate an output video signal V31' given by V3" = V3' + A
where A is independent of V3', and second means operative in the first mode to generate an output key signal having a constant value.
It will be appreciated that in the context of the present invention, references to component video signals are intended to relate to signals that represent different scenes, and that references to a composite video signal are intended to relate to a signal that represents a scene formed by combining two or more scenes, as represented by respective component video signals.

Brief Description of the Drawings For a better understanding of the invention taken in conjunction with the invention disclosed in copending Canadian Patent Serial No. 529,089 filed on February 5, ~987, and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying drawings in which:
Fig. 1 shows waveforms to illustrate combining of video signals, .
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Fig. 2 is a block diagram of a combiner cell for combining first and second component video signals, Fig. 3 is a block diagram of a combiner system comprising several combiner cells connected in a cascade arrangement, and Fig. 4 is a block diagram of an output processor for a combiner cell.
In a video mixer, two video signals V1 and V2 (Fig. l) are multiplied by a key signal K1 (having a range of values from 0 to l) and its complement (l - K1) respectively, and the two signals V1K~ and V2(l - K1) are additively combined in a summer to produce a composite output signal Vq having the form V1K~ + V2(l - K1). When the key signal K1 is zero, the input signal V1 makes no contribution to the signal Vq/ regardless of the value of V1. Similarly, if K1 is one, the signal V2 makes no contribution to the signal Vq. The proportion of the signal Vq that is contributed by V1 determines the opacity with which the scene represented by the signal V1 is perceived in the composite picture. If K1 is one, i.e., V1 represents 100% of the signal Vq, then the V1 scene (the scene represented by the signal V1) completely obscures the V2 scene, regardless of the value of V2 As K1 decreases, the extent to which the V2 scene is obscured in the composite picture is reduced until, when K1 reaches zero, the V2 scene is opaque and completely obscures the V1 scene. Thus, the coefficients K1 and (l - K1) determine the relative opacity of the two component scenes: if the coefficient K1 is greater than (l - K1), then the V1 scene at least partially obscures the V2 scene and appears, to a viewer of the composite scene, to be in front of the V2 scene.

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The multiplication of the signals V~ and V2 by the key signal X~ and its complemen~ K~) is shown in Fig. l, in which it is assumed that all signals have five discrete values in the range from zero to unity and have sharp transitions between levels. It will, of course, be appreciated that Fig. l is in fact very much simplified, and that in the case of analog signals the range of possible values is continuous, and that transitions for either analog or digital signals would have a finite slew rate.
A video signal V1' is said to be a "shaped" video signal when it is the multiplication product of an unshaped video signal V1 and an associated key signal K1. In general, there is no necessary relationship between the video signal and its associated key signal. A production switcher normally receives unshaped video signals and their associated key signals and provides a full screen video signal at its output.
No key output is produced.
Shaping has two aspects, namely spatial or X-Y shaping (only the X-dimension is shown in Fig.l), which determines the area of the composite picture to which the component signal makes a contribution (when K1 = , the signal V1 makes no contribution to the signal Vq)/ and opacity or Z shaping, which determines, for K~ greater than zero, the magnitude of the contribution that is made by the component signal to the composite signal Vq. The shaping of the component signals is discussed in terms of "coverage" in Porter, T. and Duff, T., i "Compositing Digital Images", Computer Graphics, Vol. 18, No. 3 (1984), pages 253 to 259.
The foregoing discussion of the manner of production of the signal Vq is based on the assumption that the signal Vz is a full field signal, i.e. that the key signal Kz associated with the video signal V2 is one for all locations. In the general case, Kz is not one for all locations and Vq = V1K~ + V2Kz(l - K1) It will be seen from this more general expression that the video signal Vq, being the weighted sum of the two shaped video signals V1~1 and VzKz, is itself a shaped video signal. For the ., . . ~

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sake of consistency in notation, the shaped signal that has previously bee~ designated vq will hereafter be designated vq~, and vq will hereafter be used to designate the corresponding u~shaped signal.
The key signal vq that relates vq~ to vq is given by Kq = l ~ K~ K2) If, for every location, either X1 or K2 is one, then Kq = 1 for all locations. In particular, if either v~ or vz is a full field signal, the signal Vq' is a full field signal. If, on the other hand, Vq' is not a full field signal it might be desired to form a composite scene from the scenes represented by the signal Vq~ and, e.g., background scene represented by a signal Vr having an associated key signal Kr. In such a case, the signal (l - Kq) would be used to process the signal V, in a production switcher, and an output signal Vs~ = Vq' + VrKr(l -Kq) would be produced. Generally, Vr would be a full field signal and so Kr = l and Vs~= Vq/ + Vr(l - Kq).
Recalling that Vq' = V1K~ + V2K2(l - K1), if K1 = l, then Vq' = V1, i.e. the signal V2 makes no contribution to the signal Vq', regardless of the value of R~. Therefore, combining of the video signals V1 and V2 is under the primary control of the key signal X1. Similarly, if the signal Vq' were equal to V1K1(l - K2) + V2K2, the combining would be under the primary control of the signal K2, and if K2 = l, then Vq' = Vz and V1 makes no contribution regardless of the value of K1. The two different situations are equivalent respectively to the V1 scene and the V2 scene being in the foreground of the composite scene. However, the conventional mixer does not allow the operator to control on a dynamic basis whether the mixing operation is under the primary control of the signal K1 or of the signal K2.
The combiner cell shown in Fig. 2 comprises multipliers 4, 6, 8, lO and 12, complement circuits 14, 16, 18, 20, 22 and 24, and a summer 26. The illustrated combiner cell operates in the digital domain with parallel data, and therefore all the .~ .

signal lines that are illustrated would in fact be multiple conduc~or lines. Additional circuitry would be required to assure proper timing relation-ships among the various signals, but such matters are well within the skill of the art and therefore are not shown and will not be further described.
The input signa1s of the combiner cell com-prise two shaped video signals Vl' and V2', asso-ciated key signals Kl and K2, and a priority signal P12. The levels of the key signals Kl and K2 and the level of the priority signal P12 are normalized to have maximum and minimum values that can be represented numerically as 1 and 0. Also, the video signals Vl' and V2' have the same maximum and minimum values. Additional multiplier~ 2 and 3 are provided upstream of the combiner for generating the shaped video signals Vl' and V2' from unshaped video signals Vl and V2 and the associated key signals Kl and K2. The combiner cell provides a shaped output video signal V3' and an output key signal K3. It can readily be seen that the output video ~ignal is given by the equation V3' = Vl'~l - K2(1 - P12)] + V2 (1 KlP12) and that the output key signal is given by K3 = 1 - ~1 - Kl) (1 - K2)-The value of P12 determines the weighting factors that are applied to the two video signals Vl' and V2'. If P12 is equal to zero, this implies that the V2 scene is in the foreqround of the composite scene and that the Vl scene is in the background, and vice versa if P12 i8 equal to one.
For P12=0, then v3~=vl'(l-K2)~V2 The value of K2 defines areas in which the V2 ~cene contributes to the composite scene. If K2=1, . :~ , the contribution of Vl to the compoRite scene is zero and therefore the V2 scene completely ob~cures the Vl scene. If K2=0, V2'=0 and therefore there is no contribution from V2 and Vl is allowed to pass to V3' unaltered For P12=1, then V3'=V2'(1-Kl)+
The value of Kl defines areas in which the V
scene contributes to the composite scene. If Kl=l, the contribution of V2 to the composite scene is zero and therefore the Vl scene completely obscures the V2 scene. If Kl=0, there is no contribution from Vl and V2 is allowed to pass to V3' unaltered.
For P12=0.5, then V3'=Vl'(1-~2/2)+V2 ~1-Kl/2) Where K2=0, Vl' is passed unaltered; where Kl=0, V2' is passed unaltered; and where K2 >
and Kl > 0, the relative opacities of the Vl and V2 scenes are determined by the ratio of ~1 and K2.
As P12 increases from zero the relative depths of the Vl and V2 pixels in the composite image change, from the V2 pixel appearing in front of the Vl pixel, through the two pixels appearing to be at the same depth (at P12=0.5), to the Vl pixel ap-pearing in front of the V2 pixel. It will there-fore be seen that the priority signal P12 makes it possible to determine which of the component scenes will appear as the foreground scene in the com-posite picture. 9y changing the value of P12, the composite picture can be changed so that a compo-nent scene is the foreground scene at one time and is the background scene at another time.
Several combiner cells 30, 40 . . . 90 of the kind shown in FIG. 2 may be connected in cascade, as shown in FIG. 3, to form a combiner system.

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Output processorQ 32, 42 . . . 92 are associated with the combiner cells respectively, for a reason which will be explained below. The output signals from the output processors are connected to a pro-duction switcher.
Conventional production switchers are designed to receive unshaped video signals and their asso-ciated key signals, and multiply the video signals by their key signals to produce shaped video sig-nals that are combined with other 6haped videosignals, e.g., a signal generated by a digital video effects unit, to produce a final program video signal representing the desired composite picture. The output video signals provided by the combiner cells are already shaped by their respec-tive key signals. If the signal V3', for example, is applied to a conventional production switcher it will be shaped a second time, and the result will be a black halo in the scene represented by the signal V3' for values of K3 greater than zero and less than unity. The output processors are inter-posed between the combiner cells and the production switcher in order to generate unshaped video sig-nals from the shaped video signals generated by the combiner cells.
FIG. 4 showc the output processor associated with the combiner cell 30. The other output pro-ce3sors are identical. A~ shown in FIG. 4, the output processor 32 receives the shaped video sig-nal V3' and the key signal K3 from the associated combines cell 30, and also receives a video matte signal M3. The signal M3 repre~ents a background for the V3 scene. The background may be, for example, a plain, solid color. The output proces-sor comprises a summer 102, a multiplier 104, a ,~ ' , . . ,,: :

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divider 106 (implemented as a reciprocal look-up table 108 and a multiplier 110) and a comple~ent circuit 112. In addition, the proces~or comprises a switch 114 for selecting one of two operating modes for the processor. The processor provides a composite output video signal V3" and a compo~ite output key signal K3', which are applied as input signals to the production switcher.
In the first ~ode of operation of the proces-sor (background on), the signal V3" i~ given by V3" = V3 + M3(1 - K3)-Thus, for any pixel for which ~3 is zero, V3' = 0 and V3~ = M3. If K3 is not zero, indicating that V3' is non-zero, the relative contribution of V3' t~ V3" depends on the value of K3, and it can be seen that for K3 = 1, M3 ic not permitted to ma~e a contribution and V3" = V3'. The output key signal K3' is set to unity for the entire frame in order to inhibit the production switcher from attempting to add another background.
In the second mode of operation (background off), the output key signal K3' is equal to K3, and the production switcher will then add background to pixels for which K3' is not 1.0 in proportion to the value of (1 - K3). The production switcher will multiply V3" by K3'. Since K3' i8 equal to K3, it is desired for the reason indicated above that V3" not be equal to V3'. Therefore, in the second mode the output signal V3' from the summer 102 is divided by the Xey signal K3, so that V3" = V3 /K3-Therefore, the signal V3" is equal to V3 (which does not actually exist), and the switcher may multiply the signal V3" by K3' (which is equal to K3) and produce the desired signal V3' at the ~` 10 ; ~,J~

switcher output. For pixeLs at which K3 i~ close to zero, V3" is indeterminate, but this is not important to the final program video signal because these pixels make no contribution to that signal.
S It will be appreciated that the invention is not restricted to the particular apparatus that has been described and illustrated, and that variations may be made therein without departing from the scope of the invention as defined in the appended claims, and equivalents thereof. For example, instead of using interdependent processing circuits for generating, from Kl, K2 and P12, the multipli-cation factors for the video signals Vl and V2, these multiplication factors may be generated inde-pendently, as mix constants that are separatelyapplied to the multipliers of a signal mixer that i8 of otherwise conventional form. It is not nec-es~ary that each combiner cell of the system shown in FIG. 3 should have its own output processor, since if the output is always to be taken from the same combiner cell, it is necessary only that an output processor be associated with that combiner cell. In a preferred implementation of the inven-tion, the key and video output signals of the last combiner cell in the cascade are connected as in-puts to the first co~biner cell, so as to e~tablish a closed ring. This provides additional flexibili-ty, in that the ring can be logically broken at any point, allowing additional priority combinations.
For example, in the arrangement shown in FIG. 3 the signal V4' can only be combined with the composite signal Vl'/V2', and the component signal Vg' can only be combined with the composite signal Vl'/ . . /~8'- The scene represented by the signal Vg' cannot be made to appear behind the V

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scene but in front of the V4 scene. However, if the switches 94 are operated so that the output signals V~" and Kg' are applied to the combiner cell 30 in lieu of the input signals V2' and K2, and P12 and P34 are set to unity, the desired composite signal would be provided at the output of the output processor 42 (V5", K5'). The key signal K8 must be forced to zero inside the combiner cell 90 .
It will also be appreciated that al~hough the preferred embodiment of the invention, de~cribed above with reference to the drawings, is implement-ed using parallel digital data, it could also be implemented using serial digital data or analog data.

Claims

1. A processing circuit for receiving a shaped video signal V3' and an associated key signal K3 and providing output signals in response thereto, said processing circuit having at least a first mode of operation and comprising first means operative in the first mode of the processing circuit to generate an output video signal V3" given by V3" = V3' + A
where A is independent of V3', and second means operative in the first mode to generate an output key signal having a constant value.
2. A processing circuit according to claim 1, having a second mode of operation, and wherein the first means are operative in the second mode to generate an output video signal V3" given by V3" = C V3' / K3 where C is a constant, and the second means are operative in the second mode to generate an output key signal that is directly proportional to the key signal K3.
3. A processing circuit according to claim 1, wherein the output processor has an input terminal for receiving a matte signal M3 and is operative in the first mode to generate an output video signal V3" given by V3" = V3' + M3(1 - K3).