CA1312148C - Metal-semiconductor field-effect transistor formed in silicon carbide - Google Patents

Abstract

METAL-SEMICONDUCTOR FIELD-EFFECT
TRANSISTOR FORMED IN SILICON CARBIDE
Abstract The invention comprises a metal-semiconductor field-effect transistor (MESFET) formed upon silicon carbide. The transistor exhibits MESFET properties at temperatures of at least 600 K.

Description

1 3 ~ 8 METAL-SEMICONDUCTOR FIELD-EFFECT
TRANSISTOR FORMED IN SILICON CARBIDE

Field of the Invention The present invention relates to metal-semiconductor field-effect transistors (MESFETs), and in particular to such transistors formed in silicon carbide.
Back~round of_the Invention The growth and use of semiconductor devices for electrical applications has resulted in a number of different devices which have particular application in the creation of circuits and electrical components. One type of device is known as a metal-semiconductor field-effect transistor or "MESFET".
A field-effect transistor differs somewhat from a junction transistor. Bipolar junction transistors, which historically were the first developed, are formed when two p-n junctions are placed in close proximity with one another and share a small portion of the semiconductor material known as the base. A bipolar junction transistor controls the flow of current from a portion of semiconductor material adjacent one of the junctions (the emitter) through the base and then to and out from the semiconductor portion adiacent ~he other junction (the collector) by controlling the applied current on the base.

A field-effect transistor works on a somewhat different prinoipal. Typically, current enters a field-effect transistor through a region of semiconductor material known as the source, and exits the transistor from another region of semiconductor material known as the drain. The source and drain are separated from each other by yet another region of semiconductor material which is known as the gate. When an appropriate voltage o~ either positive or negative bias (depending upon the type of transistor) is applied to the active region through the gate, current between the source and drain can be controlled. One example of such a device which is somewhat different from the devices 1~ of the present invention is the metal-oxide-semiconductor ~ield-effect transistor or "MOSFET".
A MESFET obtains its junction behavior by relying on the junction of a metal to a semiconductor (giving the device its common name) rather than on a junction between p and n-type semiconductor materials. This structure gives the same effect as a p-n junction but without the limitations of the p-n junction. Such junctions of a metal and a semiconductor are also variously referred to as a: "Schottky diode", "Schottky barrier diode", "surface barrier diode", "metal-semiconductor diode", or "hot carrier diode". The Schottky diode consists of a rectifying metal-semiconductor junction in which majority carriers (electrons or holes) carry the current flow.
Schottky diodes are rectifying devices which can be switched in an extremely short period of time (picoseconds) giving the MES~ET one of its typical advantages.
The current-voltage characteristics of a Schottky diode are very similar to those of conventional p-n junction diodes in which the ~2~ ~8 reverse current remains constant with increasing reverse voltage until breakdown is reached.
To date, Schottky diodes and resulting MESFETs have usually consisted of silicon (Si) or gallium arsenide (GaAs) semiconductor material onto which gold, platinum, palladium, or silver has been deposited, usually by evaporation techniques or by being implanted through the surface. As is known to those familiar with Schottky barrier devices, the selection of the metal which will give the Schottky effect is critical to the successful operation of the device and represents a non-trivial choice.
MESFETs have several advantages over conventional p-n junction diodes and over MOS~ETs in that they have a lower noise and better conversion efficiency, giving them greater overall detection sensitivity. MESFETs are preferred for certain high frequency devices because only majority carriers carry current. In other devices such as the bipolar junction transistor, both majority and minority carriers are present, making for slower switching times and excess junction capacitance (C~). MOSFETs do have the advantage of forming both inversion mode and depletion mode devices utilizing majority carriers, and do not require the definition of an appropriate Schottky metal. Nevertheless, because of parasitic capacitance at the oxide-semiconductor interface of the MOSFET, the advantages of the Schottky behavior of the MESFET are preferred or even necassary for many applications.
As is the case with all semiconductor devices, some of the characteristics of a MESFET will be limited by the characteristics of the semiconductor material from which it is formed. Because silicon, the most common semiconductor material, as well as gallium arsenide and other materials have some inherent limitations for certain applications, corresponding MESFETs formed from silicon and these other materials will also have inherent limitations.
Accordingly, it has long been recognized that one method of improving the performance of devices is to attempt to form them on materials having superior characteristics. One such material having a number of superior characteristics is silicon carbide (SiC). Silicon carbide has some excellent semiconductor properties: a wide bandgap, a high thermal conductivity, a high melting point, a high breakdown electric field strength, and a high saturated electron drift velocity. The wide bandgap gives silicon carbide advantages over semiconductor materials with narrower bandgaps.
Perhaps most importantly, the high thermal conductivity and better temperature stability of silicon carbide mean that devices made from silicon carbide can be packed more closely together without risk of destroying each other from dissipated heat energy, and devices made from silicon carbide can operate at significantly higher temperatures than can those devices made from narrower bandgap semiconductors. Successful silicon carbide devices can also operate at high frequencies and high power levels.
Accordingly, a number of attempts have been made to form devices, including MES~ETs, on silicon carbide. Silicon carbide is, however, a difficult material to work with. To date, successful production of crystalline silicon carbide of an appropriate chemical purity and low defect levPl has remained a somewhat elusive goal, and the growth of single crystal thin films and large crystals have heretofore been difficult to accomplish.
Additionally, successful introduction and activation of the necessary dopant ions into silicon carbide for device manufacture has likewise proved difficult.
These problems have reeently been sueeessfully ~ddressed as described in several issued patents and co-pending applications assigned to the assignee of the present invention, including the following: "Growth of Beta-SiC Thin Films and Semiconductor Devices Fabri-cated Thereon", U.S. patent No. 4,912,063 (see Canadian Application Serial No. 581,147 filed October 25, 1988);
~'Homoepitaxial Growth of ~lpha-SiC Thin Films and Semiconductor Devices Fabricated Thereon", U.S. paten~
No. 4,912,064 (see Canadian Application Serial No.
581,144 filed October 25, 1988) and "Implantation and Electrical Activation of Dopants into Monocrystalline Silicon Carbide", Canadian application Serial No.
581,148 filed October 25, 1988. The advances in forming silieon earbide thin films, silieon earbide single erystals, and in sueeessfully doping silieon earbide aeeording to these methods have rekindled interest in produeing eommereial-quality deviees from silieon earbide, ineluding transistors.
Furthermore, silieon earbide forms in many polytypes, and obtaining a sufficiently defect-free sample of a single polytype has proven difficult prior to the developments noted earlier herein.
Additionally, beta (3C) silieon earbide offers eertain advantages over alpha (6H) silieon earbide in partieular eireumstanees and applieations, ineluding a higher eleetron mobility. Aeeordingly, obtaining devices formed on beta silieon earbide ean oEfer distinct advantages over forming them on alpha silieon carbide.
Several investigators have previously attempted to fabrieate field-effeet transistors using silieon earbide. ~. von Mueneh et al, Teehnieal Diqest of 1977 International Eleetronie Deviee Meetinq, (Institute of the Eleetrieal and Eleetronie . .

3~

Engineers, New York, 1977), page 337, reported MESF~T fabrication on bulk crystals of alpha-SiC in 1977. Although saturation of drain currents was achieved and the maximum transconductance reported was 1.75 mS/mm, von Muench did not report--and apparently was unable to achieve--MESFET operation at any temperatures above room temperature. As stated earlier, operation at high temperatures is one of the signi~icant advantayes offered by the use of silicon carbide as a semiconductor material.
Additionally, the use of beta-SiC is generally of greater interest for electronic devices because of its higher electron Hall mobility, which for beta-SiC is theoretically greater than that of alpha-SiC
over the temperature range of 300-1000 K. Finally, bulk crystal based devices are unsuitable for many applications, and devices formed on thin films are of generally greater interest.
Other researchers have attempted to produce devices on monocrystalline beta-SiC thin films formed on silicon (100) substrates, Yoshida et al, Schottky Barrier Field Effect Transistors of 3C-SiC, J. Appl. Phys. 60(8), 15 October 1986, p. 2989. In these studies, however, saturation of drain currents was not achieved. A number of theories for this failure have been postulated, but the most important factor with respact to the present invention is the absence of any successful MESFET characteristics achieved at elevated temperatures.
As is known to those familiar with the manufacture and characteristics o~ semiconductor devices, the production of such devices on thin films, as opposed to bulk crystals, is often desirable and sometimes necessary. Depending upon the given circumstan~es, thin films can be produced more homogeneously than can bulk crystals, and the 7, ~ 3 characteristics of resulting devices can be correspondingly superior.
Accordingly, the present invention seeks to produce a metal-semiconductor field-effect transistor fabricated from silicon carbide which can operate successfully and exhibit desired characteristics at temperatures at least as high as 623K, and which can be formed on silicon carbide thin films.
Summary of the Invention The invention in one broad aspect provides a metal-semiconductor field-effect transistor comprising a single crystal silicon carbide substrate having a first conductivity type, an active channel layer formed of a monocrystalline thin film layer of silicon carbide upon the substrate and having the opposite conductivity type from the substrate, ohmic contacts upon the active channel layer forming a source and a drain and a Schottky metal contact upon the active channel layer forming a gate.
Another aspect of the invention provides a metal-semiconductor field-effect transistor comprising a single crystal n-type alpha silicon carbide substrate, a p-type monocrystalline beta silicon carbide thin film~ layer upon the substrate and an active channel layer formed of a monocrystalline thin film layer of n-type beta silicon carbide upon the p-type layer. Ohmic metal contacts are upon the active channel layer forming a source and a drain and a Schottky metal contact is upon the active channel layer forming a gate. A layer of SiO2 is upon the active channel layer between the source and the gate and between the gate and the drain for insulating the gate from the source and the drain and for passivating the surface of the active channel layer between the source and the gate and between the gate and the drain.
The invention still further provides a method of making a metal-semiconductor field-effect transistor comprising forming a first monocrystalline thin film layer of silicon carbide having a first conductivity type upon a second monocrystalline thin film layer of silicon carbide having the opposite conductivity type, and wherein the second monocrystalline thin film layer of silicon carbide is formed upon a single crystal substrate of silicon carbide, deflning a rectifying gate contact by adding a Schottky metal contact to the first monocrystalline thin film layer of silicon carbide, defining source and drain contacts by adding ohmic metal contacts to the first monocrystalline thin film layer and passivating the surface of the first monocrystalline thin film layer to insulate the source contact, drain contact and gate con-tact from one another respectively.
Yet another aspect of the invention provides a method of making a metal-semiconductor field-effect transistor comprising forming an epitaxial layer of n-type beta silicon carbide upon a monocrystalline thin film layer of p-type beta silicon carbide wherein the p-type layer is formed upon a single crystal substrate of p-type silicon carbide, defining a rectifying gate contact by adding a gold contact to the epitaxial layer of silicon carbide, defining ohmic source and drain contacts by adding tantalum silicide contacts to the epitaxial layer and oxidizing the surface of the epitaxial layer to insulate the source contact, drain contact and gate contact from one another respectively and to passivate the surface of the epitaxial layer.
The invention further comprehends a method of making a metal-semiconductor field-effect transistor utilizing silicon carbide, the method comprising defining a rectifying gate contact by adding a Schottky metal contact to a first monocrystalline thin film layer of silicon carbide wherein the first monocrystalline thin film layer has a first conductivity type and is formed on a second monocrystalline thin film layer having the opposite conductivity type and wherein the second monocrystalline thin film layer of silicon carbide is formed upon a single crystal substrate of silicon carbide and wherein ohmic contacts on the first monocrystalline thin film layer define the source and the drain.
Other aspects and advantages of the invention and the manner in which the same are accomplished will be set forth in the accompanying detailed description which illustrates exemplary and preferred embodiments, and in the following drawings in which:
Description of the Drawings Figures l - 5 illustrate several of the steps and the resulting structure of a metal-semiconductor field-effect transistor formed according to the present invention;
Figure 6 is a representation of the geometry of a completed MESFET device on an n-type beta-SiC layer in which the gate length is 3.5 microns and the distance from drain to source is 10.5 microns;
Figure 7 is a plot of the drain current-drain voltage characteristics at room temperature of a MESFET according to the present invention with a gate length of 3.5 microns;
Figure 8 is a plot of the drain current-drain voltage characteristics of the MESFET used to obtain the data in Figure 7 at room temperature;
Figure 9 is the drain current-drain voltage characteristics of the same MESFET at 473K; and Figure 10 is the drain current-drain voltage characteristics of the same MESFET at 623K.
Detailed Description of the Invention Briefly in one aspect there ... ..

A ~

is provided a metal-semiconductor ~ield-effect transistor comprising a beta silicon carbide su~strate having a first conductivity t~pe, an active channel formed of a layer of opposite conductivity-type beta silicon carbide upon the first conductivity-t~pe substrate, and Schottky and ohmic metal contacts upon the active channel layer ~orming a source, a gate and a drain. Particular embodiments include a layer of silicon dioxide (SiO2) upon the active channel layer between the source and the gate and between the gate and the drain for insulating the gate from the source and the drain and for passivating the surface of the active channel layer between the source and the gate and between the gate and the drain.
As an example of the invention, a MESFET was fabricated in an unintentionally doped, n-type beta silicon carbide monocrystalline thin film grown by chemical vapor deposition (CVD). This n-type layer was deposited on a monocrystalline p-type beta silicon carbide (100) CVD layer previously grown on a p-type silicon (100) substrate. Thermally evaporated gold (Au) was utilized for the gate contact and sputtered tantalum silicide (TaSi2) was employed for the source and drain contacts. The gate length and channel depth of the MESFET was 3.5 and 0~60 microns, respectively. Saturation o~ the drain currents was achieved at room temperature, and current-voltage characteristics measured at temperatures of between 298 and 623 K indicated that the MESFET exhibited field-effect transistor (FET) behavior throughout this temperature range.
Figures 1 - 5 illustrate the production of a MESFET according to a preferred embodiment of the present invention. As illustrated ln Figure 1, production of a preferred embodlment of the MESFET

begins with a thin film layer of n-type beta silicon carbide 20 formed on a thin film layer of p-type silicon carbide 21. A passivating layer of silicon dioxide 22 is initially grown upon the n-type beta silicon carbide layer 20, following which a ~irst photoresist 23 is applied to begin the process of de~ining the source, gate and drain. Following removal of the silicon dio~ide layer from the unmasked portions of the device, tantalum silicide (TaSi2) is applied to form metal source contacts 24 and metal drain contacts 25 (Figure 2).
Next, a second mask of photoresist 26 is applied and a further portion of SiO2 removed to pattern the device (Figure 3) in preparation for addition of the gold layer 27 (Figure 4) which when masked and patterned forms the rectifying Schottky metal gate contacts 30~ The resulting device is shown in schematic cross-section in Figure 5.
In a particular embodiment of this invention, the p-type beta silicon carbide layer was 7 microns thick and was previously grown on a p-type silicon (100) substrate via CVD, with the n-type beta silicon carbide thin film epitaxially deposite~ on the p-type beta silicon carbide thin film. Other embodiments of the invention have successfully incorporated layers of p-type beta silicon carbide as thin as 3 microns upon the silicon substrate. In this particular embodiment, all of these layers were grown at 1663 K and one atmosphere using a cold wall, vertical barrel-type, RF-heated CVD system.
Hydrogen (H2) was used as the carrier gas and pure silane (SiH4) and ethylene (CzH4) gases were used as silicon and carbon sources respectively.
Trimethyl aluminum (TMA) was used as the aluminum dopant source to obtain the p-type beta silicon carbide buried layer. Hydrogen was bubbled through the TMA at 290 K to introduce it into the i_ ,J r r-J ~ ~ ~

primary gas stream. This layer was used to both confine the current to a thin n-type active region and to move the active layer away from the dense defect region which extended approximately 3 microns 5 from the interface of the Si(100) substrate into the grown film.
Following the growth of the p-type layer, each sample was removed from the reactor, polished with Ool micron diamond paste to remove the surface roughness and oxidized at 1473 K in flowing dry oxygen for 90 minutes to remove polishing-induced sub-surface damage. The sample was then etched in hydrogen fluoride (HF) to remove the oxide, reinserted in the chamber and heated to 1633 K in flowing hydrogen for 5 minutes to thermally etch the surface. The reactant gases of SiH4 and C2H4 were subsequently introduced into the growth chamber and allowed to flow for 17 minutes. The result was an n-type layer of approximately 0.60 microns which was employed as the active channel of the MESFET. The carrier concentrations of the n-type layers averaged approximately 5 X 1016 cm~3 and the hole concentration in the p-type layer was in the ranye of 3 X 1016 to 3 X 1017 cm~3. In this embodiment, the sample had a hole concentration of 3 X 1016 cm~3 as determined by capacitance-voltaye measurements with a Miller profiler. As a last step, the sample was oxidized in flowing dry oxygen at 1373 K for 120 minutes to grow a 46 nanometer silicon dioxide layer to passivate the as-grown surface.
Figure 6 shows the concentric ring geometry us~d for fabrication of a preferred embodiment of the MESFETs of the present invention. As illustrated in Figure 6, the source comprises a generally circular contact 31 in electrical contact with a source contact pad 32. The gate likewise comprises a circular contact 33 electrically ~ ~? ~

connected to a gate contact pad 34 which surrounds the center contact 35 which forms the drain. In a particular embodiment of the invention, the drain contact had a diameter of 100 microns, the gate contact pad was 100 microns on a side, and the source contact pad was 100 microns in diameter. The gate length was 3.5 microns and the source to drain distance was 10.5 microns. It was discovered in accordance with the present invention ~hat the reverse bias leakage current frsm the gate Schottky contact to the outer contact was much larger than that from the gate Schottk~ contact to the center contact. Therefore, the center contact was used as the drain because in the common source mode employed for these measurements, the gat~-drain voltage is greater than the gate-source voltage. By using another mask level, the gate contact pad 34 could be located on top of the oxide layer 22 rather than on the beta silicon carbide surface 20, a configuration which reduces the effect of rectifying contact area.
Although applicants do not wish to be bound by any particular theory, it appears that the layer of beta silicon carbide which forms the active channel should have a selected minimum thickness so that the active channel can be substantially depleted by a gate voltage of no more negative than about -2.0 volts for an n-type active channel or no more positive than about 2.0 volts for a p-type active channel. In the preferred embodiments of the invention, this thickness appears to be no more than about 0.5 or 0.6 microns.
Sputtered TaSi2 was used as the source and drain ohmic contacts. After sputtering, the sample was annealed at 1173 K for 5 minutes in vacuum in order to minimize contact resistance. Thermally evaporated gold was used as the gate rectifying contact. All of these MESFET structures were 1 ~ ~ h ' ~: ~

fabricated with conventional photolithography techniques. Two dark-field masks were used in conjunction with positive photoresists in order to open the ohmic and Schottky contact holes in the oxide layer while one bright-field mask and positive photoresist were used to etch the excess gold evaporated onto the oxide layer. The lift-off technique was used to remove excess TaSi2 deposited on the sioz.
Figure 7 shows typical room temperature drain current versus drain voltage (Id versus Vd) characteristics of the MESFETs of the present invention which were obtained on a Hewlett Packard 4145A semiconductor parameter analyzer. The gate voltage (Vg) was varied from 0.6 to -1.5 volts in steps of 0.3 volts. Figure 3 illustrates that excellent drain current saturation is achieved as the drain voltage increases. Maximum transconductance (in millisiemens per millimeter) in the saturated region for these devices was between 0.64 mS~mm and 1.6 mS/mm. The threshold voltage was -1.6 volts, which represents -1.4 volts after subtracting the leakage current. For gate voltages less than -2 volts, the drain current was almost independent of the gate voltage, and thus the device could not be fully turned off. This indicates that there is some leakage current between gate and drain which may be caused by the p-n junction underneath the thin n layer, by the leakaga current between the gate and the source, or by the defects in the beta silicon carbide film or some combination of these.
Figures 8, 9 and 10 illustrate examples of drain current versus drain voltage measurements on the same device represented in Figure 7, and taken at room temperature (Figure 8), 473 K (Figure 9), and 623 K (Figure 10). In these measurements the drain voltage was applied from 0 to lQ volts in q ~

order to more clearly illustrate the temperature dependence of the drain current and drain voltage characteristics. The insets in each of Figures 8, 9 and 10 illustrate the current-voltage characteristics of the gate-drain diode at the various tsmperatures. It can be seen from ~igures 8, 9 and 10 that as the temperature was increased, the MESFET drain current achieved less saturation and the gate-drain diode at reverse bias yielded more leakage current.
Figure 8 shows that at about 300 K the transistor exhibited stable drain-current saturation at drain-sourc2 voltages of at least about 6 volts;
a leakage current of less than about 12 microamps at drain-source voltages of up to about 6 volts: and a transconductance of at least about 2.1 mS/mm at gate voltages of between about 0.0 and about 1.0 volts and a drain source voltage of about 4.0 volts.
Figure 9 shows that at about 473 K the transistor exhibited stable drain-current saturation at drain-source voltages of at least about 6 volts;
a leakage current of less than about 18 microamps at drain-source voltages of up to about 6 volts; and a transconductance of at least about 1.53 mS/mm at gate voltages of between about 0.0 and about 1.0 ~olts and a drain source voltage of about 4.0 volts.
Figure 10 shows that at about 6Z3 K the transistor exhibited stable drain-current saturation at drain-source voltages of at least about 6 volts;
a leakage current of less than about 80 microamps at drain-source voltages of up to about 6 volts; and a transconductance of at least about 1.05 mS/~m at gate voltages of between about 0.0 and about 1.0 volts and a drain source voltage of about 4.0 volts.
The observed increase in leakage current with temperature may have been caused by an increase in the generation current in the depletion region as - 1 ~J3 temperature was increased. The observed maximum transconductance of this device decreased approximately 21 percent as the temperature was increased to 623 K. This is thought to be due to the decrease in electron mobility as temperatures increased due to the enhanced lattice scattering.
Several factors other than the gate length may influence transconductance at any given temperature.
These are: (1) the source resistance consisting of the ohmic contact and bulk resistances of the source; (2) the gold/beta silicon carbide interface roughness; (3) ionized impurities; and (4) defects.
All of these factors affect carrier mobility.
In the description and drawings, there have been set forth preferred and exemplary embodiments of the invention which have been set forth by way of example and not of limitation, the scope of the invention being that set forth in the following claims.

Claims (28)

1. A metal-semiconductor field-effect transistor comprising:
a single crystal silicon carbide substrate having a first conductivity type;
an active channel layer formed of a monocrystalline thin film layer of silicon carbide upon said substrate and having the opposite conductivity type from said substrate;
ohmic contacts upon said active channel layer forming a source and a drain; and a Schottky metal contact upon said active channel layer forming a gate.

2. A transistor according to Claim 1 further comprising a layer of silicon dioxide upon said active channel layer between said source and said gate and between said gate and said drain for insulating said gate from said source and said drain and for passsivating the surface of said active channel layer between said source and said gate and between said gate and said drain.

3. A transistor according to Claim 1 wherein said active channel layer has a thickness no greater than about 0.6 microns.

4. A transistor according to Claim 1 wherein said active channel layer has a thickness no greater than about 0.5 microns.

5. A transistor according to Claim 1 wherein carrier concentration in said active channel layer is at least 5 X 1016 cm-3.

6. A transistor according to Claim 1 wherein carrier concentration in said monocrystalline thin film layer of silicon carbide is between about 3 X 1016 and about 3 X 1017 cm-3.

7. A transistor according to Claim 1 wherein said substrate and monocrystalline thin film layer are both formed of alpha silicon carbide.

8. A transistor according to Claim 1 wherein said substrate and monocrystalline thin film layer are both formed of beta silicon carbide.

9. A transistor according to Claim 1 wherein said substrate is formed of alpha silicon carbide and said monocrystalline thin film layer is formed of beta silicon carbide.

10. A metal-semiconductor field-effect transistor according to Claim 1 and having the following operational characteristics at temperatures of about 300K:
stable drain-current saturation at drain-source voltages of at least about 6 volts;
a leakage current of less than about 12 microamps at drain-source voltages of up to about 6 volts; and a transconductance of at least about 2.1 mS/mm at gate voltages of between about 0.0 and about 1.0 volts and drain-source voltage of about 4 volts.

11. A metal-semiconductor field-effect transistor according to Claim 1 and having the following operational characteristics at temperatures of about 473K:
stable drain-current saturation at drain-source voltages of at least about 6 volts;

a leakage current of less than about 18 microamps at drain-source voltages of up to about 6 volts; and a transconductance of at least about 1.53 mS/mm at gate voltages of between about 0.0 and about 1.0 volts and drain-source voltage of 4.0 volts.

12. A metal-semiconductor field-effect transistor according to Claim 1 and having the following operational characteristics at temperatures of about 623K:
stable drain-current saturation at drain-source voltages of at least about 6 volts;
a leakage current of less than about 80 microamps at drain-source voltages of up to about 6 volts; and a transconductance of at least about 1.05 mS/mm at gate voltages of between about 0.0 and about 1.0 volts and a drain-source voltage of about 4.0 volts.

13. A metal-semiconductor field-effect transistor according to Claim 1 wherein said active channel layer has a selected minimum thickness such that said active channel layer can be substantially depleted by a gate voltage of no more negative than about -2.0 volts.

14. A transistor according to Claim 13 wherein said selected minimim thickness is no more than about 0.5 microns.

15. A transistor according to Claim 13 or 14 wherein said substrate comprises alpha silicon carbide.

16. A metal-semiconductor field-effect transistor comprising:

a single crystal n-type alpha silicon carbide substrate;
a p-type monocrystalline beta silicon carbide thin film layer upon said substrate;
an active channel layer formed of a monocrystalline thin film layer of n-type beta silicon carbide upon said p-type layer;
ohmic metal contacts upon said active channel layer forming a source and a drain;
a Schottky metal contact upon said active channel layer forming a gate; and a layer of SiO2 upon said active channel layer between said source and said gate and between said gate and said drain for insulating said gate from said source and said drain and for passivating the surface of said active channel layer between said source and said gate and between said gate and said drain.

17. A transistor according to Claim 16 wherein said metal contacts comprise tantalum silicide for said source and said drain and gold for said gate.

18. A transistor according to Claim 16 wherein said drain is surrounded by said gate and said gate is surrounded by said source.

19. A transistor according to Claim 18 wherein said source and said gate form concentric circles surrounding said drain.

20. A method of making a metal-semiconductor field-effect transistor comprising:
forming a first monocrystalline thin film layer of silicon carbide having a first conductivity type upon a second monocrystalline thin film layer of silicon carbide having the opposite conductivity type, and wherein the second monocrystalline thin film layer of silicon carbide is formed upon a single crystal substrate of silicon carbide;
defining a rectifying gate contact by adding a Schottky metal contact to the first monocrystalline thin film layer of silicon carbide;
defining source and drain contacts by adding ohmic metal contacts to the first monocrystalline thin film layer; and passivating the surface of the first monocrystalline thin film layer to insulate the source contact, drain contact and gate contact from one another respectively.

21. A method according to Claim 20 wherein the step of forming the first monocrystalline thin film layer comprises forming the layer by chemical vapor deposition.

22. A method according to Claim 20 wherein the first conductivity type is p-type conductivity.

23. A method of making a metal-semiconductor field-effect transistor comprising:
forming an epitaxial layer of n-type beta silicon carbide upon a monocrystalline thin film layer of p-type beta silicon carbide wherein the p-type layer is formed upon a single crystal substrate of p-type silicon carbide;
defining a rectifying gate contact by adding a gold contact to the epitaxial layer of silicon carbide;
defining ohmic source and drain contacts by adding tantalum silicide contacts to the epitaxial layer; and oxidizing the surface of the epitaxial layer to insulate the source contact, drain contact and gate contact from one another respectively, and to passivate the surface of the epitaxial layer.

24. A method according to Claim 23 comprising forming an epitaxial layer no more than about 0.6 microns thick.

25. A method according to Claim 23 further comprising the step of forming a p-type beta silicon carbide monocrystalline thin film layer at least 7 microns thick prior to the step of forming the n-type epitaxial layer.

26. A method according to Claim 23 further comprising the steps of:
polishing the surface of the p-type monocrystalline thin film layer;
oxidizing the polished surface of the p-type monocrystalline thin film layer; and removing the oxide from the surface of the p-type monocrystalline thin film layer;
all prior to forming the epitaxial layer of n-type beta silicon carbide upon the p-type substrate.

27. A method according to Claim 23 wherein the epitaxial layer of n-type beta silicon carbide is formed by chemical vapor deposition.

28. A method of making a metal-semiconductor field-effect transistor utilizing silicon carbide, the method comprising:
defining a rectifying gate contact by adding a Schottky metal contact to a first monocrystalline thin film layer of silicon carbide wherein the first monocrystalline thin film layer has a first conductivity type and is formed on a second monocrystalline thin film layer having the opposite conductivity type, and wherein the second monocrystalline thin film layer of silicon carbide is formed upon a single crystal substrate of silicon carbide, and wherein ohmic contacts on the first monocrystalline thin film layer define the source and the drain.