CA1290825C - Impedance matching network - Google Patents
Impedance matching networkInfo
- Publication number
- CA1290825C CA1290825C CA 568292 CA568292A CA1290825C CA 1290825 C CA1290825 C CA 1290825C CA 568292 CA568292 CA 568292 CA 568292 A CA568292 A CA 568292A CA 1290825 C CA1290825 C CA 1290825C
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- Prior art keywords
- network
- load
- input
- side leg
- contact
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/38—Impedance-matching networks
- H03H7/40—Automatic matching of load impedance to source impedance
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Abstract
IMPEDANCE MATCHING NETWORK
ABSTRACT
An impedance matching network circuit of either a T, or Pi-type circuit which minimizes impedance change at the input of the matching network as frequency and/or the load impedance change. This is accomplished in T and Pi-type networks by using a fixed value capacitor or inductance at either the input or output of the network instead of the commonly used variable capacitor or inductance. Further, a switching device can be employed in the T or Pi circuit to selectively reverse the positions of the variable inductance and variable capacitance relative to the input and load sides of the T or Pi circuit.
ABSTRACT
An impedance matching network circuit of either a T, or Pi-type circuit which minimizes impedance change at the input of the matching network as frequency and/or the load impedance change. This is accomplished in T and Pi-type networks by using a fixed value capacitor or inductance at either the input or output of the network instead of the commonly used variable capacitor or inductance. Further, a switching device can be employed in the T or Pi circuit to selectively reverse the positions of the variable inductance and variable capacitance relative to the input and load sides of the T or Pi circuit.
Description
~9U~5 OD-1636 - Schrader BACKGROUND OF THE INVENTION
l. Field of the Invention ~he present invention relates to adjustable impedance matching networks, and more particularly, an adjustable impedance matching network of either a T or Pi-type which employs a fixed value capacitor or inductor at either the input or output sides of the network.
l. Field of the Invention ~he present invention relates to adjustable impedance matching networks, and more particularly, an adjustable impedance matching network of either a T or Pi-type which employs a fixed value capacitor or inductor at either the input or output sides of the network.
2. Discussion of the Prior Art Impedance matching networks are kn¢wn and are used to establish a condition in which the impedance of a load is equal to the conjugate of the internal impedance of the source. This condition of impedance matching provides for the maximum transfer of power from the source to the load. In a radio transmitter, it is desired to deliver maximum power from the power amplifier to the antenna. Maximum power is transferred from a source to a load, at a given frequency, when the load impedance is equal to the conjugate of the generator impedance. Generally/ however, the load impedance will not be the proper value for maximum p~wer transfer, and varies, for example, with frequency, ambient temperature, ground moisture and the like. An lmpedance matching network is inserted between the load and the source to present to the source an impedance that is the conjugate of the generator impedance.
Prior-art impedance matching networks of the T or Pi-type generally employ variable capacitors and inductors. These old -2- ~
OD-1636 - Schrader 3~9~
impedance matching networks can be easily mistuned, resulting in excess network power loss, excess inductance current, excess capacitor voltages, and decreased bandwidth, thus causing increases in the matching network losses, and excessive current and voltage.
BRIEF DESCRIPTION OF THE DRAWINGS
The advantages and objectives of the present invention will become clear upon reference to the following detailecl description, in conjunction with the accompanying drawings wherein:
FIGURES 1-7 schematically represent prior known T-type impedance matching networks;
FIGURES 8-14 schematically represent various T-type impedance matching networks provided by the present invention;
15FIGURES 15-21 schematically represent prior known Pi-type impedance matching networks;
FIGURES 22-28 schematically represent various Pi-type i impedance matching networks provided by the present invention;
FIGURES 29 and 30 schematically represent a switching device of the present invention incorporated in a T-type impedance matching network .
FIGURES 31-36 schematically represent another switching device of the present invention incorporated in a T-type impedance b tching network.
_3_ OD-1636 - Schrader ~ 5 , DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG~RES 1 through 7 show, in schematic format, prior art T-type matching networks.
FIGURE 1 schematically represents a prior art T-type . 5 matching network 10 which includes a variable capacitor 12 in the input side leg 14 connected to the input (transmitter) of the network, a variable capacitor 16 in the load side leg 18 connected to the load (antenna), and a variable inductor 20 in . ! the intervening shunt leg 22 of the network 10.
FIGURE 2 schematically represents another prior art T-type matching network 110 which includes a variable inductor 1~ in the . input side~leg 14 connected to the input (transmitter), a .~ variable capacitor 16 in the load side leg 18 connected to the : load (antenna), and a variable inductor 20 in the intervening ~15 shunt leg 22 of the network 110.
. . FIGURE 3 schematically represents yet another prior art ; T-type matching network 210 which includes a variable capacitor 12.in the input side leg 14 connected to the .input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable inductor 20 in the interven.ing shunt leg 22 of the .~ I network 210.
FIGU~E 4 schematically represents still another prior art ~l T-type matching network 310 which includes a variable inductor 13 ;~ ~ in the inpu ide leg 14 connected to the input, a variable l OD-1636 Schrader .
~.~soa~s inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 310.
FIGURE 5 schematically represents a further prior art T-type matching network 410 which includes a variable inductor 13 in the input side leg 14 connected to the input, a variable capacitor 16 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 410.
FIGURE 6 schematically represents a still further prior art T-type matching network 510 which includes a variable capacitor 12 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 connected in the intervening leg 22 of the network 51p.
FIGURE 7 schematically represents yet a further prior art T-type matching network 610 which includes a fixed inductor 24 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor in the intervening shunt leg 22 of the network 610.
ln the prior-art matching networks of FIGURES 1 throuyh 6, each of the capacitors and inductors is variable over a wide range.. Hence, with these prior art T-type networks tuning or matching the load impedance to the input impedance is quite a complex operation since it involves the adjustment of three variables Mistuning results in increasing the matching network ~ 29082~ OD-1636 - Schrader ¦
losses and unnecessarily increasing current through andJor voltage across the network components.
FIGURES 8 through 14 schematically represent various novel T-type networks provided in accordance with the present invention.
FIGURE 8 schematically represents a T-type network 710 which is commonly referred to as an unbalanced network. The network 710 includes a fixed capacitor 17 in the input side leg 14 connected to the input (transmitter), a variable capacitor 16 in the load side leg 18 connected to the load (antenna) and a variable inductor 20 in the intervening shunt leg 22 of the network 710.
FIGURE 8A schematically represents a T-type network 710A
which is commonly referred to as a balanced network. The network 710A includes a fixed capacitor 17 in each of the input side leg~
14 and 14A connected to the input, a variable capacitor 16 in each of the load side legs 18 and 18A connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 71OA.
FIGURE 9 schematically represents a T-type network 810 whicl includes a variable capacitor 12 in the input side leg 14 connected to the inputr a fixed capacitor 19 in the load side le~
; 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 810.
FIGURE 10 schematically represents a T-type network 910 which includes a variable capacitor 12 in the input side leg 14 connected to the input, a fixed inductor 23 in the load side leg . OD-1636 - Schrader 1.~9~5 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 910.
. FIGURE 11 schematically represents a T-type network 1010 which includes a fixed inductor 24 in the input side leg 14 connected to the input, a variable capacitor 16 in the load side leg 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 1010.
FIGURE 12 schematically represents a T-type net~ork 1110 which includes a fixed capacitor 17 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 in the : intervening shunt leg 22 of the network 1110.
FIGURE 13 schematically represents a T-type network 1210 which includes a variable inductor 13 in the input side leg 14 connected to the input, a fixed inductor 23 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 1210.
FIGURE 14 schematically represents a T-type network 1310-which includes a variable inductor 13 in the input side leg 14 conn~cted to the input, a fixed capacitor 19 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 1310.
~ It should be noted at this point that the present invention ; is not limited to the examples of unbalanced T-type networks described in connection with FIGURES 8 through 14, but also encompasses balanced T-type networks, such as shown in FIGURE 8A, OD-1636 - Schrader ~ ~9~)~325 corresponding to each of the unbalanced networks of FIGURES 8 through 14 as well.
FIGU~ES 15 through 21 show, in schematic format, prior art Pi-type matching networks.
FIGVRE 15 represents a Pi-type matching network 1410 which includes a variable capacitor 16 in the intervening leg of the network in series connection with the input (transmitter) and load tantenna), and two variable inductors 13 and 15. Inductor 13 of input side leg 122 is in parallel with the input, and inductor 15 of the load side leg 123 is in parallel with the load of the network 1410.
~ FIGURE 16 represents a Pi-type matching network 1510 which : includes a variable capacitor 16 in the intervening leg of the . network in series connection with the input and load, a variable capacitor 12 in the input side leg 122, and a variable inductor 15 in the load side leg 123 of the network 1510. Capacitor 12 of . the input side leg 122 is in parallel with the input, and inductor 15 of the load side leg 123 is in parallel with the Ioad of the network 1510.
~ FIGURE 17 represents a Pi-type matching network 1610 which includes a variable capacitor 16 in the intervening leg of the network in series connection with the input and load, a variable .
inductor 15 in the input side leg 122, and a variable capacitor 12 in the load side leg 123 of the network 1610. Inductor 15 of the input side leg 122 is in parallel with the input, and 1 ~ 9~ ~ 5 OD-1636 - 5chrader capacitor 12 of the load side leg 123 is in parallel with the load of the network 1610.
FIGURE 18 represents a Pi-type mat~hing network 1710 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122, and a variable capacitor 12 in the load side ,leg 123 of the network 1710. Capacitor 16 of the input side leg 122 is in parallel with the input and capacitor 12 of the load side leg 123 is in parallel with the load of the network 1710.
FIGURE 19 represents a Pi-type matching network 1810 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122, and a variable induc~or 15 in the leg 123 of the network 1810. Capacitor 16 of the input side leg 122 is in parallel with the input and inductor 15 of the load side leg 123 is in parallel with the load of the network 1810.
FIGURE 20 represents a Pi-type matching network 1910 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable inductor 15 in the .. input side leg 122, and a variable capacitor 12 in the load side leg 123 of the network 1910. Inductor 15 of the input side leg 122 is in parallel with the input, and a capacitor 12 of the load side leg 123 is in parallel with the load of the network 1910.
FIGURE 21 represents a Pi-type matching network 2010 which ~ includes a riable inductor 13 in the interveninq leg in eries OD-1636 - Schrader ~.~908~5 connection with the input and load, a fixed capacitor 17 in the input side leg 122 and a variable capacitor 12 in the load side leg 123 of the network 2010. Capacitor 17 of the input leg 122 is in parallel with the input, and capacitor 12 of the load side leg 123 is in parallel with the load of the network 2010.
FIGURES 22 through 28 schematically represent various novelO
Pi-type networks provided in accordance with the present invention.
FIGURE 22 schematically represents a Pi-type network 2110 which includes a variable capacitor 16 in the intervening leg in series connection with the input (transmitter) and load (antenna), a fixed inductor 24 in the input side leg 122, and a variable inductor 15 in the load side leg 123 of the network .
2110. Fixed inductor 24 of the input side leg 122 is in parallel with the input, and variable inductor 15 of the load side leg 123 is in parallel with the load of the network 2110.
FIGURE 23 schematically represents a Pi-type network 2210 which includes variable capacitor 16 in the intervening leg in series connection with the input and load, a variable inductor 13¦
in the input side leg 122, and a fixed inductor 23 in the load side leg 123 of the networ]c 2210. Variable inductor 13 of the input side leg 122 is in parallel with the input, and fixed_. ¦
inductor 23 of the load side leg 123 is in parallel with the load ¦ of the netw k 2210.
OD-1636 - Schrader ~ 9()~ S
FIGURE 24 schematically represents a Pi-type network 2310 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122 and a fixed capacitor 19 in the loac side leg 123 of the network 2310. Variable capacitor 16 of the input side leg 122 is in parallel with the input, and fixed capacitor 19 of the load side leg 123 is in parallel with the load of the network 2310.
FIGU~E 25 schematically represents a Pi-type network 2410 which includes a variable capacitor 16 in the intervening leg in series connection with the input and load, a fixed capacitor 17 in the input side leg 122 and a variable inductor 15 in the load side leg 123 of the network 2410. Fixed capacitor 17 of the input side leg 122 is in parallel with the input, and variable i.nductor 15 of the load side leg 123 is in parallel with the loal L
of the network 2410.
FIGURE 26 schematically represents a Pi-type network 2510 which includes a variable capacitor 16 in the intervening leg-in series connection with the input and load, a variable inductor 1 in the input side leg 122 and a fixed capacitor 19 in the load side leg 123 of the network 2510. Variable inductor 13 of the input side leg 122 ~s in parallel with the input, and fixed capacitor 19 of the load side leg 123 is in parallel with the load of the network 2510.
FIGURE 27 schematically represents a Pi-type network 2610 which includes a variable inductor 13 in the intervening leg in series with the input and load, a fixed inductor 24 in the input side leg 122 and a variable capacitor 12 in the load side leg 12 of the network 2610. Fixed inductor 24 of the input side leg 12 OD-1636 - Schrader ~ ~9~3'Z~
is in parallel with the input, and variable capacitor 12 of the load side leg 123 i5 in parallel with the load of the network c 2610.
FIGURE 28 schematically represents a Pi-type network 2710 which includes a variable inductor 13 in the intervening leg in series with the input and load, a variable capacitor 16 in the input side leg 122 and a fixed inductor 23 in the load side leg 123 of the network 2710. Variable capacitor 16 of the input side¦
leg 122 is in parallel with the input, and fixed inductor 23 of the load side leg 123 is in parallel with the load of the network 2710.
It should be noted at this point that the present invention is not limited to the unbalanced Pi-type networks described in-connection with FI5URES 22-28, but also encompasses balanced Pi-type networks corresponding to each of the unbalanced networks of FIGURES 22-28 as well.
While the T-type and Pi-type networks have been discussed in relationship to antenna matching circuits, it should be clearly understood that they can be utilized for other purposes such as, for example, transmitter output matching circuits and the like.
FIGURES 29 and 30 schematically represent a T-type matching network, for example, heretofore known matching network 10, incorporating a switching device 30 for reversing the positions of the components in the input side leg 14 and the load side leg 18 of the network 10 relative to the input (transmitter) and load (antenna). The switching device 30 is of the double pole, double OD-1636 - Schrader ~,X9~S
throw type having a first set of contacts 32 in series with the component tvariable capacitor) 12 in the matching circuit network input side leg 14 connected to the input, and a second set of contacts 34 in series with the compon~nt (variable capacitor) 16 in the matching circuit network load side leg 18 connected to the load. The irst set o contacts 32 has a first contact 36 and a second contact 33, and the second set of contacts 34 has a first contact 40 and a second contact 42. The first contact 36 of the first set of contacts 32 is connected in parallel with the second contact 42 of the second set of contacts 34, and the second contact 38 of the first set of contacts 32 is connected in parallel with the first contact 40 of the second set of contacts . 34. The input (transmitter) is connected in series with the second contact 38 of the first set of contacts 32, and the load (antenna) is connected in series with the second contact 42 of the second set of contacts 32. The switch 4~ of the first set of contacts 32 and the switch 46 of the second set of contacts 34 move together or in unison between a first position (See FIGUR~
29) whereat the switch 44 closes the second contact 38 of the first set of contacts 32 and the switch 46 closes the second contact 42 o the second set of contacts 34, and a second position (See FIGURE 30) whereat the switch 44 closes the first contact 36 of the irst set of contacts 32 and the switch 46 closes the first contact 40 of the second set of contacts 34.
When the switches 44 and 46 of the switching device 30 are in the first position (FIGURE 29) the component (variable capacitor) 12 l~9U8Z5 _ OD 1636 - Schrader in the network input side leg 14 is directly connected in series to the input (transmitter~ and the other component (variable capacitor) 16 in the network load side le~ 18 is.directly connected in series to the load (antenna). When the switches 44 and 46 of the switching device 30 are in the second position (FIGURE 30) the positions.of the component 1~ in the network input side leg 14 and component 16 in the network load side leg 18 change positions relative to the input and load. In the second position the component (variable capacitor) 12 in the network input side leg 14 is directly connected in series to the load (antenna) and the other component (variable capacitor) 16 in the network load side leg 18 is directly connected in series to the input (transmitter).
It should be clearly understood that the switching device 30 can be used in any prior art T-type matching network, any of the : new T-type networks illustrated in FIGURES 8-14 and their corresponding balanced networks, any of the prior art Pi-type networks as well as any of the new Pi-type networks illustrated in FIGURE5 22-28 and their corresponding balanced networks.
Now with reference to FIGURES 31 through 36, there is shown another new switching device, generally denoted as the numeral 48, i~corporated in a T-type matching network, for example network 710 of FIGURE 8. The switching device 48 is basically the same as the switching device 30 but provides additional features allowing the network 710 to be selectively bypassed, connecting the input directly to the primary load, and l Z9U8Z5 OD-1636 - Schrader selectively connecting the input directly to an alternate load and the primary load to ground. The switching device 48 comprises a first set of contacts 50 and a second set of contacts 52. The first set of contacts 50 includes six contacts and the second set of contacts 52 includes six contacts. The first contact 54 of the first contact set 50 is lo¢ated in the network input side leg 14 in series with and between the input and component (fixed capacitor) 17 in the network input side leg 14, and the first contact 56 of the second contact set 52 is located in the network load side leg 18 in series with and between the load and the component ~variable capacitor) 16 in the network load side leg 18. The second contact 58 of the first contact set .
50 is locatea next to the first contact 54 and is connected in parallel with the first contact 56 of the second contact set 52.
rrhe second contact 60 of the second contact set 52 is located next to the first contact 56 and is connected in parallel with the first contact 54 of the first contact set 50. The third contact 62 of the first contact set 50 is located next to the second contact 58 and is connected in parallel to the third contact 64 of the second contact set 52 which is located next to the second contact 60. The fourth contact 66 of the first contact set 50 is located next to the third contact 62 and is connected to ground. Similarly, the fourth contact 68 of the second contact set 52 is located next to the third contact 64 and¦
is also connected to ground. The fifth contact 70 of the first contact set 50 is located next to the fourth contact 66 and is OD-1636 - Schrader ~9(~ 5 connected to an alternative piece of equipment such as an alternate antenna or dummy load. The fifth contact 72 of the second contact set 52 is located next to the fourth contact 68 and is connected to ground. The sixth contact 74 of the first contact set 50 is located next to the fifth contact 70 and is connected to another alternative piece of equipment such as an alternate antenna or dummy load. The sixth contact 76 of the second contact set 52 is located next to the fifth contact 72 and is connected to ground. The switch 78 of the first contact set 50 and the switch 80 of the second contact set 52 move together : or in unison between first, second, third, fourth, fifth and sixth positions as illustrated in FIGUÆS 31 through 36, respectively. When the switches 78 and 80 of the switching device 48 are in the first position (FIGURE 31~ the switch 78 closes the first contact 54 of the first contact set 50 and the switch 80 closes the first contact 56 of the second contact set 52 so that the component (fixed capacitor) 17 in the network input side leg 14 is directly connected in series to t~e input ... (transmitter) and the other component (variable capacitor) 16 in the network load side leg 18 is directly connectad in series to the load ~antenna). When the switches 78 and 80 of the switching device 48 are in the second position ~FIGURE 32) the switch 78 closes the second contact 58 of the first contact set 50 and the switch 80 closes the second contact 60 of the second contact set 52 so that the component (variable capacitor) 16 in the network load side leg 18 is directly connected in series to the input OD-1636 - Schrader ~.29~8~
(transmitter) and the component (fixed capacitor) 17 in the network input side leg 14 is directly connected in series to the load (antenna). When the switches 78 and 80 of the switching device 48 are in the third position (FIGURE 33) the switch 78 closes the third contact 62 of the first contact set 50 and the switch 80 closes the third contact 64 of the second contact set 52 so that the matching network 710 is bypasssed or shunted.
When the switches 78 and 80 of the switching device 48 are in the fourth position (FIGURE 34) the switch 78 closes the fourth contact 66 of the first contact set 50 and the switch 80 closes the fourth contact 68 of the second contact set 52 so that the input (transmitter) is connected directly to ground and the load ~antenna) is connected directly to ground. When the switches 78 and 80 of the switching device 48 are in the fifth position (FIGURE 35), the switch 78 closes the fifth contact 70 of the first contact set 50 and switch 80 closes the fifth contact 72 of the second contact set 52 so that the input (transmitter) is ; connected directly to an alternate piece of equipment, such as a second antenna, and the primary antenna is connected directly to ground. When the switches 78 and 80 of the switching device 48 are in the sixth position ~FIGURE 36), the switch 78 closes the sixth contact 74 of the first contact set 50 and switch 80 closes the ~ixth contact 76 of the second contact set 52 so that the input (transmitter) is connected directly to an alternate piece of equipment, such as a dummy load, and the load (antenna) is connected directly to ground.
~ ~9~
OD-1636 - Schrader It should be clearly understood that a switch device can be used with any T-type and Pi-type match.ing network, balanced or unbalanced for reversing the network relative to the input and load.
The foregoing detailed description is given primarily for clearness of understanding and no unnecessary limitations are to be understood therefrom for modifications will become obvious to those skilled in the art upon reading this disclosure and may be made without departing from the spirit of the invention or scope of the appended claims.
Prior-art impedance matching networks of the T or Pi-type generally employ variable capacitors and inductors. These old -2- ~
OD-1636 - Schrader 3~9~
impedance matching networks can be easily mistuned, resulting in excess network power loss, excess inductance current, excess capacitor voltages, and decreased bandwidth, thus causing increases in the matching network losses, and excessive current and voltage.
BRIEF DESCRIPTION OF THE DRAWINGS
The advantages and objectives of the present invention will become clear upon reference to the following detailecl description, in conjunction with the accompanying drawings wherein:
FIGURES 1-7 schematically represent prior known T-type impedance matching networks;
FIGURES 8-14 schematically represent various T-type impedance matching networks provided by the present invention;
15FIGURES 15-21 schematically represent prior known Pi-type impedance matching networks;
FIGURES 22-28 schematically represent various Pi-type i impedance matching networks provided by the present invention;
FIGURES 29 and 30 schematically represent a switching device of the present invention incorporated in a T-type impedance matching network .
FIGURES 31-36 schematically represent another switching device of the present invention incorporated in a T-type impedance b tching network.
_3_ OD-1636 - Schrader ~ 5 , DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG~RES 1 through 7 show, in schematic format, prior art T-type matching networks.
FIGURE 1 schematically represents a prior art T-type . 5 matching network 10 which includes a variable capacitor 12 in the input side leg 14 connected to the input (transmitter) of the network, a variable capacitor 16 in the load side leg 18 connected to the load (antenna), and a variable inductor 20 in . ! the intervening shunt leg 22 of the network 10.
FIGURE 2 schematically represents another prior art T-type matching network 110 which includes a variable inductor 1~ in the . input side~leg 14 connected to the input (transmitter), a .~ variable capacitor 16 in the load side leg 18 connected to the : load (antenna), and a variable inductor 20 in the intervening ~15 shunt leg 22 of the network 110.
. . FIGURE 3 schematically represents yet another prior art ; T-type matching network 210 which includes a variable capacitor 12.in the input side leg 14 connected to the .input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable inductor 20 in the interven.ing shunt leg 22 of the .~ I network 210.
FIGU~E 4 schematically represents still another prior art ~l T-type matching network 310 which includes a variable inductor 13 ;~ ~ in the inpu ide leg 14 connected to the input, a variable l OD-1636 Schrader .
~.~soa~s inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 310.
FIGURE 5 schematically represents a further prior art T-type matching network 410 which includes a variable inductor 13 in the input side leg 14 connected to the input, a variable capacitor 16 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 410.
FIGURE 6 schematically represents a still further prior art T-type matching network 510 which includes a variable capacitor 12 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 connected in the intervening leg 22 of the network 51p.
FIGURE 7 schematically represents yet a further prior art T-type matching network 610 which includes a fixed inductor 24 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor in the intervening shunt leg 22 of the network 610.
ln the prior-art matching networks of FIGURES 1 throuyh 6, each of the capacitors and inductors is variable over a wide range.. Hence, with these prior art T-type networks tuning or matching the load impedance to the input impedance is quite a complex operation since it involves the adjustment of three variables Mistuning results in increasing the matching network ~ 29082~ OD-1636 - Schrader ¦
losses and unnecessarily increasing current through andJor voltage across the network components.
FIGURES 8 through 14 schematically represent various novel T-type networks provided in accordance with the present invention.
FIGURE 8 schematically represents a T-type network 710 which is commonly referred to as an unbalanced network. The network 710 includes a fixed capacitor 17 in the input side leg 14 connected to the input (transmitter), a variable capacitor 16 in the load side leg 18 connected to the load (antenna) and a variable inductor 20 in the intervening shunt leg 22 of the network 710.
FIGURE 8A schematically represents a T-type network 710A
which is commonly referred to as a balanced network. The network 710A includes a fixed capacitor 17 in each of the input side leg~
14 and 14A connected to the input, a variable capacitor 16 in each of the load side legs 18 and 18A connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 71OA.
FIGURE 9 schematically represents a T-type network 810 whicl includes a variable capacitor 12 in the input side leg 14 connected to the inputr a fixed capacitor 19 in the load side le~
; 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 810.
FIGURE 10 schematically represents a T-type network 910 which includes a variable capacitor 12 in the input side leg 14 connected to the input, a fixed inductor 23 in the load side leg . OD-1636 - Schrader 1.~9~5 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 910.
. FIGURE 11 schematically represents a T-type network 1010 which includes a fixed inductor 24 in the input side leg 14 connected to the input, a variable capacitor 16 in the load side leg 18 connected to the load, and a variable inductor 20 in the intervening shunt leg 22 of the network 1010.
FIGURE 12 schematically represents a T-type net~ork 1110 which includes a fixed capacitor 17 in the input side leg 14 connected to the input, a variable inductor 15 in the load side leg 18 connected to the load, and a variable capacitor 21 in the : intervening shunt leg 22 of the network 1110.
FIGURE 13 schematically represents a T-type network 1210 which includes a variable inductor 13 in the input side leg 14 connected to the input, a fixed inductor 23 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 1210.
FIGURE 14 schematically represents a T-type network 1310-which includes a variable inductor 13 in the input side leg 14 conn~cted to the input, a fixed capacitor 19 in the load side leg 18 connected to the load, and a variable capacitor 21 in the intervening shunt leg 22 of the network 1310.
~ It should be noted at this point that the present invention ; is not limited to the examples of unbalanced T-type networks described in connection with FIGURES 8 through 14, but also encompasses balanced T-type networks, such as shown in FIGURE 8A, OD-1636 - Schrader ~ ~9~)~325 corresponding to each of the unbalanced networks of FIGURES 8 through 14 as well.
FIGU~ES 15 through 21 show, in schematic format, prior art Pi-type matching networks.
FIGVRE 15 represents a Pi-type matching network 1410 which includes a variable capacitor 16 in the intervening leg of the network in series connection with the input (transmitter) and load tantenna), and two variable inductors 13 and 15. Inductor 13 of input side leg 122 is in parallel with the input, and inductor 15 of the load side leg 123 is in parallel with the load of the network 1410.
~ FIGURE 16 represents a Pi-type matching network 1510 which : includes a variable capacitor 16 in the intervening leg of the . network in series connection with the input and load, a variable capacitor 12 in the input side leg 122, and a variable inductor 15 in the load side leg 123 of the network 1510. Capacitor 12 of . the input side leg 122 is in parallel with the input, and inductor 15 of the load side leg 123 is in parallel with the Ioad of the network 1510.
~ FIGURE 17 represents a Pi-type matching network 1610 which includes a variable capacitor 16 in the intervening leg of the network in series connection with the input and load, a variable .
inductor 15 in the input side leg 122, and a variable capacitor 12 in the load side leg 123 of the network 1610. Inductor 15 of the input side leg 122 is in parallel with the input, and 1 ~ 9~ ~ 5 OD-1636 - 5chrader capacitor 12 of the load side leg 123 is in parallel with the load of the network 1610.
FIGURE 18 represents a Pi-type mat~hing network 1710 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122, and a variable capacitor 12 in the load side ,leg 123 of the network 1710. Capacitor 16 of the input side leg 122 is in parallel with the input and capacitor 12 of the load side leg 123 is in parallel with the load of the network 1710.
FIGURE 19 represents a Pi-type matching network 1810 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122, and a variable induc~or 15 in the leg 123 of the network 1810. Capacitor 16 of the input side leg 122 is in parallel with the input and inductor 15 of the load side leg 123 is in parallel with the load of the network 1810.
FIGURE 20 represents a Pi-type matching network 1910 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable inductor 15 in the .. input side leg 122, and a variable capacitor 12 in the load side leg 123 of the network 1910. Inductor 15 of the input side leg 122 is in parallel with the input, and a capacitor 12 of the load side leg 123 is in parallel with the load of the network 1910.
FIGURE 21 represents a Pi-type matching network 2010 which ~ includes a riable inductor 13 in the interveninq leg in eries OD-1636 - Schrader ~.~908~5 connection with the input and load, a fixed capacitor 17 in the input side leg 122 and a variable capacitor 12 in the load side leg 123 of the network 2010. Capacitor 17 of the input leg 122 is in parallel with the input, and capacitor 12 of the load side leg 123 is in parallel with the load of the network 2010.
FIGURES 22 through 28 schematically represent various novelO
Pi-type networks provided in accordance with the present invention.
FIGURE 22 schematically represents a Pi-type network 2110 which includes a variable capacitor 16 in the intervening leg in series connection with the input (transmitter) and load (antenna), a fixed inductor 24 in the input side leg 122, and a variable inductor 15 in the load side leg 123 of the network .
2110. Fixed inductor 24 of the input side leg 122 is in parallel with the input, and variable inductor 15 of the load side leg 123 is in parallel with the load of the network 2110.
FIGURE 23 schematically represents a Pi-type network 2210 which includes variable capacitor 16 in the intervening leg in series connection with the input and load, a variable inductor 13¦
in the input side leg 122, and a fixed inductor 23 in the load side leg 123 of the networ]c 2210. Variable inductor 13 of the input side leg 122 is in parallel with the input, and fixed_. ¦
inductor 23 of the load side leg 123 is in parallel with the load ¦ of the netw k 2210.
OD-1636 - Schrader ~ 9()~ S
FIGURE 24 schematically represents a Pi-type network 2310 which includes a variable inductor 13 in the intervening leg in series connection with the input and load, a variable capacitor 16 in the input side leg 122 and a fixed capacitor 19 in the loac side leg 123 of the network 2310. Variable capacitor 16 of the input side leg 122 is in parallel with the input, and fixed capacitor 19 of the load side leg 123 is in parallel with the load of the network 2310.
FIGU~E 25 schematically represents a Pi-type network 2410 which includes a variable capacitor 16 in the intervening leg in series connection with the input and load, a fixed capacitor 17 in the input side leg 122 and a variable inductor 15 in the load side leg 123 of the network 2410. Fixed capacitor 17 of the input side leg 122 is in parallel with the input, and variable i.nductor 15 of the load side leg 123 is in parallel with the loal L
of the network 2410.
FIGURE 26 schematically represents a Pi-type network 2510 which includes a variable capacitor 16 in the intervening leg-in series connection with the input and load, a variable inductor 1 in the input side leg 122 and a fixed capacitor 19 in the load side leg 123 of the network 2510. Variable inductor 13 of the input side leg 122 ~s in parallel with the input, and fixed capacitor 19 of the load side leg 123 is in parallel with the load of the network 2510.
FIGURE 27 schematically represents a Pi-type network 2610 which includes a variable inductor 13 in the intervening leg in series with the input and load, a fixed inductor 24 in the input side leg 122 and a variable capacitor 12 in the load side leg 12 of the network 2610. Fixed inductor 24 of the input side leg 12 OD-1636 - Schrader ~ ~9~3'Z~
is in parallel with the input, and variable capacitor 12 of the load side leg 123 i5 in parallel with the load of the network c 2610.
FIGURE 28 schematically represents a Pi-type network 2710 which includes a variable inductor 13 in the intervening leg in series with the input and load, a variable capacitor 16 in the input side leg 122 and a fixed inductor 23 in the load side leg 123 of the network 2710. Variable capacitor 16 of the input side¦
leg 122 is in parallel with the input, and fixed inductor 23 of the load side leg 123 is in parallel with the load of the network 2710.
It should be noted at this point that the present invention is not limited to the unbalanced Pi-type networks described in-connection with FI5URES 22-28, but also encompasses balanced Pi-type networks corresponding to each of the unbalanced networks of FIGURES 22-28 as well.
While the T-type and Pi-type networks have been discussed in relationship to antenna matching circuits, it should be clearly understood that they can be utilized for other purposes such as, for example, transmitter output matching circuits and the like.
FIGURES 29 and 30 schematically represent a T-type matching network, for example, heretofore known matching network 10, incorporating a switching device 30 for reversing the positions of the components in the input side leg 14 and the load side leg 18 of the network 10 relative to the input (transmitter) and load (antenna). The switching device 30 is of the double pole, double OD-1636 - Schrader ~,X9~S
throw type having a first set of contacts 32 in series with the component tvariable capacitor) 12 in the matching circuit network input side leg 14 connected to the input, and a second set of contacts 34 in series with the compon~nt (variable capacitor) 16 in the matching circuit network load side leg 18 connected to the load. The irst set o contacts 32 has a first contact 36 and a second contact 33, and the second set of contacts 34 has a first contact 40 and a second contact 42. The first contact 36 of the first set of contacts 32 is connected in parallel with the second contact 42 of the second set of contacts 34, and the second contact 38 of the first set of contacts 32 is connected in parallel with the first contact 40 of the second set of contacts . 34. The input (transmitter) is connected in series with the second contact 38 of the first set of contacts 32, and the load (antenna) is connected in series with the second contact 42 of the second set of contacts 32. The switch 4~ of the first set of contacts 32 and the switch 46 of the second set of contacts 34 move together or in unison between a first position (See FIGUR~
29) whereat the switch 44 closes the second contact 38 of the first set of contacts 32 and the switch 46 closes the second contact 42 o the second set of contacts 34, and a second position (See FIGURE 30) whereat the switch 44 closes the first contact 36 of the irst set of contacts 32 and the switch 46 closes the first contact 40 of the second set of contacts 34.
When the switches 44 and 46 of the switching device 30 are in the first position (FIGURE 29) the component (variable capacitor) 12 l~9U8Z5 _ OD 1636 - Schrader in the network input side leg 14 is directly connected in series to the input (transmitter~ and the other component (variable capacitor) 16 in the network load side le~ 18 is.directly connected in series to the load (antenna). When the switches 44 and 46 of the switching device 30 are in the second position (FIGURE 30) the positions.of the component 1~ in the network input side leg 14 and component 16 in the network load side leg 18 change positions relative to the input and load. In the second position the component (variable capacitor) 12 in the network input side leg 14 is directly connected in series to the load (antenna) and the other component (variable capacitor) 16 in the network load side leg 18 is directly connected in series to the input (transmitter).
It should be clearly understood that the switching device 30 can be used in any prior art T-type matching network, any of the : new T-type networks illustrated in FIGURES 8-14 and their corresponding balanced networks, any of the prior art Pi-type networks as well as any of the new Pi-type networks illustrated in FIGURE5 22-28 and their corresponding balanced networks.
Now with reference to FIGURES 31 through 36, there is shown another new switching device, generally denoted as the numeral 48, i~corporated in a T-type matching network, for example network 710 of FIGURE 8. The switching device 48 is basically the same as the switching device 30 but provides additional features allowing the network 710 to be selectively bypassed, connecting the input directly to the primary load, and l Z9U8Z5 OD-1636 - Schrader selectively connecting the input directly to an alternate load and the primary load to ground. The switching device 48 comprises a first set of contacts 50 and a second set of contacts 52. The first set of contacts 50 includes six contacts and the second set of contacts 52 includes six contacts. The first contact 54 of the first contact set 50 is lo¢ated in the network input side leg 14 in series with and between the input and component (fixed capacitor) 17 in the network input side leg 14, and the first contact 56 of the second contact set 52 is located in the network load side leg 18 in series with and between the load and the component ~variable capacitor) 16 in the network load side leg 18. The second contact 58 of the first contact set .
50 is locatea next to the first contact 54 and is connected in parallel with the first contact 56 of the second contact set 52.
rrhe second contact 60 of the second contact set 52 is located next to the first contact 56 and is connected in parallel with the first contact 54 of the first contact set 50. The third contact 62 of the first contact set 50 is located next to the second contact 58 and is connected in parallel to the third contact 64 of the second contact set 52 which is located next to the second contact 60. The fourth contact 66 of the first contact set 50 is located next to the third contact 62 and is connected to ground. Similarly, the fourth contact 68 of the second contact set 52 is located next to the third contact 64 and¦
is also connected to ground. The fifth contact 70 of the first contact set 50 is located next to the fourth contact 66 and is OD-1636 - Schrader ~9(~ 5 connected to an alternative piece of equipment such as an alternate antenna or dummy load. The fifth contact 72 of the second contact set 52 is located next to the fourth contact 68 and is connected to ground. The sixth contact 74 of the first contact set 50 is located next to the fifth contact 70 and is connected to another alternative piece of equipment such as an alternate antenna or dummy load. The sixth contact 76 of the second contact set 52 is located next to the fifth contact 72 and is connected to ground. The switch 78 of the first contact set 50 and the switch 80 of the second contact set 52 move together : or in unison between first, second, third, fourth, fifth and sixth positions as illustrated in FIGUÆS 31 through 36, respectively. When the switches 78 and 80 of the switching device 48 are in the first position (FIGURE 31~ the switch 78 closes the first contact 54 of the first contact set 50 and the switch 80 closes the first contact 56 of the second contact set 52 so that the component (fixed capacitor) 17 in the network input side leg 14 is directly connected in series to t~e input ... (transmitter) and the other component (variable capacitor) 16 in the network load side leg 18 is directly connectad in series to the load ~antenna). When the switches 78 and 80 of the switching device 48 are in the second position ~FIGURE 32) the switch 78 closes the second contact 58 of the first contact set 50 and the switch 80 closes the second contact 60 of the second contact set 52 so that the component (variable capacitor) 16 in the network load side leg 18 is directly connected in series to the input OD-1636 - Schrader ~.29~8~
(transmitter) and the component (fixed capacitor) 17 in the network input side leg 14 is directly connected in series to the load (antenna). When the switches 78 and 80 of the switching device 48 are in the third position (FIGURE 33) the switch 78 closes the third contact 62 of the first contact set 50 and the switch 80 closes the third contact 64 of the second contact set 52 so that the matching network 710 is bypasssed or shunted.
When the switches 78 and 80 of the switching device 48 are in the fourth position (FIGURE 34) the switch 78 closes the fourth contact 66 of the first contact set 50 and the switch 80 closes the fourth contact 68 of the second contact set 52 so that the input (transmitter) is connected directly to ground and the load ~antenna) is connected directly to ground. When the switches 78 and 80 of the switching device 48 are in the fifth position (FIGURE 35), the switch 78 closes the fifth contact 70 of the first contact set 50 and switch 80 closes the fifth contact 72 of the second contact set 52 so that the input (transmitter) is ; connected directly to an alternate piece of equipment, such as a second antenna, and the primary antenna is connected directly to ground. When the switches 78 and 80 of the switching device 48 are in the sixth position ~FIGURE 36), the switch 78 closes the sixth contact 74 of the first contact set 50 and switch 80 closes the ~ixth contact 76 of the second contact set 52 so that the input (transmitter) is connected directly to an alternate piece of equipment, such as a dummy load, and the load (antenna) is connected directly to ground.
~ ~9~
OD-1636 - Schrader It should be clearly understood that a switch device can be used with any T-type and Pi-type match.ing network, balanced or unbalanced for reversing the network relative to the input and load.
The foregoing detailed description is given primarily for clearness of understanding and no unnecessary limitations are to be understood therefrom for modifications will become obvious to those skilled in the art upon reading this disclosure and may be made without departing from the spirit of the invention or scope of the appended claims.
Claims (7)
1. In an impedance matching network comprising a first side leg and a second side leg with an intervening common leg therebetween, the improvement comprising switch means for selectively reversing the positions of the input side leg and load side leg of the network relative to an input and a load connected to the network.
2. The impedance matching network of claim 1, where-in the matching network is a T-type network.
3. The impedance matching network of claim 1, where in the matching network is a Pi-type network.
4. A switch device for connecting an impedance match-ing network comprising a first side leg and a second side leg to an input and a load, the switch device comprising means for selectively reversing the positions of the first side and the second side of the network relative to the input and load.
5. The switch device of claim 4, further comprising means for selectively connecting the input directly to the load bypassing the matching network.
6. The switch device of claim 4, further comprising means for selectively connecting the input to ground, and the load to ground, bypassing the matching network.
7. The switch device of claim 4, further comprising means for selectively connecting the input to an alternative load, and the load to ground, bypassing the matching network.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA 568292 CA1290825C (en) | 1988-06-01 | 1988-06-01 | Impedance matching network |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA 568292 CA1290825C (en) | 1988-06-01 | 1988-06-01 | Impedance matching network |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1290825C true CA1290825C (en) | 1991-10-15 |
Family
ID=32932202
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 568292 Expired CA1290825C (en) | 1988-06-01 | 1988-06-01 | Impedance matching network |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1290825C (en) |
-
1988
- 1988-06-01 CA CA 568292 patent/CA1290825C/en not_active Expired
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