CA1275149A - Pulse amplifier suitable for use in the semiconductor laser driving device - Google Patents
Pulse amplifier suitable for use in the semiconductor laser driving deviceInfo
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- CA1275149A CA1275149A CA000568053A CA568053A CA1275149A CA 1275149 A CA1275149 A CA 1275149A CA 000568053 A CA000568053 A CA 000568053A CA 568053 A CA568053 A CA 568053A CA 1275149 A CA1275149 A CA 1275149A
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Abstract
ABSTRACT OF THE DISCLOSURE
A pulse amplifier suitable for use as the pulse current supply circuit in a semiconductor driving device, which circuit cuts of a pulse top side portion and a pulse base side portion of an input pulse with respect to a mesial point of the input pulse to obtain an output pulse having a desired pulse amplitude in response to a control signal, without varying a pulse width. This may be used with a semiconductor laser driving device using FET's as a positive element in a bias current supply circuit and a pulse current supply circuit, and having compensating circuits for compensating differences in the characteristics of the FET's and a laser diode used in the driving device.
A pulse amplifier suitable for use as the pulse current supply circuit in a semiconductor driving device, which circuit cuts of a pulse top side portion and a pulse base side portion of an input pulse with respect to a mesial point of the input pulse to obtain an output pulse having a desired pulse amplitude in response to a control signal, without varying a pulse width. This may be used with a semiconductor laser driving device using FET's as a positive element in a bias current supply circuit and a pulse current supply circuit, and having compensating circuits for compensating differences in the characteristics of the FET's and a laser diode used in the driving device.
Description
~.2~;149 This application is a division of application S.N. 520,769 filed October 17, 1986.
BACKGROUND OF THE INVENTION
1. Field of the Invention The present invention relates to a pulse amplifier suitable for use as a pulse current supply circuit in a semiconductor laser driving device. This pulse amplifier varies a pulse amplitude of an output pulse in response to a control signal.
BACKGROUND OF THE INVENTION
1. Field of the Invention The present invention relates to a pulse amplifier suitable for use as a pulse current supply circuit in a semiconductor laser driving device. This pulse amplifier varies a pulse amplitude of an output pulse in response to a control signal.
2. Description of the Related Art The semiconductor laser driving device is used for con-trolling an excitation of the semiconductor laser, such as a laser diode, used as a light source in an optical communication system. The optical communication system is suitable for a large capacity data transmission, in which the laser diode must be driven at an ultra high transmission rate (G bit/s order). Accordingly, the semiconductor laser driving device and the pulse amplifier used therein, which can operate at the ultra high transmission rate, are required.
The semiconductor laser driving device in the prior art comprises a bias current supply circuit for supplying a bias current to the laser diode, a pulse current supply circuit for supplying a pulse current to the laser diode for exciting the laser diode to emit a light, and an automatic power control loop for controlling the magnitude of the base current and the pulse amplitude of -the pulse current to maintain the output light of the laser diode at a constant power. The bias current and pulse current supply circuits are constituted by using, as active elements, bipolar transistors having almost the same characteristic.
When the bipolar transistors are used, however, ~X~5~ ~9 the -transmission rate of the semiconductor laser drivlng device has an upper limit on the order oE about lOOs M bit/s and, therefore, the bipolar transistor can not be used for a semlconductor laser driving device operated at 1 G bit/s, which will become more necessary in the future. This limitation to the transmission rate is due to a physical characteristic of the bipolar transistor, and therefore, -the transmission rate cannot be increased merely by changing a circuit constitution of the driving device.
Accordingly, the use of an FET (Field Effect Transistor) capable of operating at high transmission rate, such as GaAs FET, has been proposed for the high speed operating type semiconductor laser driving device.
SUMMARY OF THE INVENTION
In accordance with the present invention there is provided a pulse amplifier for varying a pulse amplitude of an input pulse in response to a control signal, comprising first and second FET's having pinch-off voltages, determined by gate-source voltages thereof, under which currents flowing at drains become zero, connected in cascade, wherein: the first FET is constituted so that an input pulse is input to a gate electrode thereof and a gate-source voltage variable in response to a con-trol signal is biased so as to output from a drain thereof a first pulse cut off at a top side portion and a base side portion of the input pulse at said pinch-off voltage thereof, and so that one of top side portion and base side portion of the input pulse is cut off at a pinchoff voltage thereof; and the second FET is constituted so that said first pulse output from the drain of the first FET is input to a gate thereof and a gate-source voltage is biased so as to output from a drain thereof a second pulse cut off at the side portion of the first pulse corresponding to the non-cut-off side portion of the input pulse.
7S~4~
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A preferred form of the above embodiment is where the pulse amplifier is one in which the first FET cuts off the top side portion of the input pulse to obtain an input pulse waveform from a zero level to an appropriate level; and the second FET cuts off the base side portion of -the input pulse to obtain an input pulse waveEorm from a peak level to an appropriate level.
A still further preferred form is where, in the above pulse amplifier, the first FET cuts of~ the base side portion of the input pulse to obtain the input pulse waveform from a peak level to an appropriate level; and the second FET cuts off the top side portion of the input pulse to obtain the input pulse waveform from a zero level to an appropriate level.
BRIEF DESCRIPTION OF THE DRAWINGS
Embodiments of the invention illustrating the pulse amplifier used in conjunction with a semiconductor laser driving device will now be described in detail with reference to the accompanying drawings, in which:
Figure 1 is a view showing an example of the semiconductor laser driving device of the prior art;
Fig. 2 is a graph showing an operating characteristic of the laser diode;
Fig. 3 is a view showing the semiconductor laser driving device as a relevant ar-t;
Fig. 4 is a graph showing a VGS-ID character-istic of the FET Q6;
Fig. 5 is a graph showing differences of the ~l~7~
_g_ VGS-ID characteristics of the EETs;
Fig. 6 is a view showing an embodiment of the semiconductor laser driving device;
Fig. 7 is a view for explaining a principle of the operation of the pulse current supply circuit in Fig.
6;
Figs. 8 and 9 are graphs for explaining the operation of the pulse current supply circuit in Fig. 6; and Fig. 10 is a view showing a general constitution of the pulse amplifier according to the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
For easy and better unclerstanding of the present invention, a semiconductor laser driving device of prior and related arts, and their problems, are first described with reference to Figs. 1 to 5.
Figure 1 is a view showing an example of the semiconductor laser driving device of the prior art. In Fig. 1, 1 is a laser diode module comprising a laser diode LD which outputs a forward laser ligh-t into a optical fiber {not shown}, and at the same time, a backward laser light as a monitoring light to be monitored, and an avalanche photodiode APD which receives the monitoring light and converts it into a monitoring current Im ; 2 is a bias current supply circuit for supplying a DC bias current for the laser diode LD, which circuit comprises a bipolar transistor Ql and a resistor Rl; 3 is a pulse current supply circuit for supplying a pulse current for the laser diode LD in such a manner that the pulse current is superimposed on the bias current, which circuit comprises bipolar transistors Q2 to Q4 and a resistor R2;
4 is a low pass filter for extracting a low Erequency component of data input pulse D~(in); 5 is a low pass filter for extracting a low frequency component of the monitoring current Im ~;~75~3 outpu-t from the avalanche photodiode APD; 6 i9 an automatic power control circuit constituted by a differ-ential amplifier, which circuit supplies an automatic power control voltage Vapc proportional to a difference between two inputs from the low pass filters 4 and 5 to a base of the transistor Ql of the bias current supply circuit 2 and a base of the transistor Q4 of the pulse current supply circuit 3; and L is a coil for cutting off an AC component. The pulse current supyly circuit 3 receives the data input pulses DT(in) at the base of the transistor Q2 to supply a pulse curren-t Ip corresponding to the input pulse DT(in) to the laser diode LD. A
reversed input pulse DT(in) is input to a base of the transistor Q3.
15Figure 2 is a graph showing an operating character istic of the laser diode, in which the abscissa denotes ! a driving current Id flowing through the laser diode LD
and the ordinate denotes an output power L of the laser light emitted from the laser diode. In Fig. 2, the charàcteristic curves A, B, and C correspond to operating temperatures of 5C, 25C, and 50C, respectively. As shown in Fig. 2, the bias current Ib is a DC current slightly lower than a threshold current Ith of the laser diode LD. The pulse current Ip is superimposed on the bias current Ib ~ whereby the pulselike laser light corresponding to the pulse current Ip is output from the laser diode LD.
The low pass filters 4 and 5 and the control circuit 6, together with the bias current and pulse current supply circuits 2 and 3, constitute an automatic power control loop for stabilizing the light output ~rom the laser diode LD. That is, as shown in Fig. 2, the threshold current Ith and a differential quantum efficiency of the laser diode LD vary in accordance with the temperature. For example, assuming an identical driving current Id ~ when the temperature is low the light output power LoUt increases, and when the 1~75~
temperature is high the light output power decreases.
Accordingly, the light outpu-t from the laser diode LD
varies with respect to the temperature. The automatic power control loop is provided for compensating this variation, by comparing the average value of the input pulses DT(in) output from the low pass filter 4 with the average value of the monitoring current Im output from the low pass filter 5 at the control circuit 6, then outpu-tting the control voltage Vapc to make these average values coincide and thus control the bias current Ib and the pulse current Ip , thereby maintaining the output light at a constant value.
The bias value Ib is proportional to Vapc where the resistance of the resistor Rl is designed to compensate for va~iations in temperature of the threshold current Ith of the laser diode. The pulse current Ip is proportional to apc , where the resistance of the resistor R2 is designed to compensate for variations in temperature of the differential quantum efficiency of the laser diode LD.
As described above, the feedback control is performed on the basis of the average values of the pulse train output from the low pass filters 4 and 5, because a feedback control by which a peak value of the light output pulse is maintained at a constant value by following up each of the input pulses DT(in) is difficult, due to the high transmission rate thereof.
In this semiconductor laser driving device, the monitoring light from the laser diode LD is detected by the photodiode APD, and a pulse amplitude of the pulse current supplied from the pulse current supply circuit 3 and the value of the DC bias current supplied from the bias current supply circuit are fedback in response to the detec~ted value of the monitoring light, and thus an automatic power control of the ou~put light is carried ~7~ 9 out to maintain a constant average value of the output light.
- As described above, the semiconductor laser driving device shown in Fig. 1 uses bipolar transistors as active elements in the bias current and pulse current supply circui-ts 2 and 3. The bipolar transistors are used because the differences between the base voltage and collector current characteristics of each device are - small, and accordingly, in the automatic power control loop, the output of the control circuit 6 may be directly fedback to the transistors Ql and Q4.
When using the bipolar transistor, however, the transmission rate is limited to, for example, an upper order of lOOs Mb/S, which can not cope with a demand for a 1 Gb/s transmission rate, which demand will become greater in the future.
Figure 3 is a view showing the semiconductor laser driving device as a relevant art of the present inven-tion, in which high speed FET's capable of operating at a transmission rate of 1 to 2 Gb/s order, such as Gallium Arsenide FET's, are used as active elements in the bias current and pulse current supply circuits.
This driving device is intended to further increase the ! transmission rate. In Fig. 3, parts bearing ths same xeference numerals as shown in Fig. 1 denote the same parts having the same function.
As shown in Fig~ 3, a bias current supply circuit 7 comprises an FET Q5 with a gate to which the control voltage Vapc is input. A pulse current supply circuit 8 comprises a capacitor C2, an FET Q6 with a gate to which the input pulse DTtin) is input, and a low level clamping diode Dl through which the control voltage ~apc is applied to the gate of the FET Q6.
In this semiconductor laser driving device, gate-source voltages of the FET's Q5 and Q6 are varied according to the control voltage Vapc , and accordingly, the magnitude of the bias current Ib and the pulse ~7~ 9 amplitude of the pulse current Ip are varied to perform an automatic power control.
The operation in the pulse current supply circuit 8 will be explained below in more detail. The supply circuit 8 supplies a pulse current Ip corresponding to an input pulse DT(in), the pulse current amplitute of which is varied in response to the control voltage Va c ' to the laser diode LD.~ Figure 4 is a graph showing a VGS-ID characteristic of the FET Q5, in which VpO
denotes a pinchoff voltage of the FET Q6.
As clear from Fig. 4, when the gate-source voltage ~GS is biased at VGsl , a level of a pulse base of the input pulse DT(in)l becomes -VGsl , and thus an upper side portion of the input pulse DT(in) is cut off at the pinchoff voltage VpO , and a residual part thereof is output to the la~er diode LD as the pulse current Ipl. In this case, the pulse amplitude becomes PAl. On the other hand, when the gate-source voltage VGs of the FET Q6 is biased at VGs2 , which is higher than VGsl , the portion of the input pulse DT~in)2 cut off at the pinchoff voltage VpO
becomes greater than the cut off portion of the input pulse DT(in~l , and the residual part ~hereof is output as the pulse current Ip2 having a pulse amplitude P~2 greater -than the pulse amplitude PAl.
That is, PAl < PA2. As described above, the pu]se amplitude of the pulse curren~ Ip is varied in response to the control voltage Vapc , which varies the gate-source voltage VGs of the FET Q6.
This pulse current ~upply circuit 8, however, has the problems descxibed below. That is, in general, the pulse width is defined as a width between mesial points of the pulse amplitude of the pulse. When the transmis-sion rate of the data input pulse DT(in) becomes very hi~, the pulse DT(in) has the trapezoidal waveform shown in Fig. 4 instead of a rectangular waveform, since a rise time and a fall time of the pulse cannot be _ ... ... . . . . .. .. .
s~
_ 9 _ ignored with respect to the pulse width. As a result, the pulse width of the pulse current Ip is varied - according to the position at which the input pulse DT(in) is sliced by the pinchoff voltage VpO , i.e., the magnitude of the control voltage V . For example, in Fi~. 4, the pulse width of the pulse current Ip becomes PWl , and the pulse width of the pulse current Ip2 becomes PW2 , where PWl ~ PW2.
Accordingly, when the automatic power control of the output light is carried out, the pulsê width of the pulse current supplied to the laser diode LD may be varied, which will cause variations in a duty factor defined as a ratio of the pulse wid-th to the pulse repetition frequency. As a result of these variations, - lS various adverse influences such as a variation of a peak magnitude of the output light and a distortion of an equivalent waveform at a receiver side, etc., undesirably occur. This phenomenon is more notable as the transmis-sion rate increases, which prevents the driving device from`attaining an increased transmission rate.
Further, similar to the problem of the driving device shown in Fig. 3, the characteristics of the FET's used in t~e pulse current and bias current supply circuits, such as the VGS-ID characteristic, are different for each device. Figure 5 is a graph showing differences of the VGS-I~ characteristics of the FET~s. In the graph, the VGS-ID characteristics of three FET's each having a different characteristic are denoted, respectively. The three FET's have pinchoff ~ pol ' Vpo2 ~ and Vpo3 , respectively.
Further, each slope of the characteristic curves, i.e., mutual conductance gm, is different not only ~or each FET but also in accordance with the magnitude of the gate-source voltage VGs.
A preferred embodiment of the present invention will now be e~plained with reference to Figs. 6 to 9.
Figure 6 is a view of an embodiment of the semiconductor . ':,., ' ` : : ' ' .
~X75~l49 laser driving device according to the present invention.
In Fig. 6, parts bearing the same reference numerals as shown Fig. 3 are parts having the same Eunction respec-tively. The embodiment of Fig. 6 is different frorn that 5 of Fig. 3 in tha-t a pulse current supply circuit 9 comprises two FET's Q7 and Q8 connected in cascade, and the control ~oltage Vapc output from the power control circuit 6 is input to the bias current supply circuit 7 and the pulse current supply circuit 9 via compensating lQ circuits 10 and 11 respectivlely.
The compensating circuit 10 comprises an operational amplifier OPl, resistors R5 to R7, and a variable resistor VRl for adjusting a gain. The circuit 10 is constitu-ted so that an offset adjusting voltage Vofl 15 can be applied to an inverting terminal of the opera-tional amplifier OPl. In the same way, the compensating circuit 11 comprises an operational amplifier OP2, resistors R8 to R10, and a variable resistor VR2, and is f constituted so that an offset adjusting voltage Vof2 20 can be applied to an inverting terminal of the opera-tional amplifier OP2.
The pulse current supply circuit 9 is constituted by two stage FET's Q7 and Q8 connected in cascade. The first stage FET Q7 receives at the gate thereof the data 25 input pulse DT(in) through a capacitor C2, and at the same time, receives the control voltage Vapc from the control circuit 6 through the compensating circuit 11 and a diode D2. A constant voltage power supply (-V~ is connected to the source of the FET Q7. Therefore, the 30 gate-source voltage VGSl of the FET Q7 can be varied in response to the control voltage Vapc , which causes the variations of the pulse amplitude of the pulse current I .
The diode D2 is a high level siae clamping diode 35 for the input pulse DT(in). The FET Q7 outputs an output pulse signal from the drain thereof ~rounded through the resistor R~ to the gate of the next stage . .,, ~ ~ ., 5~4~;1 FET Q8 through a capaci-tor C3; The gate of the FET Q8 is connected to the constant voltage power source (-Vc) through a low level side clamping diode D3, and the source thereof is connected to the constant voltage power source (-V). Accordingly, the gate-source voltage VGs2 of the FET Q8 is constant. The drain of the FET Q8 is connected to the laser diode LV, and thus the output pulse current Ip is supplied to the laser diode LD.
The operation of the pulse current supply circuit 9 will be explained with reference to Figs. 7 to 9 below.
Figure 7 is a drawing for explaining a principle of the operation of the circuit 9. First, a principle of the operation of the pulse current supply circuit 9 will be explained with reference to Fig. 7. Figure 7 shows pulse waveform having a pulse width PWO corresponding to the width between mesial points be-tween the pulse top and pulse base, the duty factor of which is 50~. The pulse waveform is cut off along the broken line (a) by the pinch-off voltage VpOl of the first stage FET Q7 to obtain the waveform portion below the broken line (a) (the portion shown by oblique lines). In this case, the pulse width PWl of the obtained pulse waveform, i.e., the width between mesial points between the pulse top and the pulse base, becomes greater than the pulse width PW0. Accordingly, the duty factor thereof becomes greater than 50%.
The obtained pulse waveform (the portion shown by oblique lines) is then cut off along one-dot chain line (b) by the pinch-off voltage Vpo2 of the FET Q8 to obtain the portion above the one-dot chain line (b~
(the portion of shown cross-hatching lines). As a result, the obtained pulse waveform has a pulse width very close to the pulse width PW0 , and a duty facto~
of almost 50%. As described above, the original pulse waveform is sliced at the upper side portion and lower side~portion with respect to the mesial point thereof, ~75~9 so that the pulse width and duty factor may be kept almost constant.
The detailed operation of the pulse current supply circuit 9 will now be explained. Figure 8 is a graph of the ID-VGS characteristic of the FET Q7, in which input and output waveforms are denoted. Figure 9 is a graph of the ID-VGS characteristic of the FET Q8, in which input and output waveforms are also denoted.
In this embodiment, the input pulse DT(in) input to the FET Q7 is a negative log:ic level pulse and has a constant pulse width. In Fig. 8, when the gate-source voltage VGsl of the FET Q7 i~s biased at the voltage V
higher than the pinch-off voltage ~pol ~ the input pulse DT(in)3 having a pulse base level of -V~511 is - 15 cut off at the pinch-off voltage VpOl to eliminate the pulse top side portion, i.e. logic "1" side portion, so that the output pulse current Ip3 has a pulse amplitude P~3 and a pulse width PW3.
On the other hand, when the gate-source voltage V
of the F~T Q7 is biase~ at the voltage VGsl2 higher than the voltage VGs11 , the portion of the input pulse DT(in)4 eliminated by cutting off at the pinch-off voltage VpOl becomes smaller in comparison with that of the input pulse DT(in)3. Accordingly, the output pulse current Ip4 has a pulse amplitude PA4 and a pulse width P~4 , where PA3 < PA4 and PW3 > PW4.
The output pulse current Ip3 or Ip4 of the FET Q7 is then converted into the output pulse voltage P3 ! or P4 to be input to the second stage FET Q8 respec-
The semiconductor laser driving device in the prior art comprises a bias current supply circuit for supplying a bias current to the laser diode, a pulse current supply circuit for supplying a pulse current to the laser diode for exciting the laser diode to emit a light, and an automatic power control loop for controlling the magnitude of the base current and the pulse amplitude of -the pulse current to maintain the output light of the laser diode at a constant power. The bias current and pulse current supply circuits are constituted by using, as active elements, bipolar transistors having almost the same characteristic.
When the bipolar transistors are used, however, ~X~5~ ~9 the -transmission rate of the semiconductor laser drivlng device has an upper limit on the order oE about lOOs M bit/s and, therefore, the bipolar transistor can not be used for a semlconductor laser driving device operated at 1 G bit/s, which will become more necessary in the future. This limitation to the transmission rate is due to a physical characteristic of the bipolar transistor, and therefore, -the transmission rate cannot be increased merely by changing a circuit constitution of the driving device.
Accordingly, the use of an FET (Field Effect Transistor) capable of operating at high transmission rate, such as GaAs FET, has been proposed for the high speed operating type semiconductor laser driving device.
SUMMARY OF THE INVENTION
In accordance with the present invention there is provided a pulse amplifier for varying a pulse amplitude of an input pulse in response to a control signal, comprising first and second FET's having pinch-off voltages, determined by gate-source voltages thereof, under which currents flowing at drains become zero, connected in cascade, wherein: the first FET is constituted so that an input pulse is input to a gate electrode thereof and a gate-source voltage variable in response to a con-trol signal is biased so as to output from a drain thereof a first pulse cut off at a top side portion and a base side portion of the input pulse at said pinch-off voltage thereof, and so that one of top side portion and base side portion of the input pulse is cut off at a pinchoff voltage thereof; and the second FET is constituted so that said first pulse output from the drain of the first FET is input to a gate thereof and a gate-source voltage is biased so as to output from a drain thereof a second pulse cut off at the side portion of the first pulse corresponding to the non-cut-off side portion of the input pulse.
7S~4~
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A preferred form of the above embodiment is where the pulse amplifier is one in which the first FET cuts off the top side portion of the input pulse to obtain an input pulse waveform from a zero level to an appropriate level; and the second FET cuts off the base side portion of -the input pulse to obtain an input pulse waveEorm from a peak level to an appropriate level.
A still further preferred form is where, in the above pulse amplifier, the first FET cuts of~ the base side portion of the input pulse to obtain the input pulse waveform from a peak level to an appropriate level; and the second FET cuts off the top side portion of the input pulse to obtain the input pulse waveform from a zero level to an appropriate level.
BRIEF DESCRIPTION OF THE DRAWINGS
Embodiments of the invention illustrating the pulse amplifier used in conjunction with a semiconductor laser driving device will now be described in detail with reference to the accompanying drawings, in which:
Figure 1 is a view showing an example of the semiconductor laser driving device of the prior art;
Fig. 2 is a graph showing an operating characteristic of the laser diode;
Fig. 3 is a view showing the semiconductor laser driving device as a relevant ar-t;
Fig. 4 is a graph showing a VGS-ID character-istic of the FET Q6;
Fig. 5 is a graph showing differences of the ~l~7~
_g_ VGS-ID characteristics of the EETs;
Fig. 6 is a view showing an embodiment of the semiconductor laser driving device;
Fig. 7 is a view for explaining a principle of the operation of the pulse current supply circuit in Fig.
6;
Figs. 8 and 9 are graphs for explaining the operation of the pulse current supply circuit in Fig. 6; and Fig. 10 is a view showing a general constitution of the pulse amplifier according to the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
For easy and better unclerstanding of the present invention, a semiconductor laser driving device of prior and related arts, and their problems, are first described with reference to Figs. 1 to 5.
Figure 1 is a view showing an example of the semiconductor laser driving device of the prior art. In Fig. 1, 1 is a laser diode module comprising a laser diode LD which outputs a forward laser ligh-t into a optical fiber {not shown}, and at the same time, a backward laser light as a monitoring light to be monitored, and an avalanche photodiode APD which receives the monitoring light and converts it into a monitoring current Im ; 2 is a bias current supply circuit for supplying a DC bias current for the laser diode LD, which circuit comprises a bipolar transistor Ql and a resistor Rl; 3 is a pulse current supply circuit for supplying a pulse current for the laser diode LD in such a manner that the pulse current is superimposed on the bias current, which circuit comprises bipolar transistors Q2 to Q4 and a resistor R2;
4 is a low pass filter for extracting a low Erequency component of data input pulse D~(in); 5 is a low pass filter for extracting a low frequency component of the monitoring current Im ~;~75~3 outpu-t from the avalanche photodiode APD; 6 i9 an automatic power control circuit constituted by a differ-ential amplifier, which circuit supplies an automatic power control voltage Vapc proportional to a difference between two inputs from the low pass filters 4 and 5 to a base of the transistor Ql of the bias current supply circuit 2 and a base of the transistor Q4 of the pulse current supply circuit 3; and L is a coil for cutting off an AC component. The pulse current supyly circuit 3 receives the data input pulses DT(in) at the base of the transistor Q2 to supply a pulse curren-t Ip corresponding to the input pulse DT(in) to the laser diode LD. A
reversed input pulse DT(in) is input to a base of the transistor Q3.
15Figure 2 is a graph showing an operating character istic of the laser diode, in which the abscissa denotes ! a driving current Id flowing through the laser diode LD
and the ordinate denotes an output power L of the laser light emitted from the laser diode. In Fig. 2, the charàcteristic curves A, B, and C correspond to operating temperatures of 5C, 25C, and 50C, respectively. As shown in Fig. 2, the bias current Ib is a DC current slightly lower than a threshold current Ith of the laser diode LD. The pulse current Ip is superimposed on the bias current Ib ~ whereby the pulselike laser light corresponding to the pulse current Ip is output from the laser diode LD.
The low pass filters 4 and 5 and the control circuit 6, together with the bias current and pulse current supply circuits 2 and 3, constitute an automatic power control loop for stabilizing the light output ~rom the laser diode LD. That is, as shown in Fig. 2, the threshold current Ith and a differential quantum efficiency of the laser diode LD vary in accordance with the temperature. For example, assuming an identical driving current Id ~ when the temperature is low the light output power LoUt increases, and when the 1~75~
temperature is high the light output power decreases.
Accordingly, the light outpu-t from the laser diode LD
varies with respect to the temperature. The automatic power control loop is provided for compensating this variation, by comparing the average value of the input pulses DT(in) output from the low pass filter 4 with the average value of the monitoring current Im output from the low pass filter 5 at the control circuit 6, then outpu-tting the control voltage Vapc to make these average values coincide and thus control the bias current Ib and the pulse current Ip , thereby maintaining the output light at a constant value.
The bias value Ib is proportional to Vapc where the resistance of the resistor Rl is designed to compensate for va~iations in temperature of the threshold current Ith of the laser diode. The pulse current Ip is proportional to apc , where the resistance of the resistor R2 is designed to compensate for variations in temperature of the differential quantum efficiency of the laser diode LD.
As described above, the feedback control is performed on the basis of the average values of the pulse train output from the low pass filters 4 and 5, because a feedback control by which a peak value of the light output pulse is maintained at a constant value by following up each of the input pulses DT(in) is difficult, due to the high transmission rate thereof.
In this semiconductor laser driving device, the monitoring light from the laser diode LD is detected by the photodiode APD, and a pulse amplitude of the pulse current supplied from the pulse current supply circuit 3 and the value of the DC bias current supplied from the bias current supply circuit are fedback in response to the detec~ted value of the monitoring light, and thus an automatic power control of the ou~put light is carried ~7~ 9 out to maintain a constant average value of the output light.
- As described above, the semiconductor laser driving device shown in Fig. 1 uses bipolar transistors as active elements in the bias current and pulse current supply circui-ts 2 and 3. The bipolar transistors are used because the differences between the base voltage and collector current characteristics of each device are - small, and accordingly, in the automatic power control loop, the output of the control circuit 6 may be directly fedback to the transistors Ql and Q4.
When using the bipolar transistor, however, the transmission rate is limited to, for example, an upper order of lOOs Mb/S, which can not cope with a demand for a 1 Gb/s transmission rate, which demand will become greater in the future.
Figure 3 is a view showing the semiconductor laser driving device as a relevant art of the present inven-tion, in which high speed FET's capable of operating at a transmission rate of 1 to 2 Gb/s order, such as Gallium Arsenide FET's, are used as active elements in the bias current and pulse current supply circuits.
This driving device is intended to further increase the ! transmission rate. In Fig. 3, parts bearing ths same xeference numerals as shown in Fig. 1 denote the same parts having the same function.
As shown in Fig~ 3, a bias current supply circuit 7 comprises an FET Q5 with a gate to which the control voltage Vapc is input. A pulse current supply circuit 8 comprises a capacitor C2, an FET Q6 with a gate to which the input pulse DTtin) is input, and a low level clamping diode Dl through which the control voltage ~apc is applied to the gate of the FET Q6.
In this semiconductor laser driving device, gate-source voltages of the FET's Q5 and Q6 are varied according to the control voltage Vapc , and accordingly, the magnitude of the bias current Ib and the pulse ~7~ 9 amplitude of the pulse current Ip are varied to perform an automatic power control.
The operation in the pulse current supply circuit 8 will be explained below in more detail. The supply circuit 8 supplies a pulse current Ip corresponding to an input pulse DT(in), the pulse current amplitute of which is varied in response to the control voltage Va c ' to the laser diode LD.~ Figure 4 is a graph showing a VGS-ID characteristic of the FET Q5, in which VpO
denotes a pinchoff voltage of the FET Q6.
As clear from Fig. 4, when the gate-source voltage ~GS is biased at VGsl , a level of a pulse base of the input pulse DT(in)l becomes -VGsl , and thus an upper side portion of the input pulse DT(in) is cut off at the pinchoff voltage VpO , and a residual part thereof is output to the la~er diode LD as the pulse current Ipl. In this case, the pulse amplitude becomes PAl. On the other hand, when the gate-source voltage VGs of the FET Q6 is biased at VGs2 , which is higher than VGsl , the portion of the input pulse DT~in)2 cut off at the pinchoff voltage VpO
becomes greater than the cut off portion of the input pulse DT(in~l , and the residual part ~hereof is output as the pulse current Ip2 having a pulse amplitude P~2 greater -than the pulse amplitude PAl.
That is, PAl < PA2. As described above, the pu]se amplitude of the pulse curren~ Ip is varied in response to the control voltage Vapc , which varies the gate-source voltage VGs of the FET Q6.
This pulse current ~upply circuit 8, however, has the problems descxibed below. That is, in general, the pulse width is defined as a width between mesial points of the pulse amplitude of the pulse. When the transmis-sion rate of the data input pulse DT(in) becomes very hi~, the pulse DT(in) has the trapezoidal waveform shown in Fig. 4 instead of a rectangular waveform, since a rise time and a fall time of the pulse cannot be _ ... ... . . . . .. .. .
s~
_ 9 _ ignored with respect to the pulse width. As a result, the pulse width of the pulse current Ip is varied - according to the position at which the input pulse DT(in) is sliced by the pinchoff voltage VpO , i.e., the magnitude of the control voltage V . For example, in Fi~. 4, the pulse width of the pulse current Ip becomes PWl , and the pulse width of the pulse current Ip2 becomes PW2 , where PWl ~ PW2.
Accordingly, when the automatic power control of the output light is carried out, the pulsê width of the pulse current supplied to the laser diode LD may be varied, which will cause variations in a duty factor defined as a ratio of the pulse wid-th to the pulse repetition frequency. As a result of these variations, - lS various adverse influences such as a variation of a peak magnitude of the output light and a distortion of an equivalent waveform at a receiver side, etc., undesirably occur. This phenomenon is more notable as the transmis-sion rate increases, which prevents the driving device from`attaining an increased transmission rate.
Further, similar to the problem of the driving device shown in Fig. 3, the characteristics of the FET's used in t~e pulse current and bias current supply circuits, such as the VGS-ID characteristic, are different for each device. Figure 5 is a graph showing differences of the VGS-I~ characteristics of the FET~s. In the graph, the VGS-ID characteristics of three FET's each having a different characteristic are denoted, respectively. The three FET's have pinchoff ~ pol ' Vpo2 ~ and Vpo3 , respectively.
Further, each slope of the characteristic curves, i.e., mutual conductance gm, is different not only ~or each FET but also in accordance with the magnitude of the gate-source voltage VGs.
A preferred embodiment of the present invention will now be e~plained with reference to Figs. 6 to 9.
Figure 6 is a view of an embodiment of the semiconductor . ':,., ' ` : : ' ' .
~X75~l49 laser driving device according to the present invention.
In Fig. 6, parts bearing the same reference numerals as shown Fig. 3 are parts having the same Eunction respec-tively. The embodiment of Fig. 6 is different frorn that 5 of Fig. 3 in tha-t a pulse current supply circuit 9 comprises two FET's Q7 and Q8 connected in cascade, and the control ~oltage Vapc output from the power control circuit 6 is input to the bias current supply circuit 7 and the pulse current supply circuit 9 via compensating lQ circuits 10 and 11 respectivlely.
The compensating circuit 10 comprises an operational amplifier OPl, resistors R5 to R7, and a variable resistor VRl for adjusting a gain. The circuit 10 is constitu-ted so that an offset adjusting voltage Vofl 15 can be applied to an inverting terminal of the opera-tional amplifier OPl. In the same way, the compensating circuit 11 comprises an operational amplifier OP2, resistors R8 to R10, and a variable resistor VR2, and is f constituted so that an offset adjusting voltage Vof2 20 can be applied to an inverting terminal of the opera-tional amplifier OP2.
The pulse current supply circuit 9 is constituted by two stage FET's Q7 and Q8 connected in cascade. The first stage FET Q7 receives at the gate thereof the data 25 input pulse DT(in) through a capacitor C2, and at the same time, receives the control voltage Vapc from the control circuit 6 through the compensating circuit 11 and a diode D2. A constant voltage power supply (-V~ is connected to the source of the FET Q7. Therefore, the 30 gate-source voltage VGSl of the FET Q7 can be varied in response to the control voltage Vapc , which causes the variations of the pulse amplitude of the pulse current I .
The diode D2 is a high level siae clamping diode 35 for the input pulse DT(in). The FET Q7 outputs an output pulse signal from the drain thereof ~rounded through the resistor R~ to the gate of the next stage . .,, ~ ~ ., 5~4~;1 FET Q8 through a capaci-tor C3; The gate of the FET Q8 is connected to the constant voltage power source (-Vc) through a low level side clamping diode D3, and the source thereof is connected to the constant voltage power source (-V). Accordingly, the gate-source voltage VGs2 of the FET Q8 is constant. The drain of the FET Q8 is connected to the laser diode LV, and thus the output pulse current Ip is supplied to the laser diode LD.
The operation of the pulse current supply circuit 9 will be explained with reference to Figs. 7 to 9 below.
Figure 7 is a drawing for explaining a principle of the operation of the circuit 9. First, a principle of the operation of the pulse current supply circuit 9 will be explained with reference to Fig. 7. Figure 7 shows pulse waveform having a pulse width PWO corresponding to the width between mesial points be-tween the pulse top and pulse base, the duty factor of which is 50~. The pulse waveform is cut off along the broken line (a) by the pinch-off voltage VpOl of the first stage FET Q7 to obtain the waveform portion below the broken line (a) (the portion shown by oblique lines). In this case, the pulse width PWl of the obtained pulse waveform, i.e., the width between mesial points between the pulse top and the pulse base, becomes greater than the pulse width PW0. Accordingly, the duty factor thereof becomes greater than 50%.
The obtained pulse waveform (the portion shown by oblique lines) is then cut off along one-dot chain line (b) by the pinch-off voltage Vpo2 of the FET Q8 to obtain the portion above the one-dot chain line (b~
(the portion of shown cross-hatching lines). As a result, the obtained pulse waveform has a pulse width very close to the pulse width PW0 , and a duty facto~
of almost 50%. As described above, the original pulse waveform is sliced at the upper side portion and lower side~portion with respect to the mesial point thereof, ~75~9 so that the pulse width and duty factor may be kept almost constant.
The detailed operation of the pulse current supply circuit 9 will now be explained. Figure 8 is a graph of the ID-VGS characteristic of the FET Q7, in which input and output waveforms are denoted. Figure 9 is a graph of the ID-VGS characteristic of the FET Q8, in which input and output waveforms are also denoted.
In this embodiment, the input pulse DT(in) input to the FET Q7 is a negative log:ic level pulse and has a constant pulse width. In Fig. 8, when the gate-source voltage VGsl of the FET Q7 i~s biased at the voltage V
higher than the pinch-off voltage ~pol ~ the input pulse DT(in)3 having a pulse base level of -V~511 is - 15 cut off at the pinch-off voltage VpOl to eliminate the pulse top side portion, i.e. logic "1" side portion, so that the output pulse current Ip3 has a pulse amplitude P~3 and a pulse width PW3.
On the other hand, when the gate-source voltage V
of the F~T Q7 is biase~ at the voltage VGsl2 higher than the voltage VGs11 , the portion of the input pulse DT(in)4 eliminated by cutting off at the pinch-off voltage VpOl becomes smaller in comparison with that of the input pulse DT(in)3. Accordingly, the output pulse current Ip4 has a pulse amplitude PA4 and a pulse width P~4 , where PA3 < PA4 and PW3 > PW4.
The output pulse current Ip3 or Ip4 of the FET Q7 is then converted into the output pulse voltage P3 ! or P4 to be input to the second stage FET Q8 respec-
3~ tively. The pulse base of the input pulse, i.e., t-0"
level of the input pulse, is arranged at a constant voltage VGsc. In this state wherein the "0" level of the input pulse is arranged, the input pulse P3 or P4 corresponding to the pulse current Ip3 or Ip4 respec-tively is cut off at the same position of the pulse baseside, to cut off the pulse base side portion thereof with respect to the mesial poin-t of the original input ~L~75~49 data pulse DT(in) respectively, and then ou-tput as -the output pulse current Ip3 or Ip4 having the pulse amplitude PA5 or PA6 and pulse width PW5 or PW6 , respectively. As a result, the ou-tput pulse currents Ip3 or Ip4 have almost the same pulse width PW5 or PW6 , but have a different pulse amplitude PA5 or PA6 varied according to the variation of the gate-source voltage VGsl of the first stage FET Q7, respectively.
Thus, the control for varying the pulse amplitude without varying the pulse width is realizèd.
Note, in the pulse current supply circuit 9 described above, the gate-source voltage VGsl of the first stage FET Q7 is variable, but the gate-source voltage VGs2 of the second stage FET Q8 is fixed.
Nevertheless, to absorb a variation of the pinch-off voltage of the EET, it may be desirable to vary the gate-source voltage VGs2 of the FET Q8.
The operation for conpensating the difference in each FET characteristic by the compensating circuits 10 and 11 will now be explained. When the FET Q5 and Q7 have individual different characteristics, for example, as shown in Fig~ 5~ the difference in the pinch-off voltage~ such as VpOl ~ Vpo2 ~ or Vpo3 , compensated by varying the offset voltages Vofl and Vof2 of the operational amplifiers OPl and OP2. Further, the difference between the mutual conductances of each FET
is compensated by adjusting the gains of the operational amplifiers OPl and OP2 by means of the variable resistors VRl and VR2, to vary the magnitudes of the control voltage Va c supplied from the control circuit to the pulse current and bias current supply circuits 7 and 9 respectively.
In the example described above, compensation is made only for a deviation of the characteristic of the FET. In practice, however, not only the deviation of the characteristic o~ the FET but also a deviation of the dif~erential quantum efficiency and the threshold 5~4~
current of the laser diode may be compensated by adjusting -the gains of the operational amplifiers OPl and OP2 by means of the variable resis-tors VRl and VR2 and offset voltages Vofl and Vof2.
Although a preferred embodiment has been described hereinbefore, various modiEications and alterations are possible within the scope of the present invention. For example, in the example described in Fig. 6, the input pulse DT(in~ input to the pulse current supply circuit 9 has a negative logic, but a positive logic input pulse also may be utilized.
Further, the use of the pulse amplifier according to the present invention is not limited to the pulse current supply circuit as described above. Figure 10 shown a circuit diagram of a pulse amplifier, according to the present invention, which has a general configura-tion. When the pulse amplifier used as the pulse current supply circuit 9 shown in Fig. 6, is used for another purpose, in general, the drain of the FET Q8 is grounded through the load resistor Rll instead of the laser diode LD.
level of the input pulse, is arranged at a constant voltage VGsc. In this state wherein the "0" level of the input pulse is arranged, the input pulse P3 or P4 corresponding to the pulse current Ip3 or Ip4 respec-tively is cut off at the same position of the pulse baseside, to cut off the pulse base side portion thereof with respect to the mesial poin-t of the original input ~L~75~49 data pulse DT(in) respectively, and then ou-tput as -the output pulse current Ip3 or Ip4 having the pulse amplitude PA5 or PA6 and pulse width PW5 or PW6 , respectively. As a result, the ou-tput pulse currents Ip3 or Ip4 have almost the same pulse width PW5 or PW6 , but have a different pulse amplitude PA5 or PA6 varied according to the variation of the gate-source voltage VGsl of the first stage FET Q7, respectively.
Thus, the control for varying the pulse amplitude without varying the pulse width is realizèd.
Note, in the pulse current supply circuit 9 described above, the gate-source voltage VGsl of the first stage FET Q7 is variable, but the gate-source voltage VGs2 of the second stage FET Q8 is fixed.
Nevertheless, to absorb a variation of the pinch-off voltage of the EET, it may be desirable to vary the gate-source voltage VGs2 of the FET Q8.
The operation for conpensating the difference in each FET characteristic by the compensating circuits 10 and 11 will now be explained. When the FET Q5 and Q7 have individual different characteristics, for example, as shown in Fig~ 5~ the difference in the pinch-off voltage~ such as VpOl ~ Vpo2 ~ or Vpo3 , compensated by varying the offset voltages Vofl and Vof2 of the operational amplifiers OPl and OP2. Further, the difference between the mutual conductances of each FET
is compensated by adjusting the gains of the operational amplifiers OPl and OP2 by means of the variable resistors VRl and VR2, to vary the magnitudes of the control voltage Va c supplied from the control circuit to the pulse current and bias current supply circuits 7 and 9 respectively.
In the example described above, compensation is made only for a deviation of the characteristic of the FET. In practice, however, not only the deviation of the characteristic o~ the FET but also a deviation of the dif~erential quantum efficiency and the threshold 5~4~
current of the laser diode may be compensated by adjusting -the gains of the operational amplifiers OPl and OP2 by means of the variable resis-tors VRl and VR2 and offset voltages Vofl and Vof2.
Although a preferred embodiment has been described hereinbefore, various modiEications and alterations are possible within the scope of the present invention. For example, in the example described in Fig. 6, the input pulse DT(in~ input to the pulse current supply circuit 9 has a negative logic, but a positive logic input pulse also may be utilized.
Further, the use of the pulse amplifier according to the present invention is not limited to the pulse current supply circuit as described above. Figure 10 shown a circuit diagram of a pulse amplifier, according to the present invention, which has a general configura-tion. When the pulse amplifier used as the pulse current supply circuit 9 shown in Fig. 6, is used for another purpose, in general, the drain of the FET Q8 is grounded through the load resistor Rll instead of the laser diode LD.
Claims (8)
1. A pulse amplifier for varying a pulse amplitude of an input pulse in response to a control signal, comprising first and second FET's having pinch-off voltages, determined by gate-source voltages thereof, under which currents flowing at drains become zero, connected in cascade, wherein:
the first FET is constituted so that an input pulse is input to a gate electrode thereof and a gate-source voltage variable in response to a control signal is biased so as to output from a drain thereof a first pulse cut of at a top side portion and a base side portion of the input pulse at said pinch-off voltage thereof, and so that one of top side portion and base side portion of the input pulse is cut off at a pinchoff voltage thereof; and the second FET is constituted so that said first pulse output from the drain of the first FET is input to a gate thereof and a gate-source voltage is biased so as to output from a drain thereof a second pulse cut off at the side portion of the first pulse corresponding to the non-cut-off side portion of the input pulse.
the first FET is constituted so that an input pulse is input to a gate electrode thereof and a gate-source voltage variable in response to a control signal is biased so as to output from a drain thereof a first pulse cut of at a top side portion and a base side portion of the input pulse at said pinch-off voltage thereof, and so that one of top side portion and base side portion of the input pulse is cut off at a pinchoff voltage thereof; and the second FET is constituted so that said first pulse output from the drain of the first FET is input to a gate thereof and a gate-source voltage is biased so as to output from a drain thereof a second pulse cut off at the side portion of the first pulse corresponding to the non-cut-off side portion of the input pulse.
2. A pulse amplifier according to claim 1 wherein;
the first FET cuts off the top side portion of the input pulse to obtain an input pulse waveform from a zero level to an appropriate level; and the second FET cuts off the base side portion of the input pulse to obtain an input pulse waveform from a peak level to an appropriate level.
the first FET cuts off the top side portion of the input pulse to obtain an input pulse waveform from a zero level to an appropriate level; and the second FET cuts off the base side portion of the input pulse to obtain an input pulse waveform from a peak level to an appropriate level.
3. A pulse amplifier according to claim 1 wherein;
the first FET cuts off the base side portion of the input pulse to obtain the input pulse waveform from a peak level to an appropriate level; and the second FET cuts off the top side portion of the input pulse to obtain the input pulse waveform from a zero level to an appropriate level.
the first FET cuts off the base side portion of the input pulse to obtain the input pulse waveform from a peak level to an appropriate level; and the second FET cuts off the top side portion of the input pulse to obtain the input pulse waveform from a zero level to an appropriate level.
4. A pulse amplifier according to claim 1, further comprising a first voltage control means for varying a gate-source voltage of the first FET to vary a pulse base level of the input pulse.
5. A pulse amplifier according to claim 4, further comprising a second voltage control means for controlling a gate-source voltage of the second FET.
6. A pulse amplifier according to claim 4, wherein the first voltage control means is connected to a gate of the first FET having a source voltage fixed at a constant value through a diode for clamping a zero level of the input pulse signal so as to variably control the gate voltage thereof.
7. A pulse amplifier according to claim 5, wherein the second voltage control means is connected to the gate of the second FET through a diode for clamping a zero level of the output pulse signal of the first FET.
8. A pulse amplifier according to claim 2, wherein the input pulse signal is a negative logic pulse signal, the drains of the first and second FET's are grounded, and the first voltage control means and the second voltage control means are negative voltage sources.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA568053A CA1275149C (en) | 1985-10-22 | 1986-10-17 | Pulse amplifier suitable for use in the semiconductor laser driving device |
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60-234634 | 1985-10-22 | ||
| JP23463485A JPS6294994A (en) | 1985-10-22 | 1985-10-22 | Laser diode drive circuit |
| JP5946486A JPS62217712A (en) | 1986-03-19 | 1986-03-19 | Pulse amplifier |
| JP61-059464 | 1986-03-19 | ||
| CA000520769A CA1319397C (en) | 1985-10-22 | 1986-10-17 | Semiconductor laser driving device and a pulse amplifier suitable for use in the semiconductor laser driving device |
| CA568053A CA1275149C (en) | 1985-10-22 | 1986-10-17 | Pulse amplifier suitable for use in the semiconductor laser driving device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000520769A Division CA1319397C (en) | 1985-10-22 | 1986-10-17 | Semiconductor laser driving device and a pulse amplifier suitable for use in the semiconductor laser driving device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA1275149A true CA1275149A (en) | 1990-10-09 |
| CA1275149C CA1275149C (en) | 1990-10-09 |
Family
ID=27167641
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA568053A Expired CA1275149C (en) | 1985-10-22 | 1986-10-17 | Pulse amplifier suitable for use in the semiconductor laser driving device |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1275149C (en) |
-
1986
- 1986-10-17 CA CA568053A patent/CA1275149C/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CA1275149C (en) | 1990-10-09 |
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